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41. 发明授权

US08694847B2 Systems and methods for sector quality determination in a data processing system 有权
标题翻译：数据处理系统中部门质量确定的系统和方法
公开(公告)号：US08694847B2
公开(公告)日：2014-04-08
申请号：US13597026
申请日：2012-08-28
申请人： Fan Zhang , Yang Han , Xuebin Wu , Shaohua Yang
发明人： Fan Zhang , Yang Han , Xuebin Wu , Shaohua Yang
IPC分类号： H03M13/00 , H04L1/18 , G06F11/00
CPC分类号： H03M13/6591 , G11B20/1833 , H03M13/1128 , H03M13/1145 , H03M13/27 , H03M13/3738 , H03M13/3753 , H03M13/4138 , H03M13/6337 , H03M13/6343 , H03M13/6561 , H03M13/658
摘要： The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data set quality determination.
摘要翻译：本发明涉及用于数据处理的系统和方法，更具体地涉及用于数据集质量确定的系统和方法。

42. 发明申请

US20140032996A1 DECODING APPARATUS, STORAGE APPARATUS, AND DECODING METHOD 有权
标题翻译：解码设备，存储设备和解码方法
公开(公告)号：US20140032996A1
公开(公告)日：2014-01-30
申请号：US13738749
申请日：2013-01-10
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Nobuhiro MAETO
IPC分类号： H03M13/13
CPC分类号： H03M13/13 , H03M13/1111 , H03M13/255 , H03M13/4138 , H03M13/6331 , H03M13/658 , H03M13/6583 , H03M13/6591
摘要： According to at least one embodiment, a decoding apparatus includes an error correcting module and a change module. The error correcting module decodes for correcting error of encoded data using a low-density party check code and likelihood information. The change module changes a value of the likelihood information if the value of the likelihood information is continuously smaller than a predetermined value.
摘要翻译：根据至少一个实施例，解码装置包括纠错模块和改变模块。误差校正模块使用低密度方检验码和似然信息解码编码数据的误差。如果似然信息的值连续地小于预定值，则改变模块改变似然信息的值。

43. 发明申请

US20130339816A1 CONSERVING COMPUTING RESOURCES DURING ERROR CORRECTION 有权
标题翻译：在错误修正期间保留计算资源
公开(公告)号：US20130339816A1
公开(公告)日：2013-12-19
申请号：US13994938
申请日：2012-03-28
申请人： Zion S. Kwok
发明人： Zion S. Kwok
IPC分类号： H03M13/13
CPC分类号： H03M13/13 , H03M13/1111 , H03M13/2948 , H03M13/2957 , H03M13/4138 , H03M13/42 , H03M13/6505 , H03M13/6525 , H03M13/6527 , H03M13/6577 , H03M13/6588
摘要： Embodiments of the present disclosure describe device, methods, computer-readable media and system configurations for performing data decoding and error correction. In various embodiments, a plurality of bits of encoded data may be received, e.g., by an iterative decoder. In various embodiments, the iterative decoder may generate a set of m tuples A, each tuple in set A including a symbol comprising a group of bits of the encoded data and a probability associated with the symbol. In various embodiments, the encoded data may be decoded using the set of m tuples. In various embodiments, this may include allocating fewer bits to storage of a probability associated with a first tuple of the set A than are allocated for storage of a probability associated with a second tuple of the set A. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了用于执行数据解码和纠错的设备，方法，计算机可读介质和系统配置。在各种实施例中，可以例如通过迭代解码器来接收多个编码数据位。在各种实施例中，迭代解码器可以生成一组m个元组A，集合A中的每个元组包括包含编码数据的一组比特的符号和与该符号相关联的概率。在各种实施例中，可以使用一组m个元组对编码数据进行解码。在各种实施例中，这可以包括分配更少的比特以存储与集合A的第一元组相关联的概率，而不是分配用于存储与集合A的第二元组相关联的概率。其他实施例可以被描述和/或声称。

44. 发明授权

US08572471B2 SOVA sharing during LDPC global iteration 有权
标题翻译： LDPC全局迭代期间的SOVA共享
公开(公告)号：US08572471B2
公开(公告)日：2013-10-29
申请号：US13656433
申请日：2012-10-19
申请人： Link—A—Media Devices Corporation
发明人： Kwok W. Yeung , Kin Man Ng
IPC分类号： G06F11/00
CPC分类号： H03M13/2933 , H03M13/1105 , H03M13/1145 , H03M13/2957 , H03M13/2987 , H03M13/4138 , H03M13/6331 , H04L1/005 , H04L1/0054 , H04L1/0065
摘要： Decoding is performed on input data to obtain first decoded data using a first error correction decoder. If decoding by a second error correction decoder on the first decoded data fails, decoding is performed using an output of the second decoder and using the first decoder. A reservation request is sent from the second error correction decoder to a memory prior to completion of the decoding on the first decoded data. Space is reserved in the memory in response to receiving the reservation request from the second decoder.
摘要翻译：对输入数据执行解码，以使用第一纠错解码器来获得第一解码数据。如果通过第二纠错解码器对第一解码数据进行解码失败，则使用第二解码器的输出并使用第一解码器执行解码。在对第一解码数据进行解码完成之前，将预约请求从第二纠错解码器发送到存储器。响应于从第二解码器接收到预约请求，空间被保留在存储器中。

45. 发明授权

US08484539B1 Controlling power consumption in iterative ECC processing systems 有权
标题翻译：控制迭代ECC处理系统的功耗
公开(公告)号：US08484539B1
公开(公告)日：2013-07-09
申请号：US12802133
申请日：2010-05-28
申请人： Kwok W. Yeung , Kin Man Ng
发明人： Kwok W. Yeung , Kin Man Ng
IPC分类号： H03M13/00 , H03M13/03 , G06F11/00
CPC分类号： H03M13/2957 , G06F1/3203 , G06F11/3041 , G06F11/3058 , H03M13/1102 , H03M13/1111 , H03M13/1128 , H03M13/3715 , H03M13/4138 , H03M13/6331
摘要： An iterative error correction coding (ECC) decoder is configured to operate in a first higher-power and higher-performance operating mode. At least some part of a system that includes the iterative ECC decoder is monitored. It is determining whether to switch the iterative ECC decoder from the first higher-power and higher-performance operating mode to a second lower-power and lower-performance operating mode based at least in part on the monitoring. The iterative ECC decoder is configured to operate in the second lower-power and lower-performance operating mode in the event it is determined to switch operating modes.
摘要翻译：迭代纠错编码（ECC）解码器被配置为在第一高功率和更高性能的操作模式下操作。监视包括迭代ECC解码器的系统的至少部分。至少部分地基于监视来确定是否将迭代ECC解码器从第一高功率和高性能操作模式切换到第二低功率和低性能操作模式。在确定切换操作模式的情况下，迭代ECC解码器被配置为在第二低功率和低性能操作模式下操作。

46. 发明授权

US08433975B2 Bitwise reliability indicators from survivor bits in Viterbi decoders 有权
标题翻译：维特比解码器中存活位的逐位可靠性指标
公开(公告)号：US08433975B2
公开(公告)日：2013-04-30
申请号：US12856143
申请日：2010-08-13
申请人： Andries Pieter Hekstra , Nur Engin
发明人： Andries Pieter Hekstra , Nur Engin
IPC分类号： H03M13/00
CPC分类号： H04L1/0054 , H03M13/09 , H03M13/2936 , H03M13/373 , H03M13/4138 , H03M13/4161 , H04L1/0059 , H04L1/0065
摘要： Various embodiments relate to the production of erasure flags to indicate errors resulting from decoding of convolutional codes. A Viterbi decoder may use a register exchange method to produce a plurality of survivor codes. At a defined index, a majority vote may take place comparing values of bits in each of the survivor codes. This majority vote may involve obtaining both the quantity of high-order bits and the quantity of low-order bits and obtaining the difference of the two quantities. The absolute value of the difference of high-order bits to low-order bits may be compared to a defined threshold. When the absolute value difference is below the defined quantity, an erasure flag may be produced and associated with the bits of the defined index, indicating that they are eligible for erasure. In some embodiments, a Reed-Solomon decoder may use the erasure flag to target specific survivor bits or survivor bytes for error-correction through erasure.
摘要翻译：各种实施例涉及擦除标志的产生，以指示由卷积码的解码产生的错误。维特比解码器可以使用寄存器交换方法来产生多个幸存代码。在定义的索引中，可以进行多数投票来比较每个幸存者代码中的比特值。这个多数投票可以涉及获得高阶位数量和低位数量，并获得两个数量的差。可以将高阶位与低位的差的绝对值与定义的阈值进行比较。当绝对值差低于定义的数量时，可以产生擦除标志并与定义的索引的位相关联，表示它们符合擦除条件。在一些实施例中，Reed-Solomon解码器可以使用擦除标志来针对特定的幸存者比特或幸存者字节来进行错误校正。

47. 发明申请

US20130016799A1 Detection of Radio Signals in a Receiver 有权
标题翻译：无线电信号在接收机中的检测
公开(公告)号：US20130016799A1
公开(公告)日：2013-01-17
申请号：US13512302
申请日：2009-12-04
申请人： Miguel Lopez , Kenneth Sandberg
发明人： Miguel Lopez , Kenneth Sandberg
IPC分类号： H04L27/08
CPC分类号： H03G3/3068 , H03G3/3073 , H03G3/3078 , H03M13/3905 , H03M13/41 , H03M13/4138 , H03M13/4146
摘要： Non-linear distortions, called glitches, occur in radio receivers when automatic gain control (AGC) is employed for regulating the dynamic range of the received signal. It is proposed to determine (S1) the occurrence of a glitch caused by operation of the AGC mechanism, and estimate (S2) a representation of how energy of a signal transient associated with the glitch is transferred by digital filter(s) in the receiver. The radio signal is then detected (S3) at least partly based on the estimated representation. In this way, the adverse effects of the glitch can be mitigated and detection of the desired signal can be significantly improved. This also means that the link performance will be significantly improved.
摘要翻译：当使用自动增益控制（AGC）来调节接收信号的动态范围时，在无线电接收机中发生称为毛刺的非线性失真。提出确定（S1）由AGC机构的操作引起的毛刺的发生，并且估计（S2）表示与毛刺相关联的信号瞬态的能量如何通过接收机中的数字滤波器传送。至少部分地基于估计的表示来检测（S3）无线电信号。以这种方式，可以减轻毛刺的不利影响，并且可以显着改善所需信号的检测。这也意味着链路性能将显着提高。

48. 发明授权

US08332714B1 Defect recovery for iteratively-decoded data channel 有权
公开(公告)号：US08332714B1
公开(公告)日：2012-12-11
申请号：US13362790
申请日：2012-01-31
申请人： Shaohua Yang , Nedeljko Varnica , Nitin Nangare , Zining Wu
发明人： Shaohua Yang , Nedeljko Varnica , Nitin Nangare , Zining Wu
IPC分类号： H03M13/00 , H04L1/18 , G06F11/00 , G06F11/10
CPC分类号： H04L1/0054 , H03M13/2987 , H03M13/4138 , H03M13/6331 , H04L1/005 , H04L1/0065 , H04L1/0071
摘要： In iterative decoding, a data recovery scheme corrects for corrupted or defective data by incorporating results from a previous decoding iteration. In one embodiment, a final multiplexer selects between the final detector output or a previous detector output based on the absence or presence of defective data. In another embodiment, the branch metrics for the defective data, which otherwise would be combined with a priori LLRs from an outer decoder of a prior stage, are ignored so that the a priori LLRs themselves are used alone. The two embodiments can be used together.

49. 发明授权

US08321772B1 SOVA sharing during LDPC global iteration 有权
标题翻译： LDPC全局迭代期间的SOVA共享
公开(公告)号：US08321772B1
公开(公告)日：2012-11-27
申请号：US12587999
申请日：2009-10-14
申请人： Kwok W. Yeung , Kin Man Ng
发明人： Kwok W. Yeung , Kin Man Ng
IPC分类号： G06F11/00
CPC分类号： H03M13/2933 , H03M13/1105 , H03M13/1145 , H03M13/2957 , H03M13/2987 , H03M13/4138 , H03M13/6331 , H04L1/005 , H04L1/0054 , H04L1/0065
摘要： A technique for decoding information, including a Viterbi decoder configured to decode (1) Front-end processed ADC data and (2) an output of an iterative error correction decoder in the event error correction decoding fails. The iterative error correction decoder is configured to decode Viterbi decoded data generated by the Viterbi decoder.
摘要翻译：一种用于解码信息的技术，包括维特比解码器，其被配置为解码（1）前端处理的ADC数据，以及（2）在事件纠错解码中迭代纠错解码器的输出失败。迭代纠错解码器被配置为对维特比解码器生成的维特比解码数据进行解码。

50. 发明授权

US08291304B2 Signal processing device, signal processing method, and signal reproducing apparatus 有权
标题翻译：信号处理装置，信号处理方法和信号再现装置
公开(公告)号：US08291304B2
公开(公告)日：2012-10-16
申请号：US13088957
申请日：2011-04-18
申请人： Kenji Yoshida , Haruka Obata , Kohsuke Harada
发明人： Kenji Yoshida , Haruka Obata , Kohsuke Harada
IPC分类号： H03M13/03
CPC分类号： G11B20/10009 , G11B20/10055 , G11B20/10296 , G11B20/10509 , G11B2220/2516 , H03M13/2957 , H03M13/3905 , H03M13/4138 , H03M13/6306 , H03M13/6343
摘要： According to one embodiment, a signal processing device comprises a first waveform equalizer, a second waveform equalizer, a first Viterbi decoder, a second Viterbi decoder. The first and the second waveform equalizers equalize a waveform of the input signal according to first and second partial response characteristics and output first and second partial response signals. The first and second Viterbi decoders decode the first and the second partial response signals by means of Viterbi decoding process. The input signal is reproduced based on an output of the first Viterbi decoder and an output of the second Viterbi decoder.
摘要翻译：根据一个实施例，信号处理装置包括第一波形均衡器，第二波形均衡器，第一维特比解码器，第二维特比译码器。第一和第二波形均衡器根据第一和第二部分响应特性对输入信号的波形进行均衡，并输出第一和第二部分响应信号。第一和第二维特比解码器通过维特比解码处理解码第一和第二部分响应信号。基于第一维特比解码器的输出和第二维特比解码器的输出再现输入信号。

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