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    • 41. 发明授权
    • Apparatus for manufacturing a plurality of liquid crystal panels using press and pressurized regions
    • 用于使用加压和加压区域制造多个液晶面板的装置
    • US06211938B1
    • 2001-04-03
    • US09151521
    • 1998-09-11
    • Shigeru Mori
    • Shigeru Mori
    • G02F1133
    • G02F1/1333
    • A liquid crystal panel manufacturing apparatus includes jigs, a fluid press device, a mechanical press mechanism, and a heating unit. The jigs are stacked in a plurality of stages, arranged above and below the respective pair of substrates, and have O-rings at positions corresponding to portions on the thermosetting resin. The fluid pressurizing device introduces a pressure fluid into pressure regions defined by the O-rings, surfaces of the jigs, and surfaces of the substrates through inlet holes respectively formed in the jigs, to pressurize the substrates in units of pairs. The mechanical press mechanism entirely presses the plurality of pairs of substrates stacked alternately with the jigs. The heating unit heats and calcines the plurality of pairs of substrates pressed by the mechanical press mechanism. Adhered portions adhered with the thermosetting resin and a display portion of the liquid crystal cell are pressurized, in units of pairs of substrates, in a vertical direction with a uniform pressure.
    • 液晶面板制造装置包括夹具,流体压制装置,机械压力机构和加热单元。 这些夹具被堆叠在多个阶段中,其布置在相应的一对基板的上方和下方,并且在对应于热固性树脂上的部分的位置处具有O形环。 流体加压装置通过分别形成在夹具中的入口孔将压力流体引入由O形环,夹具的表面和基板的表面限定的压力区域中,以对为单位加压基板。 机械按压机构完全按压与夹具交替堆叠的多对基板。 加热单元加热并煅烧由机械压力机构按压的多对基板。 用热固性树脂粘附的粘附部分和液晶单元的显示部分以对成对的单位在垂直方向上以均匀的压力被加压。
    • 46. 再颁专利
    • Dynamic random access memory with isolated well structure
    • 具有隔离井结构的动态随机存取存储器
    • USRE35613E
    • 1997-09-23
    • US496569
    • 1995-06-29
    • Kenichi YasudaMakoto SuwaShigeru Mori
    • Kenichi YasudaMakoto SuwaShigeru Mori
    • H01L27/02H01L27/105H01L27/108
    • H01L27/10805H01L27/0218H01L27/105
    • A semiconductor memory device includes a first conductivity type well in a first conductivity type semiconductor substrate surrounded by a second conductivity type well, one of a memory cell and an external input circuit arranged on the first conductivity type well and the other disposed outside the second conductivity type well. A predetermined power supply voltage is applied to the second conductivity type well and the first conductivity type well is connected to ground. In the structure, charge carriers injected from the external input circuit are absorbed in the second conductivity type well. As a result, the charge carriers are prevented from reaching the memory cell and destroying data stored therein. Therefore, it is possible to miniaturize transistors and increase integration density of dynamic random access memory devices without degrading the source to drain dielectric strength.
    • 半导体存储器件包括第一导电类型的半导体衬底中的第一导电类型的阱,该第一导电类型的半导体衬底由第二导电类型阱围绕,存储单元和布置在第一导电类型阱上的外部输入电路之一,另一个位于第二导电类型 类型很好。 对第二导电类型阱施加预定的电源电压,并且将第一导电类型阱连接到地。 在该结构中,从外部输入电路注入的电荷载流子被吸收在第二导电型阱中。 结果,防止电荷载体到达存储单元并破坏其中存储的数据。 因此,可以使晶体管小型化并提高动态随机存取存储器件的集成密度,而不会使源极降低介电强度。
    • 47. 发明授权
    • Projecting lens and image display device
    • 投影镜头和图像显示装置
    • US5659424A
    • 1997-08-19
    • US241633
    • 1994-05-12
    • Atsuo OsawaHiroki YoshikawaShigeru MoriNaoyuki Ogura
    • Atsuo OsawaHiroki YoshikawaShigeru MoriNaoyuki Ogura
    • G02B9/60G02B13/18G02B13/24G02B3/00
    • G02B9/60G02B13/18G02B13/24
    • An image display device which is compact on the whole and low in cost, and which uses a plurality of projection lens systems each of which is constituted by five lens groups including a first aspherical lens group, a second aspherical lens group, a third biconvex lens group, a fourth aspherical lens group and a fifth aspherical lens group which are arranged in this order successively from a screen side, the third lens group having refractive power of not lower than 70% of the total power of the projection lens system, the respective peripheral shapes of the first and second aspherical lens groups being set to have a predetermined relation, a low-dispersion high-index glass material being used for a convex lens of a green projection lens system, a high-dispersion high-index glass material being used for convex lenses of blue and red projection lens systems.
    • 一种整体紧凑且成本低的图像显示装置,其使用多个投影透镜系统,每个投影透镜系统由包括第一非球面透镜组,第二非球面透镜组,第三双凸透镜的五个透镜组构成 组,第四非球面透镜组和第五非球面透镜组,其从屏幕侧依次排列,第三透镜​​组的折射力不小于投影透镜系统的总功率的70%,折射率不小于投影透镜系统的总功率的70% 第一非球面透镜组和第二非球面透镜组的周边形状被设定为具有预定关系,低分散高折射率玻璃材料用于绿色投影透镜系统的凸透镜,高分散高折射率玻璃材料为 用于蓝色和红色投影透镜系统的凸透镜。
    • 48. 发明授权
    • Semiconductor memory device capable of operating with potentials of
adjacent bit lines inverted during multi-bit test
    • 能够在多位测试期间反相的相邻位线的电位进行操作的半导体存储器件
    • US5654924A
    • 1997-08-05
    • US640639
    • 1996-05-01
    • Tomio SuzukiMotoko HaraShigeru Mori
    • Tomio SuzukiMotoko HaraShigeru Mori
    • G11C29/00G11C29/06G11C29/28G11C29/36G11C29/50G11C7/00
    • G11C29/50G11C29/28G11C29/36
    • A semiconductor memory device is provided which can apply a voltage stress to every adjacent bit lines even when data is written using a data bit compression function in a burn-in test mode. More specifically, when data is written using the data bit compression function in the test mode, an input buffer circuit is brought to a state in which it receives a signal corresponding to a signal dq0 applied to a specific input/output terminal by a switch circuit controlled by a test mode specify signal TE in common. When an inversion designate signal INV is in an active state, a complementary signal corresponding to a signal obtained by inversion of signal dq0 by an inverting circuit is output to internal data buses IO0, ZIO0, and IO2, ZIO2. On the other hand, a complementary signal corresponding to signal dq0 is output to internal data buses IO1, ZIO1, and IO3, ZIO3.
    • 提供了一种半导体存储器件,即使在老化测试模式下使用数据位压缩功能写数据时,也可以向每个相邻位线施加电压应力。 更具体地,当在测试模式中使用数据位压缩功能写入数据时,输入缓冲器电路进入其中通过开关电路接收与施加到特定输入/输出端子的信号dq0相对应的信号的状态 由测试模式控制,共同指定信号TE。 当反转指示信号INV处于活动状态时,与通过反相电路的信号dq0的反相获得的信号相对应的互补信号被输出到内部数据总线IO0,ZIO0和IO2,ZIO2。 另一方面,对应于信号dq0的互补信号被输出到内部数据总线IO1,ZIO1和IO3,ZIO3。
    • 49. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US5608682A
    • 1997-03-04
    • US554503
    • 1995-11-07
    • Shinichi JinboShigeru Mori
    • Shinichi JinboShigeru Mori
    • G11C11/406G11C7/00
    • G11C11/406
    • An address generating circuit and an address switching circuit of a DRAM output address signals A0 to A11 according to a refresh cycle time set by the user being less than a predetermined value, and output address signals A0 to A10 according to the refresh cycle time being the predetermined value or more. A row decoder selects one word line in response to the signals A0 to A11, and selects two word lines in response to the signals A0 to A10. Since refresh is carried out by selecting two word lines when the refresh cycle time is at the predetermined value or more, disappearance of data can be prevented.
    • 根据由用户设定的刷新周期时间,DRAM输出地址信号A0〜A11的地址生成电路和地址切换电路,根据刷新周期时间,输出地址信号A0〜A10为 预定值以上。 行解码器响应于信号A0至A11选择一个字线,并响应于信号A0至A10选择两个字线。 由于当刷新周期时间在预定值以上时通过选择两条字线进行刷新,所以可以防止数据的消失。
    • 50. 发明授权
    • Device for controlling a zoom lens
    • 用于控制变焦镜头的装置
    • US5600496A
    • 1997-02-04
    • US397647
    • 1995-03-02
    • Shigeru Mori
    • Shigeru Mori
    • G03B13/36G02B7/02G02B7/08G02B7/28G02B15/14G02B15/16H04N5/232
    • G02B15/14
    • A zoom lens device includes an imaging device for converting light from an object to an electrical signal, a zoom lens and a focusing lens disposed between the object and the imaging device, a zooming adjusting circuit for adjusting a movement of the zoom lens, focus adjusting circuits for adjusting movements of the focusing lens, correcting circuits for outputting an adjustment value in response to adjustment of the zoom lens, a temperature detecting circuit for detecting a temperature around the object, and a coefficient circuit for correcting a correction value of the correcting circuit based on an output signal of the temperature detecting circuit.
    • 变焦透镜装置包括:用于将来自物体的光转换成电信号的成像装置,设置在物体和成像装置之间的变焦透镜和聚焦透镜;变焦调整电路,用于调节变焦透镜的移动;聚焦调节 用于调整聚焦透镜的运动的电路,响应于变焦透镜的调节而输出调节值的校正电路,用于检测物体周围温度的温度检测电路,以及用于校正校正电路的校正值的系数电路 基于温度检测电路的输出信号。