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41. 发明授权

US06841850B2 Semiconductor device having silicon nitride film and silicon oxide film, and method of fabricating the same 有权
标题翻译：具有氮化硅膜和氧化硅膜的半导体器件及其制造方法
公开(公告)号：US06841850B2
公开(公告)日：2005-01-11
申请号：US10235917
申请日：2002-09-06
申请人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
发明人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
IPC分类号： H01L21/76 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/762 , H01L21/768 , H01L21/8234 , H01L23/522 , H01L29/78 , H01L23/58
CPC分类号： H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/76224 , H01L21/823475
摘要： A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.
摘要翻译：本发明的半导体器件包括在半导体衬底上形成的密度为2.2g / cm 3以下的氮化硅膜和在含有TEOS和O 3的环境气氛中形成在氮化硅膜上的氧化硅膜。

42. 发明授权

US06459470B1 Image printer for controlling the shape of pixels based upon correlation values 失效
标题翻译：图像打印机，用于基于相关值控制像素的形状
公开(公告)号：US06459470B1
公开(公告)日：2002-10-01
申请号：US09344498
申请日：1999-06-25
申请人： Kenji Iwano , Hiroshi Akahori , Kunio Nobori , Kazuhiro Kayashima , Makoto Fujimoto , Yasuhito Kawamata
发明人： Kenji Iwano , Hiroshi Akahori , Kunio Nobori , Kazuhiro Kayashima , Makoto Fujimoto , Yasuhito Kawamata
IPC分类号： G03B2732
CPC分类号： H04N1/00
摘要： An image printer for printing images with less cross-talk between images and less image flickering is provided. A plurality of images are interleft in one or a plurality of line units and a lenticular lens is used to make it possible for each individual pixel to be distinguished. The difference in brightness between an attentional pixel and the surrounding pixels that surround this attentional pixel is taken, and a correlation value is produced, the correlation value being reduced if the difference is large and increased if the difference is small. The image printer is equipped with a pixel shape controller that makes the printed pixels smaller in a region where the correlation value is low, and makes the printed pixels larger in a region where the correlation value is high.
摘要翻译：提供了一种图像打印机，用于打印图像之间较少串扰的图像和较少的图像闪烁。多个图像在一个或多个行单元中进行交织，并且使用双凸透镜来使每个单独的像素可以被区分。拍摄注意像素与围绕该注意像素的周围像素之间的亮度差异，并且产生相关值，如果该差异较大则相关值减小，并且如果该差小则增加相关值。图像打印机配备有像素形状控制器，其在相关值低的区域中使印刷像素更小，并且使相对于相关值高的区域中的印刷像素较大。

43. 发明授权

US5838056A Semiconductor device applied to composite insulative film and manufacturing method thereof 失效
标题翻译：具有氮化物膜的半导体器件
公开(公告)号：US5838056A
公开(公告)日：1998-11-17
申请号：US777100
申请日：1996-12-30
申请人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
发明人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
IPC分类号： H01L27/04 , H01L21/28 , H01L21/318 , H01L21/334 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L23/58
CPC分类号： H01L29/66181 , H01L21/28167 , H01L21/3185
摘要： A semiconductor wafer having an impurity diffusion layer formed in an inner surface of a trench is cleaned. The semiconductor wafer is inserted into a furnace, and NH.sub.3 gas is introduced into the furnace in the low-pressure condition to create an atmosphere in which the temperature is set at 800.degree. C. to 1200.degree. C. and the partial pressures of H.sub.2 O and O.sub.2 are set at 1.times.10.sup.-4 Torr or less. A natural oxide film formed on the inner surface of the trench is removed, and substantially at the same time, a thermal nitride film is formed on the impurity diffusion layer. Then, a CVD silicon nitride film is formed on the thermal nitride film without exposing the thermal nitride film to the outside air in the same furnace. Next, a silicon oxide film is formed on the CVD nitride film. As a result, a composite insulative film formed of the thermal nitride film, CVD silicon nitride film and silicon oxide film is obtained. Then, an electrode for the composite insulative film is formed in the trench.
摘要翻译：清洁在沟槽的内表面形成有杂质扩散层的半导体晶片。将半导体晶片插入炉中，并将NH 3气体在低压条件下引入炉中以产生温度设定在800℃至1200℃的气氛，并且将H 2 O和 O2设定在1×10-4乇或更低。去除形成在沟槽内表面上的自然氧化膜，并且基本上同时在杂质扩散层上形成氮化氮膜。然后，在氮化硅膜上形成CVD氮化硅膜，而不会在同一炉内将氮化氮膜暴露于外部空气。接着，在CVD氮化膜上形成氧化硅膜。结果，得到由氮化物膜，CVD氮化硅膜和氧化硅膜形成的复合绝缘膜。然后，在沟槽中形成用于复合绝缘膜的电极。

44. 发明授权

US08895410B2 Method of manufacturing semiconductor device and semiconductor manufacturing apparatus 有权
标题翻译：制造半导体器件和半导体制造装置的方法
公开(公告)号：US08895410B2
公开(公告)日：2014-11-25
申请号：US11991908
申请日：2005-09-13
申请人： Tadahiro Ohmi , Akinobu Teramoto , Hiroshi Akahori
发明人： Tadahiro Ohmi , Akinobu Teramoto , Hiroshi Akahori
IPC分类号： H01L21/322 , H01L21/223 , H01L21/30 , H01L29/78 , H01L29/66 , H01L21/31
CPC分类号： H01L21/3003 , B65G2201/0247 , H01L21/31 , H01L29/6659 , H01L29/7833
摘要： A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an H2 gas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.
摘要翻译：发现晶片表面的氢终止劣化的原因是水被吸附在表面上。通过将晶片暴露于含有H 2气体的惰性气体气氛中以抑制由于水引起的氧化反应，可以改善晶片表面上的氢终止。

45. 发明申请

US20120208375A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120208375A1
公开(公告)日：2012-08-16
申请号：US13453206
申请日：2012-04-23
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto , Hiroshi Akahori , Keiichi Nii
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto , Hiroshi Akahori , Keiichi Nii
IPC分类号： H01L21/316 , H01L21/314
CPC分类号： H01L21/3185 , H01L21/0214 , H01L21/02142 , H01L21/02164 , H01L21/02175 , H01L21/02238 , H01L21/02271 , H01L21/02301 , H01L21/30604 , H01L21/31654 , H01L21/318 , H01L29/6659
摘要： In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.
摘要翻译：在形成在具有大致（110）晶面取向的硅表面上的半导体器件中，硅表面变平，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这使得能够制造高迁移率的n-MOS晶体管。通过在脱氧H 2 O或低OH密度气氛中清洗硅表面，通过在氧自由基气氛中重复自牺牲氧化物膜的沉积工艺和自牺牲氧化物膜的去除工艺来获得这种扁平化的硅表面，或通过氢或重氢强烈地终止硅表面。自牺牲氧化膜的沉积工艺可以通过各向同性氧化进行。

46. 发明授权

US08243175B2 Solid-state imaging device 有权
标题翻译：固态成像装置
公开(公告)号：US08243175B2
公开(公告)日：2012-08-14
申请号：US10554106
申请日：2004-04-14
申请人： Hiroya Kobayashi , Hiroshi Akahori , Masaharu Muramatsu
发明人： Hiroya Kobayashi , Hiroshi Akahori , Masaharu Muramatsu
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H01L27/14618 , H01L2224/48091 , H01L2924/1305 , H01L2924/15787 , H01L2924/19105 , H04N5/335 , H01L2924/05432 , H01L2924/00014 , H01L2924/00
摘要： A solid-state imaging apparatuses IS1 comprises a package P1, a CCD chip 11, chip resistor arrays 21, etc. In package P1, a mounting portion 2, for mounting CCD chip 11 and chip resistor arrays 21, is disposed so as to protrude into a hollow portion 1. Mounting portion 2 has a first planar portion 3 and second planar portions 4, and first planar portion 3 and second planar portions 4 are formed to be stepped with respect to each other. CCD chip 11 is mounted and fixed on first planar portion 3 via a spacer 13. Chip resistor arrays 21 are mounted and fixed on second planar portions 4. Using the step difference between first planar portion 3 and second planar portions 4, CCD chip 11 and chip resistor arrays 21 are positioned proximally.
摘要翻译：固态成像装置IS1包括封装P1，CCD芯片11，芯片电阻器阵列21等。在封装P1中，安装CCD芯片11和芯片电阻器阵列21的安装部分2被设置成突出成为中空部1.安装部2具有第一平面部3和第二平面部4，第一平面部3和第二平面部4相对于彼此成台阶地形成。 CCD芯片11通过间隔件13安装并固定在第一平面部分3上。芯片电阻器阵列21安装并固定在第二平面部分4上。使用第一平面部分3和第二平面部分4之间的步进差，CCD芯片11和芯片电阻器阵列21位于近侧。

47. 发明申请

US20120018783A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120018783A1
公开(公告)日：2012-01-26
申请号：US13117525
申请日：2011-05-27
申请人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
发明人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
IPC分类号： H01L29/772 , H01L21/28
CPC分类号： H01L29/1083 , H01L21/84 , H01L27/11526 , H01L27/11529 , H01L27/1207 , H01L29/66825 , H01L29/7881
摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a first isolation groove penetrating through a conductive film serving as the gate electrode to reach the semiconductor substrate. The method can include forming a protection film covering a side wall of the first isolation groove including a side face of the gate electrode. The method can include forming a second isolation groove by etching the semiconductor substrate exposed to a bottom surface of the first isolation groove. The method can include oxidizing an inner surface of the second isolation groove provided on each of both sides of the gate electrode to form first insulating films, which are connected to each other under the gate electrode. In addition, the method can include filling an inside of the first isolation groove and an inside of the second isolation groove with a second insulating film.
摘要翻译：根据一个实施例，公开了一种用于制造半导体器件的方法。作为设置在相邻的栅电极之间的隔离槽的内壁的一部分，包括平行于设置在半导体基板上方的多个栅电极的沟道方向的侧面。该方法可以包括形成穿过用作栅电极的导电膜的第一隔离槽，以到达半导体衬底。该方法可以包括形成覆盖包括栅电极的侧面的第一隔离槽的侧壁的保护膜。该方法可以包括通过蚀刻暴露于第一隔离槽的底表面的半导体衬底来形成第二隔离槽。该方法可以包括氧化设置在栅电极的两侧的每一侧上的第二隔离槽的内表面，以形成第一绝缘膜，它们彼此连接在栅极下方。此外，该方法可以包括用第二绝缘膜填充第一隔离槽的内部和第二隔离槽的内部。

48. 发明申请

US20120007163A1 NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件
公开(公告)号：US20120007163A1
公开(公告)日：2012-01-12
申请号：US13052531
申请日：2011-03-21
申请人： Hiroshi Akahori , Kiyohito Nishihara , Masaki Kondo , Yingkang Zhang , Shigeo Kondo , Hidenobu Nagashima , Kazuaki Iwasawa , Takashi Ichikawa
发明人： Hiroshi Akahori , Kiyohito Nishihara , Masaki Kondo , Yingkang Zhang , Shigeo Kondo , Hidenobu Nagashima , Kazuaki Iwasawa , Takashi Ichikawa
IPC分类号： H01L29/788
CPC分类号： H01L29/7883 , H01L27/11521
摘要： According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.
摘要翻译：根据一个实施例，非易失性存储器件包括衬底，第一和第二隧道绝缘膜，第一和第二浮栅电极，栅间绝缘膜和控制栅电极。衬底具有通过元件隔离沟槽彼此隔离的第一和第二有源区。第一和第二隧道绝缘膜分别位于第一和第二有源区中。第一和第二浮栅电极分别位于第一和第二隧道绝缘膜上。隔间绝缘膜包括第一绝缘材料的第一绝缘层，第一绝缘层上的第二绝缘材料的电子陷阱层和电子陷阱层上的第一绝缘材料的第二绝缘层。控制栅电极位于隔间绝缘膜上。

49. 发明授权

US07928496B2 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07928496B2
公开(公告)日：2011-04-19
申请号：US11808147
申请日：2007-06-07
申请人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
发明人： Wakako Takeuchi , Hiroshi Akahori , Atsuhiro Sato
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/513 , H01L29/7881
摘要： A nonvolatile semiconductor memory device having high charge retention characteristics and capable of improving leakage characteristics of a dielectric film disposed between a charge storage layer and a control gate electrode, and manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor memory device comprising a first electrode disposed on a first insulator on a semiconductor substrate, a second insulator disposed on the first electrode, a second electrode disposed on the second insulator, and diffusion layers disposed in the semiconductor substrate, wherein the second insulator including a silicon-rich silicon nitride film containing more silicon than that in a stoichiometric silicon nitride film, and a silicon oxide film formed on the silicon-rich silicon nitride film, and wherein the silicon-rich silicon nitride film has a ratio of a silicon concentration and a nitrogen concentration set to 1:0.9 to 1:1.2.
摘要翻译：公开了一种具有高电荷保持特性并且能够改善设置在电荷存储层和控制栅电极之间的电介质膜的漏电特性的非易失性半导体存储器件及其制造方法。根据一个方面，提供了一种半导体存储器件，包括设置在半导体衬底上的第一绝缘体上的第一电极，设置在第一电极上的第二绝缘体，设置在第二绝缘体上的第二电极和设置在第二绝缘体上的扩散层半导体衬底，其中包括比在化学计量的氮化硅膜中含有更多的硅的富含硅的氮化硅膜的第二绝缘体和形成在富硅氮化硅膜上的氧化硅膜，并且其中富硅氮化硅膜的硅浓度和氮浓度的比率设定为1:0.9至1:1.2。

50. 发明申请

US20100184275A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20100184275A1
公开(公告)日：2010-07-22
申请号：US12659482
申请日：2010-03-10
申请人： Wakako Takeuchi , Hiroshi Akahori , Murato Kawai
发明人： Wakako Takeuchi , Hiroshi Akahori , Murato Kawai
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L27/115 , H01L27/11521 , H01L29/7881
摘要： A semiconductor device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a charge storage layer provided on the first insulating film, a second insulating film comprising a plurality of insulating films provided on the charge storage layer and comprising a nitride film as an uppermost layer, and a single-layer control gate electrode provided on the second insulating film and comprising metal silicide.
摘要翻译：半导体器件包括半导体衬底，设置在半导体衬底上的第一绝缘膜，设置在第一绝缘膜上的电荷存储层，第二绝缘膜，包括设置在电荷存储层上的多个绝缘膜，并且包括氮化物膜以及设置在第二绝缘膜上并且包括金属硅化物的单层控制栅电极。

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