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    • 1. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THE SAME
    • 半导体存储器件及其制造方法
    • US20130248804A1
    • 2013-09-26
    • US13601353
    • 2012-08-31
    • Murato KAWAI
    • Murato KAWAI
    • H01L45/00
    • H01L45/1253H01L27/2409H01L27/2481H01L45/04H01L45/1233H01L45/1608H01L45/1675
    • A semiconductor storage device according to an embodiment includes a first conductive layer, a variable resistance layer, an electrode layer, a first liner layer, a stopper layer, and a second conductive layer. The variable resistance layer is provided above the first conductive layer. The electrode layer contacts an upper surface of the variable resistance layer. The first liner layer contacts the upper surface of the electrode layer. The stopper layer contacts the upper surface of the first liner layer. The second conductive layer is provided above the stopper layer. The first liner layer is made of a material having a property for canceling an influence of an orientation of a lower layer of the first liner layer, the property of the first liner layer being superior compared with that of the stopper layer.
    • 根据实施例的半导体存储装置包括第一导电层,可变电阻层,电极层,第一衬里层,阻挡层和第二导电层。 可变电阻层设置在第一导电层的上方。 电极层与可变电阻层的上表面接触。 第一衬垫层接触电极层的上表面。 止动层接触第一衬里层的上表面。 第二导电层设置在阻挡层上方。 第一衬里层由具有用于抵消第一衬里层的下层的取向的影响的性质的材料制成,与阻挡层相比,第一衬里层的性质优异。
    • 3. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF
    • 半导体存储器件及其制造方法
    • US20120211721A1
    • 2012-08-23
    • US13402058
    • 2012-02-22
    • Murato Kawai
    • Murato Kawai
    • H01L45/00H01L21/8239
    • H01L45/1675H01L27/2409H01L27/2463H01L45/085H01L45/1233
    • A method of manufacturing a semiconductor storage device according to an embodiment includes: stacking a first wiring layer; stacking a memory cell layer on the first wiring layer; and stacking a stopper film on the memory cell layer. The method of manufacturing a semiconductor storage device also includes: etching the stopper film, the memory cell layer, and the first wiring layer; polishing an interlayer insulating film to the stopper film after burying the stopper film, the memory cell layer, and the first wiring layer with the interlayer insulating film; performing a nitridation process to the stopper film and the interlayer insulating film to form an adjustment film and a block film on surfaces of the stopper film and the interlayer insulating film, respectively; and forming a second wiring layer on the adjustment film, the second wiring layer being electrically connected to the adjustment film.
    • 根据实施例的半导体存储装置的制造方法包括:堆叠第一布线层; 在第一布线层上堆叠存储单元层; 并在所述存储单元层上层叠阻挡膜。 制造半导体存储装置的方法还包括:蚀刻阻挡膜,存储单元层和第一布线层; 在用所述层间绝缘膜掩埋所述阻挡膜,所述存储单元层和所述第一布线层之后,向所述阻挡膜抛光层间绝缘膜; 对阻挡膜和层间绝缘膜进行氮化处理,分别在阻挡膜和层间绝缘膜的表面上形成调整膜和阻挡膜; 以及在所述调整膜上形成第二布线层,所述第二布线层电连接到所述调整膜。
    • 6. 发明授权
    • Semiconductor storage device and manufacturing method the same
    • 半导体存储装置及其制造方法相同
    • US09018611B2
    • 2015-04-28
    • US13601353
    • 2012-08-31
    • Murato Kawai
    • Murato Kawai
    • H01L29/02H01L45/00H01L27/24
    • H01L45/1253H01L27/2409H01L27/2481H01L45/04H01L45/1233H01L45/1608H01L45/1675
    • A semiconductor storage device according to an embodiment includes a first conductive layer, a variable resistance layer, an electrode layer, a first liner layer, a stopper layer, and a second conductive layer. The variable resistance layer is provided above the first conductive layer. The electrode layer contacts an upper surface of the variable resistance layer. The first liner layer contacts the upper surface of the electrode layer. The stopper layer contacts the upper surface of the first liner layer. The second conductive layer is provided above the stopper layer. The first liner layer is made of a material having a property for canceling an influence of an orientation of a lower layer of the first liner layer, the property of the first liner layer being superior compared with that of the stopper layer.
    • 根据实施例的半导体存储装置包括第一导电层,可变电阻层,电极层,第一衬里层,阻挡层和第二导电层。 可变电阻层设置在第一导电层的上方。 电极层与可变电阻层的上表面接触。 第一衬垫层接触电极层的上表面。 止动层接触第一衬里层的上表面。 第二导电层设置在阻挡层上方。 第一衬里层由具有用于抵消第一衬里层的下层的取向的影响的性质的材料制成,与阻挡层相比,第一衬里层的性质优异。
    • 7. 发明授权
    • Semiconductor storage device comprising a memory cell array including a rectifying element and a variable resistor
    • 半导体存储装置包括包括整流元件和可变电阻器的存储单元阵列
    • US08772754B2
    • 2014-07-08
    • US13402058
    • 2012-02-22
    • Murato Kawai
    • Murato Kawai
    • H01L29/06
    • H01L45/1675H01L27/2409H01L27/2463H01L45/085H01L45/1233
    • A method of manufacturing a semiconductor storage device according to an embodiment includes: stacking a first wiring layer; stacking a memory cell layer on the first wiring layer; and stacking a stopper film on the memory cell layer. The method of manufacturing a semiconductor storage device also includes: etching the stopper film, the memory cell layer, and the first wiring layer; polishing an interlayer insulating film to the stopper film after burying the stopper film, the memory cell layer, and the first wiring layer with the interlayer insulating film; performing a nitridation process to the stopper film and the interlayer insulating film to form an adjustment film and a block film on surfaces of the stopper film and the interlayer insulating film, respectively; and forming a second wiring layer on the adjustment film, the second wiring layer being electrically connected to the adjustment film.
    • 根据实施例的半导体存储装置的制造方法包括:堆叠第一布线层; 在第一布线层上堆叠存储单元层; 并在所述存储单元层上层叠阻挡膜。 制造半导体存储装置的方法还包括:蚀刻阻挡膜,存储单元层和第一布线层; 在用所述层间绝缘膜掩埋所述阻挡膜,所述存储单元层和所述第一布线层之后,向所述阻挡膜抛光层间绝缘膜; 对阻挡膜和层间绝缘膜进行氮化处理,分别在阻挡膜和层间绝缘膜的表面上形成调整膜和阻挡膜; 以及在所述调整膜上形成第二布线层,所述第二布线层电连接到所述调整膜。