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41. 发明申请

US20110062579A1 GROUP III NITRIDE BASED FLIP-CHIP INTEGRATED CIRCUIT AND METHOD FOR FABRICATING 有权
标题翻译：基于III类氮化物的片式芯片集成电路及其制造方法
公开(公告)号：US20110062579A1
公开(公告)日：2011-03-17
申请号：US12951372
申请日：2010-11-22
申请人： UMESH MISHRA , Primit Parikh , Yifeng Wu
发明人： UMESH MISHRA , Primit Parikh , Yifeng Wu
IPC分类号： H01L23/538 , H01L23/34 , H01L21/50
CPC分类号： H05K1/0206 , H01L21/8252 , H01L23/147 , H01L23/367 , H01L23/3677 , H01L23/66 , H01L27/0605 , H01L29/2003 , H01L29/7787 , H01L2224/16235 , H01L2224/16238 , H01L2224/1703 , H01L2224/73253 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01042 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/10329 , H01L2924/12032 , H01L2924/14 , H01L2924/1423 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/30105 , H05K1/181 , H05K2201/066 , Y10T29/4913 , H01L2924/0002 , H01L2924/00
摘要： A circuit substrate has one or more active components and a plurality of passive circuit elements on a first surface. An active semiconductor device has a substrate with layers of material and a plurality of terminals. The active semiconductor device is flip-chip mounted on the circuit substrate and at least one of the terminals of the device is electrically connected to an active component on the circuit substrate. The active components on the substrate and the flip-chip mounted active semiconductor device, in combination with passive circuit elements, form preamplifiers and an output amplifier respectively. In a power switching configuration, the circuit substrate has logic control circuits on a first surface. A semiconductor transistor flip-chip mounted on the circuit substrate is electrically connected to the control circuits on the first surface to thereby control the on and off switching of the flip-chip mounted device.
摘要翻译：电路基板在第一表面上具有一个或多个有源部件和多个无源电路元件。有源半导体器件具有材料层和多个端子的衬底。有源半导体器件被倒装芯片安装在电路基板上，并且器件的至少一个端子与电路基板上的有源元件电连接。基板上的有源元件和安装有倒装芯片的有源半导体器件与无源电路元件组合形成前置放大器和输出放大器。在电源开关配置中，电路基板在第一表面上具有逻辑控制电路。安装在电路基板上的半导体晶体管倒装芯片电连接到第一表面上的控制电路，从而控制倒装芯片安装器件的接通和断开。

42. 发明申请

US20080116492A1 High voltage GaN transistors 有权
标题翻译：高压GaN晶体管
公开(公告)号：US20080116492A1
公开(公告)日：2008-05-22
申请号：US11603427
申请日：2006-11-21
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra
IPC分类号： H01L29/76
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/66462 , H01L29/7786
摘要： A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 mΩ-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 mΩ-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.6 mΩ-cm2, or a blocking voltage of at least 900 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 7.0 mΩ-cm2.
摘要翻译：多场板晶体管包括有源区，源极，漏极和栅极。第一间隔层在源极和栅极之间的有源区上方，并且在漏极和栅极之间的有源区上方具有第二间隔层。第一间隔层上的第一场板连接到栅极。第二间隔层上的第二场板连接到栅极。第三间隔层位于第一间隔层，第二间隔层，第一场板，栅极和第二场板上，在第三间隔层上具有第三场板并连接到源极。晶体管表现出至少600伏特的阻断电压，同时支持至少2安培的电流，导通电阻不超过5.0mOmega-cm 2，至少为600伏特，同时支持电流至少3安培，其导通电阻不超过5.3mOmega-cm 2，至少900V，同时支持至少2安培的电流，导通电阻不超过6.6mOmega 或至少900伏特的阻断电压，同时支持至少3安培的电流，导通电阻不大于7.0mOmega-cm 2。

43. 发明申请

US20050253167A1 Wide bandgap field effect transistors with source connected field plates 有权
标题翻译：宽带隙场效应晶体管，源极连接场板
公开(公告)号：US20050253167A1
公开(公告)日：2005-11-17
申请号：US10958945
申请日：2004-10-04
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
IPC分类号： H01L29/06 , H01L29/20 , H01L29/40 , H01L29/41 , H01L29/417 , H01L29/812 , H01L31/0328
CPC分类号： H01L29/402 , H01L29/2003 , H01L29/41725 , H01L29/42316 , H01L29/812
摘要： A field effect transistor comprising a buffer and channel layer formed successively on a substrate. A source electrode, drain electrode, and gate are all formed in electrical contact with the channel layer, with the gate between the source and drain electrodes. A spacer layer is formed on at least a portion of a surface of the channel layer between the gate and drain electrode and a field plate is formed on the spacer layer isolated from the gate and channel layer. The spacer layer is electrically connected by at least one conductive path to the source electrode, wherein the field plate reduces the peak operating electric field in the MESFET.
摘要翻译：一种场效应晶体管，包括在衬底上连续形成的缓冲层和沟道层。源电极，漏电极和栅极都形成为与沟道层电接触，源极和漏极之间的栅极。在栅极和漏极之间的沟道层的表面的至少一部分上形成间隔层，并且在与栅极和沟道层隔离的间隔层上形成场板。间隔层通过至少一个导电路径电连接到源电极，其中场板减小MESFET中的峰值工作电场。

44. 发明申请

US20050067716A1 Group III nitride based flip-chip integrated circuit and method for fabricating 有权
标题翻译： III族氮化物倒装芯片集成电路及其制造方法
公开(公告)号：US20050067716A1
公开(公告)日：2005-03-31
申请号：US10977165
申请日：2004-10-29
申请人： Umesh Mishra , Primit Parikh , Yifeng Wu
发明人： Umesh Mishra , Primit Parikh , Yifeng Wu
IPC分类号： H01L21/8252 , H01L23/14 , H01L23/367 , H01L23/66 , H01L27/06 , H01L29/20 , H01L29/778 , H01L23/48
CPC分类号： H05K1/0206 , H01L21/8252 , H01L23/147 , H01L23/367 , H01L23/3677 , H01L23/66 , H01L27/0605 , H01L29/2003 , H01L29/7787 , H01L2224/16235 , H01L2224/16238 , H01L2224/1703 , H01L2224/73253 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01042 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/10329 , H01L2924/12032 , H01L2924/14 , H01L2924/1423 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/30105 , H05K1/181 , H05K2201/066 , Y10T29/4913 , H01L2924/0002 , H01L2924/00
摘要： A circuit substrate has one or more active components and a plurality of passive circuit elements on a first surface. An active semiconductor device has a substrate with layers of material and a plurality of terminals. The active semiconductor device is flip-chip mounted on the circuit substrate and at least one of the terminals of the device is electrically connected to an active component on the circuit substrate. The active components on the substrate and the flip-chip mounted active semiconductor device, in combination with passive circuit elements, form preamplifiers and an output amplifier respectively. In a power switching configuration, the circuit substrate has logic control circuits on a first surface. A semiconductor transistor flip-chip mounted on the circuit substrate is electrically connected to the control circuits on the first surface to thereby control the on and off switching of the flip-chip mounted device.
摘要翻译：电路基板在第一表面上具有一个或多个有源部件和多个无源电路元件。有源半导体器件具有材料层和多个端子的衬底。有源半导体器件被倒装芯片安装在电路基板上，并且器件的至少一个端子与电路基板上的有源元件电连接。基板上的有源元件和安装有倒装芯片的有源半导体器件与无源电路元件组合形成前置放大器和输出放大器。在电源开关配置中，电路基板在第一表面上具有逻辑控制电路。安装在电路基板上的半导体晶体管倒装芯片电连接到第一表面上的控制电路，从而控制倒装芯片安装器件的接通和断开。

45. 发明授权

US11791385B2 Wide bandgap transistors with gate-source field plates 有权
公开(公告)号：US11791385B2
公开(公告)日：2023-10-17
申请号：US11078265
申请日：2005-03-11
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra , Scott Sheppard
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra , Scott Sheppard
IPC分类号： H01L29/40 , H01L29/778 , H01L29/20
CPC分类号： H01L29/402 , H01L29/404 , H01L29/7787 , H01L29/2003
摘要： A transistor comprising an active region having a channel layer, with source and drain electrodes formed in contact with the active region and a gate formed between the source and drain electrodes and in contact with the active region. A spacer layer is on at least part of the surface of the plurality of active region between the gate and the drain electrode and between the gate and the source electrode. A field plate is on the spacer layer and extends on the spacer and over the active region toward the drain electrode. The field plate also extends on the spacer layer over the active region and toward the source electrode. At least one conductive path electrically connects the field plate to the source electrode or the gate.

46. 发明授权

US07915644B2 Wide bandgap HEMTs with source connected field plates 有权
标题翻译：宽带隙HEMT与源连接的现场板
公开(公告)号：US07915644B2
公开(公告)日：2011-03-29
申请号：US12437505
申请日：2009-05-07
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra , Marcia Moore
IPC分类号： H01L29/66 , H01L29/02
CPC分类号： H01L29/402 , H01L29/2003 , H01L29/41725 , H01L29/42316 , H01L29/7787
摘要： A HEMT comprising an active region comprising a plurality of active semiconductor layers formed on a substrate. Source electrode, drain electrode, and gate are formed in electrical contact with the active region. A spacer layer is formed on at least a portion of a surface of said active region and covering the gate. A field plate is formed on the spacer layer and electrically connected to the source electrode, wherein the field plate reduces the peak operating electric field in the HEMT.
摘要翻译：一种HEMT，其包括有源区，该有源区包括在基板上形成的多个有源半导体层。源电极，漏电极和栅极形成为与有源区电接触。间隔层形成在所述有源区域的表面的至少一部分上并覆盖栅极。在间隔层上形成场板，并与源电极电连接，其中场板减小HEMT中的峰值工作电场。

47. 发明授权

US07898004B2 Semiconductor heterostructure diodes 有权
标题翻译：半导体异质结二极管
公开(公告)号：US07898004B2
公开(公告)日：2011-03-01
申请号：US12332284
申请日：2008-12-10
申请人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
发明人： Yifeng Wu , Umesh Mishra , Primit Parikh , Rongming Chu , Ilan Ben-Yaacov , Likun Shen
IPC分类号： H01L29/739 , H01L33/00
CPC分类号： H01L29/0615 , H01L27/0629 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/778 , H01L29/7786 , H01L29/7787 , H01L29/872
摘要： Planar Schottky diodes for which the semiconductor material includes a heterojunction which induces a 2DEG in at least one of the semiconductor layers. A metal anode contact is on top of the upper semiconductor layer and forms a Schottky contact with that layer. A metal cathode contact is connected to the 2DEG, forming an ohmic contact with the layer containing the 2DEG.
摘要翻译：平面肖特基二极管，其半导体材料包括在至少一个半导体层中诱导2DEG的异质结。金属阳极触点位于上半导体层的顶部，与该层形成肖特基接触。金属阴极接触件连接到2DEG，与包含2DEG的层形成欧姆接触。

48. 发明授权

US07893500B2 High voltage GaN transistors 有权
标题翻译：高压GaN晶体管
公开(公告)号：US07893500B2
公开(公告)日：2011-02-22
申请号：US12636019
申请日：2009-12-11
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra
IPC分类号： H01L29/66
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/66462 , H01L29/7786
摘要： A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 mΩ-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 mΩ-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.6 mΩ-cm2, or a blocking voltage of at least 900 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 7.0 mΩ-cm2.
摘要翻译：多场板晶体管包括有源区，源极，漏极和栅极。第一间隔层在源极和栅极之间的有源区上方，并且在漏极和栅极之间的有源区上方具有第二间隔层。第一间隔层上的第一场板连接到栅极。第二间隔层上的第二场板连接到栅极。第三间隔层位于第一间隔层，第二间隔层，第一场板，栅极和第二场板上，在第三间隔层上具有第三场板并连接到源极。晶体管表现出至少600伏特的阻断电压，同时支持至少2安培的电流，其导通电阻不超过5.0mΩ（OHgr·-cm2）为至少600伏，同时支持至少3安培的电流耐电压不超过5.3mΩ，OHgr--cm2，至少900V，同时支持至少2安培的电流，导通电阻不超过6.6mΩ，OHgr-cm2，或阻断电压至少为900V，同时支持至少3安培的电流，导通电阻不超过7.0mΩ，OHgr; -cm2。

49. 发明授权

US07851909B2 Group III nitride based flip-chip integrated circuit and method for fabricating 有权
标题翻译： III族氮化物倒装芯片集成电路及其制造方法
公开(公告)号：US07851909B2
公开(公告)日：2010-12-14
申请号：US10977165
申请日：2004-10-29
申请人： Umesh Mishra , Primit Parikh , Yifeng Wu
发明人： Umesh Mishra , Primit Parikh , Yifeng Wu
IPC分类号： H01L23/34 , H01L23/48
CPC分类号： H05K1/0206 , H01L21/8252 , H01L23/147 , H01L23/367 , H01L23/3677 , H01L23/66 , H01L27/0605 , H01L29/2003 , H01L29/7787 , H01L2224/16235 , H01L2224/16238 , H01L2224/1703 , H01L2224/73253 , H01L2924/01002 , H01L2924/01004 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01042 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/10329 , H01L2924/12032 , H01L2924/14 , H01L2924/1423 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/30105 , H05K1/181 , H05K2201/066 , Y10T29/4913 , H01L2924/0002 , H01L2924/00
摘要： A circuit substrate has one or more active components and a plurality of passive circuit elements on a first surface. An active semiconductor device has a substrate with layers of material and a plurality of terminals. The active semiconductor device is flip-chip mounted on the circuit substrate and at least one of the terminals of the device is electrically connected to an active component on the circuit substrate. The active components on the substrate and the flip-chip mounted active semiconductor device, in combination with passive circuit elements, form preamplifiers and an output amplifier respectively. In a power switching configuration, the circuit substrate has logic control circuits on a first surface. A semiconductor transistor flip-chip mounted on the circuit substrate is electrically connected to the control circuits on the first surface to thereby control the on and off switching of the flip-chip mounted device.
摘要翻译：电路基板在第一表面上具有一个或多个有源部件和多个无源电路元件。有源半导体器件具有材料层和多个端子的衬底。有源半导体器件被倒装芯片安装在电路基板上，并且器件的至少一个端子与电路基板上的有源元件电连接。基板上的有源元件和安装有倒装芯片的有源半导体器件与无源电路元件组合形成前置放大器和输出放大器。在电源开关配置中，电路基板在第一表面上具有逻辑控制电路。安装在电路基板上的半导体晶体管倒装芯片电连接到第一表面上的控制电路，从而控制倒装芯片安装器件的接通和断开。

50. 发明申请

US20100109051A1 HIGH VOLTAGE GAN TRANSISTORS 有权
标题翻译：高电压晶体管
公开(公告)号：US20100109051A1
公开(公告)日：2010-05-06
申请号：US12636019
申请日：2009-12-11
申请人： YIFENG WU , Primit Parikh , Umesh Mishra
发明人： YIFENG WU , Primit Parikh , Umesh Mishra
IPC分类号： H01L29/778 , H01L29/80
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/66462 , H01L29/7786
摘要： A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 mΩ-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 mΩ-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.6 mΩ-cm2, or a blocking voltage of at least 900 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 7.0 mΩ-cm2.
摘要翻译：多场板晶体管包括有源区，源极，漏极和栅极。第一间隔层在源极和栅极之间的有源区上方，并且在漏极和栅极之间的有源区上方具有第二间隔层。第一间隔层上的第一场板连接到栅极。第二间隔层上的第二场板连接到栅极。第三间隔层位于第一间隔层，第二间隔层，第一场板，栅极和第二场板上，在第三间隔层上具有第三场板并连接到源极。晶体管表现出至少600伏特的阻断电压，同时支持至少2安培的电流，其导通电阻不超过5.0mΩ（OHgr·-cm2）为至少600伏，同时支持至少3安培的电流耐电压不超过5.3mΩ，OHgr--cm2，至少900V，同时支持至少2安培的电流，导通电阻不超过6.6mΩ，OHgr-cm2，或阻断电压至少为900V，同时支持至少3安培的电流，导通电阻不超过7.0mΩ，OHgr; -cm2。

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