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41. 发明授权

US06894334B2 Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same 失效
标题翻译：半导体集成电路装置及其制造方法及其制造装置
公开(公告)号：US06894334B2
公开(公告)日：2005-05-17
申请号：US10376329
申请日：2003-03-03
申请人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
发明人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
IPC分类号： G03F7/20 , G03F9/00 , H01L21/02 , H01L21/285 , H01L21/336 , H01L21/76 , H01L21/768 , H01L21/8238 , H01L21/8242 , H01L23/29 , H01L23/495 , H01L23/525 , H01L23/532 , H01L23/544 , H01L27/092 , H01L27/10 , H01L27/108 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/10852 , G03F7/70333 , G03F9/70 , H01L21/28512 , H01L21/76 , H01L21/76801 , H01L21/76804 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76843 , H01L21/76877 , H01L21/823807 , H01L23/291 , H01L23/4951 , H01L23/5258 , H01L23/532 , H01L23/544 , H01L24/45 , H01L24/48 , H01L27/0922 , H01L27/0928 , H01L27/10808 , H01L28/40 , H01L2223/54473 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01029 , H01L2924/01039 , H01L2924/01079 , H01L2924/04941 , H01L2924/12036 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , Y10S257/90 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.
摘要翻译：这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，包括：形成步骤通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤，面具已被删除。

42. 发明申请

US20050014003A1 Thermoplastic resin composition and production method thereof 有权
标题翻译：热塑性树脂组合物及其制备方法
公开(公告)号：US20050014003A1
公开(公告)日：2005-01-20
申请号：US10617664
申请日：2003-07-14
申请人： Seiji Takei , Masahiro Osuka , Hideo Aoki , Mari Sekita , Masaaki Mouri
发明人： Seiji Takei , Masahiro Osuka , Hideo Aoki , Mari Sekita , Masaaki Mouri
IPC分类号： B05D1/34 , B32B15/02 , B32B17/02 , C08F14/26 , C08K5/02 , C08L23/04
CPC分类号： C08F14/26 , C08L23/04 , Y10T428/25 , Y10T428/254 , Y10T428/2998 , C08F2/16 , C08L2666/06
摘要： The present invention provides a thermoplastic resin composition comprising a thermoplastic resin (A), an acrylic polymer (B), a polytetrafluoroethylene-containing powder mixture (C) and a filler (D), the amount of the acrylic polymer (B) being from 0.1 to 400 parts by weight, the amount of the filler (D) being from 1 to 2000 parts by weight, based on 100 parts by weight of the thermoplastic resin (A), and the amount of a polytetrafluoroethylene component in the polytetrafluoroethylene-containing powder mixture (C) is from 0.01 to 400 parts by weight based on 100 parts by weight of the thermoplastic resin (A).
摘要翻译：本发明提供一种包含热塑性树脂（A），丙烯酸类聚合物（B），含聚四氟乙烯的粉末混合物（C）和填料（D）的热塑性树脂组合物，丙烯酸类聚合物（B）的量来自相对于热塑性树脂（A）100重量份，含有聚四氟乙烯的聚四氟乙烯成分的含量为0.1〜400重量份，填料（D）的含量为1〜2000重量份粉末混合物（C）相对于热塑性树脂（A）100重量份为0.01〜400重量份。

43. 发明授权

US06742701B2 Bump forming method, presoldering treatment method, soldering method, bump forming apparatus, presoldering treatment device and soldering apparatus 失效
标题翻译：凸块成型方法，预焊处理方法，焊接方法，凸块成形装置，预焊处理装置和焊接装置
公开(公告)号：US06742701B2
公开(公告)日：2004-06-01
申请号：US10161566
申请日：2002-05-30
申请人： Masahiko Furuno , Tsugunori Masuda , Hideo Aoki , Kazuhide Doi
发明人： Masahiko Furuno , Tsugunori Masuda , Hideo Aoki , Kazuhide Doi
IPC分类号： B23K100
CPC分类号： H01L21/67138 , B23K1/206 , B23K2101/40 , H01L24/11 , H01L2224/05568 , H01L2224/05573 , H01L2224/1184 , H01L2224/13099 , H01L2224/45144 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01016 , H01L2924/01018 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01054 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/30107 , H05K3/3457 , H05K3/3489 , H05K3/3494 , H01L2924/00
摘要： Process gas is fed from a gas supply means to a plasma generating means in a vacuum chamber, and hydrogen-containing plasma is generated by the plasma generating means under a low pressure. A soft solder alloy on the surface of a workpiece supported by a workpiece exposing means is exposed to the hydrogen-containing plasma so that the soft solder alloy is irradiated with the hydrogen-containing plasma. Either simultaneously with or immediately after the plasma irradiation, the soft solder alloy undergoes reflow treatment in a vacuum by a heating means. As no flux is used, there is no need of a washing process, and the bump-shaped electrode terminals produced by using the inexpensive soft solder alloy on the surface of the workpiece have great reliability.
摘要翻译：处理气体从气体供给装置供给到真空室中的等离子体发生装置，并且在低压下由等离子体产生装置产生含氢等离子体。在由工件曝光装置支撑的工件的表面上的软焊料合金暴露于含氢等离子体，使得软焊合金被含氢等离子体照射。在等离子体照射之间或同时等离子体照射之后，软焊料合金通过加热装置在真空中进行回流处理。由于不使用助熔剂，因此不需要洗涤工序，通过在工件表面使用廉价的软焊料合金制成的凸点电极端子具有很高的可靠性。

44. 发明授权

US06638811B2 Method of manufacturing a semiconductor integrated circuit device having a capacitor 有权
标题翻译：具有电容器的半导体集成电路器件的制造方法
公开(公告)号：US06638811B2
公开(公告)日：2003-10-28
申请号：US10157977
申请日：2002-05-31
申请人： Masayoshi Saito , Yoshitaka Nakamura , Hidekazu Goto , Keizo Kawakita , Satoru Yamada , Toshihiro Sekiguchi , Isamu Asano , Yoshitaka Tadaki , Takuya Fukuda , Masayuki Suzuki , Tsuyoshi Tamaru , Naoki Fukuda , Hideo Aoki , Masayoshi Hirasawa
发明人： Masayoshi Saito , Yoshitaka Nakamura , Hidekazu Goto , Keizo Kawakita , Satoru Yamada , Toshihiro Sekiguchi , Isamu Asano , Yoshitaka Tadaki , Takuya Fukuda , Masayuki Suzuki , Tsuyoshi Tamaru , Naoki Fukuda , Hideo Aoki , Masayoshi Hirasawa
IPC分类号： H01L218242
CPC分类号： H01L21/76855 , H01L21/28518 , H01L21/31604 , H01L21/76801 , H01L21/76828 , H01L21/76837 , H01L21/76843 , H01L21/76856 , H01L21/7687 , H01L27/10814 , H01L27/10885 , H01L27/10894 , H01L28/40
摘要： In a DRAM having a capacitor-over-bitline structure in which the capacitive insulating film of an information storing capacitive element C is formed of a high dielectric material such as Ta2O5 (tantalum oxide) film 46, the portions of bit lines BL and first-layer interconnect lines 23 to 26 of a peripheral circuit which are in contact with at least an underlying silicon oxide film 28 are formed of a W film, the bit lines BL and the interconnect lines 23 to 26 being arranged below the information storing capacitive element C, whereby the adhesion at the interface between the bit lines BL and the interconnect lines 23 to 26 and the silicon oxide film is improved in terms of high-temperature heat treatment to be performed when the capacitive insulating film is being formed.
摘要翻译：在具有电容器的位线结构的DRAM中，信息存储电容元件C的电容绝缘膜由诸如Ta 2 O 5（氧化钽）膜46的高电介质材料形成，位线BL和第一 - 与W膜形成的与外部电路至少底层的氧化硅膜28接触的层间布线23〜26，位线BL和布线23〜26配置在信息存储电容元件C的下方从而在形成电容绝缘膜时进行的高温热处理方面提高了位线BL与布线23〜26之间界面处的粘附性和氧化硅膜。

45. 发明授权

US06555464B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US06555464B2
公开(公告)日：2003-04-29
申请号：US10046814
申请日：2002-01-17
申请人： Shinichi Fukada , Kazuo Nojiri , Takashi Yunogami , Shoji Hotta , Hideo Aoki , Takayuki Oshima , Nobuyoshi Kobayashi
发明人： Shinichi Fukada , Kazuo Nojiri , Takashi Yunogami , Shoji Hotta , Hideo Aoki , Takayuki Oshima , Nobuyoshi Kobayashi
IPC分类号： H01L214763
CPC分类号： H01L21/76874 , H01L21/76804 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76843 , H01L21/76873 , H01L23/53238 , H01L2221/1036 , H01L2924/0002 , H01L2924/00
摘要： Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.

46. 发明授权

US06548847B2 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A FIRST WIRING STRIP EXPOSED THROUGH A CONNECTING HOLE, A TRANSITION-METAL FILM IN THE CONNECTING HOLE AND AN ALUMINUM WIRING STRIP THEREOVER, AND A TRANSITION-METAL NITRIDE FILM BETWEEN THE ALUMINUM WIRING STRIP AND THE TRANSITION-METAL FILM 失效
标题翻译：具有通过连接孔暴露的第一布线的半导体集成电路器件，连接孔中的过渡金属膜和铝导线之间的过渡金属膜以及铝导线和过渡金属膜之间的过渡金属氮化物膜
公开(公告)号：US06548847B2
公开(公告)日：2003-04-15
申请号：US09899921
申请日：2001-07-09
申请人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
发明人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
IPC分类号： H01L2976
CPC分类号： H01L27/10852 , G03F7/70333 , G03F9/70 , H01L21/28512 , H01L21/76 , H01L21/76801 , H01L21/76804 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76843 , H01L21/76877 , H01L21/823807 , H01L23/291 , H01L23/4951 , H01L23/5258 , H01L23/532 , H01L23/544 , H01L24/45 , H01L24/48 , H01L27/0922 , H01L27/0928 , H01L27/10808 , H01L28/40 , H01L2223/54473 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01029 , H01L2924/01039 , H01L2924/01079 , H01L2924/04941 , H01L2924/12036 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , Y10S257/90 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.
摘要翻译：这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，其包括：形成步骤通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤，面具已被删除。

47. 发明授权

US5932142A Benzotriazolyl-alkylene bisphenol compounds, process for their preparation, and stabilized organic materials containing them 失效
标题翻译：苯并三唑基 - 亚烷基双酚化合物，其制备方法和含有它们的稳定的有机材料
公开(公告)号：US5932142A
公开(公告)日：1999-08-03
申请号：US986797
申请日：1997-12-08
申请人： Toshiyuki Yamauchi , Eisuke Kanagawa , Hideo Aoki , Kazuyuki Ishihara
发明人： Toshiyuki Yamauchi , Eisuke Kanagawa , Hideo Aoki , Kazuyuki Ishihara
IPC分类号： C07D249/20 , C08K5/3475 , C08L101/00 , C09K15/30 , C09K15/08 , C09K15/16 , C09K15/24
CPC分类号： C08K5/3475 , C07D249/20
摘要： A process for preparing benzotriazolyl-alkylene bisphenol compounds which comprises reacting a 2-hydroxyphenylbenzotriazole and a 2,4-substituted phenol with an aldehyde in the presence of a basic catalyst and an amine compound; benzotriazolyl-alkylene bisphenol compounds obtained by the process; and stabilized organic materials containing the resulting benzotriazolyl-alkylene bisphenol compounds in an amount of 0.01-10 percent by weight. It is possible to prepare the benzotriazolyl-alkylene bisphenol compounds at a high yield, and organic materials can be effectively stabilized with the resulting compounds.
摘要翻译：一种制备苯并三唑基 - 亚烷基双酚化合物的方法，包括在碱性催化剂和胺化合物的存在下使2-羟基苯基苯并三唑和2,4-取代的苯酚与醛反应; 通过该方法获得的苯并三唑基 - 亚烷基双酚化合物; 和含有所得到的苯并三唑基 - 亚烷基双酚化合物的稳定的有机材料的量为0.01-10重量％。可以以高产率制备苯并三唑基 - 亚烷基双酚化合物，并且可以用所得化合物有效地稳定有机材料。

48. 发明授权

US5628111A Methods of fabricating of semiconductor package and mounting of semiconductor device 失效
标题翻译：制造半导体封装的方法和半导体器件的安装
公开(公告)号：US5628111A
公开(公告)日：1997-05-13
申请号：US396236
申请日：1995-03-01
申请人： Hiroshi Iwasaki , Hideo Aoki
发明人： Hiroshi Iwasaki , Hideo Aoki
IPC分类号： H01L21/60 , H01L21/56 , H01L21/58 , H01L23/02 , H05K3/30
CPC分类号： H01L24/83 , H01L24/29 , H01L24/75 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/7565 , H01L2224/75755 , H01L2224/83102 , H01L2224/8319 , H01L2224/8385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01039 , H01L2924/0665 , H01L2924/07802 , H01L2924/3025 , Y10T29/49146 , Y10T29/53178
摘要： A method of fabricating a semiconductor package comprising the steps of setting a semiconductor chip having a pad with protruding electrodes on an insulation board having a main surface on which a wiring circuit and connection terminals are formed and an other main surface on which flat-type external connecting terminals are formed, to align the protruding electrodes of the semiconductor chip with the connection terminals of the insulating board, wherein the insulating board is installed on a pressing stage, pressing the semiconductor chip onto the insulation board to connect the protruding electrodes to the connection terminals, clamping the semiconductor chip and the insulation board by clamping means to form a clamped unit which keeps the pressure on the semiconductor chip and the insulation board, transferring the clamped unit from the pressing stage to a resin supplying stage, supplying a sealing resin in a space formed between an upper surface of the circuit board and a lower surface of the semiconductor chip in the clamped unit, transferring the resin supplied unit from the resin supplying stage to a resin curing stage, curing the sealing resin filled in the space formed between the upper surface of the insulation board and the lower surface of the semiconductor chip in the clamped unit, and removing the clamping means from the clamped unit after the curing of the sealing resin is completed.
摘要翻译：一种制造半导体封装的方法，包括以下步骤：将具有突起电极的焊盘的半导体芯片设置在具有主表面的绝缘板上，在其上形成有布线电路和连接端子的主表面和在其上形成平坦型外部形成连接端子，以将半导体芯片的突出电极与绝缘板的连接端对准，其中绝缘板安装在加压台上，将半导体芯片按压到绝缘板上以将突出的电极连接到连接端子，通过夹持装置夹紧半导体芯片和绝缘板，以形成夹持单元，其保持半导体芯片和绝缘板上的压力，将夹紧单元从压制阶段转移到树脂供应阶段，将密封树脂供应到形成在电路板的上表面和下侧之间的空间将树脂供给单元从树脂供给台传递到树脂固化阶段，使填充在形成于绝缘板的上表面和半导体的下表面之间的空间中填充的密封树脂固化并且在密封树脂固化完成之后从夹紧单元移除夹紧装置。

49. 发明授权

US5168407A Flying magnetic head 失效
标题翻译：飞磁头
公开(公告)号：US5168407A
公开(公告)日：1992-12-01
申请号：US612935
申请日：1990-11-13
申请人： Tatsushi Shimizu , Hideo Aoki , Nobuo Imazeki
发明人： Tatsushi Shimizu , Hideo Aoki , Nobuo Imazeki
IPC分类号： G11B5/60
CPC分类号： G11B5/6005
摘要： A flying magnetic head is provided in which a head core, formed by laminating a magentic thin film on a non-magnetic substrate, is fitted into a slot formed in a slider through a bonding glass layer. The substrate of the head core and the slider are formed from the same material. The coefficient of thermal expansion of the head core substrate is substantially the same as that of the magnetic thin film. The thickness of the bonding glass layer which bonds the head core to the slider is reduced to 20 .mu.M or less.
摘要翻译：提供了一种飞行磁头，其中通过在非磁性基板上层叠磁性薄膜而形成的磁头芯通过粘合玻璃层装配到形成在滑块中的槽中。头芯和滑块的基板由相同的材料形成。头芯基板的热膨胀系数与磁性薄膜的热膨胀系数基本相同。将磁头芯与滑块结合的接合玻璃层的厚度减小到20μm以下。

50. 发明授权

US5121168A Image forming apparatus having a used toner storage portion 失效
标题翻译：图像形成装置具有使用过的调色剂储存部分
公开(公告)号：US5121168A
公开(公告)日：1992-06-09
申请号：US640908
申请日：1991-01-14
申请人： Hideo Aoki , Toshiro Sahashi
发明人： Hideo Aoki , Toshiro Sahashi
IPC分类号： G03G21/00 , G03G15/08 , G03G21/10
CPC分类号： G03G15/0822 , G03G21/105
摘要： In an image forming apparatus, a latent image on a photosensitive body is developed by a developing device and is transferred onto a sheet of paper and remaining toner on the photosensitive body is removed therefrom by a cleaner. The image forming apparatus has a used toner storing portion for collecting the removed remaining toner thereinto and integral with the developing container; a conveyor for conveying the removed remaining toner to the used toner storing portion; and a driving force transmitting device for connecting the conveyor to a rotary shaft of an agitator disposed in the developing device so as to transmit driving force therebetween. When the developing device is replaced by a new one, the used toner storing portion integral with this developing device is also replaced by a new one. The conveyor may have an auger and the driving force transmitting device may have pulleys for the agitator and the auger.
摘要翻译：在图像形成装置中，通过显影装置将感光体上的潜像显影并转印到一张纸上，并且通过清洁器将感光体上剩余的调色剂从其上除去。图像形成装置具有用于将去除的剩余调色剂收集并与显影容器成一体的用过的调色剂存储部分; 用于将去除的剩余调色剂输送到用过的调色剂存储部分的输送机; 以及用于将输送机连接到设置在显影装置中的搅拌器的旋转轴以便在其间传递驱动力的驱动力传递装置。当用新的显影装置代替显影装置时，与该显影装置一体的用过的调色剂存储部分也被新的更换。输送机可以具有螺旋推运器，并且驱动力传递装置可以具有用于搅拌器和螺旋钻的滑轮。

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