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41. 发明授权

US06391783B1 Method to thin down copper barriers in deep submicron geometries by using alkaline earth element, barrier additives, or self assembly technique 有权
标题翻译：通过使用碱土元素，阻隔添加剂或自组装技术在深亚微米几何图形中减薄铜屏障的方法
公开(公告)号：US06391783B1
公开(公告)日：2002-05-21
申请号：US09615811
申请日：2000-07-13
申请人： John Sudijono , Yakub Aliyu , Mei Sheng Zhou , Simon Chooi , Subhash Gupta , Sudipto Roy , Paul Ho , Yi Xu
发明人： John Sudijono , Yakub Aliyu , Mei Sheng Zhou , Simon Chooi , Subhash Gupta , Sudipto Roy , Paul Ho , Yi Xu
IPC分类号： H01L2131
CPC分类号： H01L21/76844 , H01L21/288 , H01L21/76867
摘要： A method of forming a metal plug, comprising the following steps. An etched dielectric layer, over a conductive layer, over a semiconductor structure are provided. The etched dielectric layer having a via hole and an exposed periphery. The etched dielectric layer is treated with at least one alkaline earth element source to form an in-situ metal barrier layer within the dielectric layer exposed periphery. A metal plug is formed within the via hole wherein the in-situ metal barrier layer prevents diffusion of the metal from the metal plug into the dielectric oxide layer.
摘要翻译：一种形成金属塞的方法，包括以下步骤。提供了在半导体结构之上的导电层上的蚀刻介电层。蚀刻的介电层具有通孔和暴露的周边。蚀刻的电介质层用至少一个碱土元素源处理，以在电介质层外露的外围形成原位金属阻挡层。在通孔内形成金属塞，其中原位金属阻挡层防止金属从金属塞扩散到电介质氧化物层中。

42. 发明授权

US06378759B1 Method of application of conductive cap-layer in flip-chip, COB, and micro metal bonding 有权
标题翻译：导电盖层在倒装芯片，COB和微金属接合中的应用方法
公开(公告)号：US06378759B1
公开(公告)日：2002-04-30
申请号：US09618261
申请日：2000-07-18
申请人： Kwok Keung Paul Ho , Simon Chooi , Yi Xu , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Subhash Gupta , Sudipto Ranendra Roy
发明人： Kwok Keung Paul Ho , Simon Chooi , Yi Xu , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Subhash Gupta , Sudipto Ranendra Roy
IPC分类号： B23K3102
CPC分类号： H01L24/85 , B23K20/007 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05073 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05184 , H01L2224/05187 , H01L2224/05624 , H01L2224/05647 , H01L2224/45124 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/85 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/04953 , H01L2224/78 , H01L2924/00
摘要： A method of bonding a bonding element to a metal bonding pad comprises the following steps. A semiconductor structure having an exposed, recessed metal bonding pad within a layer opening is provided. The layer has an upper surface. A conductive cap having a predetermined thickness is formed over the metal bonding pad. A bonding element is bonded to the conductive cap to form an electrical connection with the metal bonding pad.
摘要翻译：将接合元件接合到金属接合焊盘的方法包括以下步骤。提供了一种在层开口内具有暴露的凹陷金属接合焊盘的半导体结构。该层具有上表面。在金属焊盘上形成具有预定厚度的导电盖。接合元件结合到导电盖以与金属接合焊盘形成电连接。

43. 发明授权

US06376361B1 Method to remove excess metal in the formation of damascene and dual interconnects 失效
标题翻译：在形成镶嵌和双镶嵌互连中去除多余金属的方法
公开(公告)号：US06376361B1
公开(公告)日：2002-04-23
申请号：US09419510
申请日：1999-10-18
申请人： Simon Chooi , Mei Sheng Zhou , Tak Yan Tse
发明人： Simon Chooi , Mei Sheng Zhou , Tak Yan Tse
IPC分类号： H01L214763
CPC分类号： H01L21/7684
摘要： A method of removing excess metal, particularly copper, in the fabrication of interconnects has been achieved. In accordance with the objects of this invention, a new method of removing excess metal in the formation of an interconnect has been achieved. A semiconductor substrate is provided. A dielectric layer is provided overlying the semiconductor substrate. Trenches are formed in this dielectric layer for planned damascene or dual damascene interconnects. A barrier layer is provided overlying the dielectric layer and lining the trenches. A metal layer is provided overlying the barrier layer and completely filling the trenches. A masking layer is deposited overlying the metal layer. The masking layer is patterned to form a mask that only overlies the trenches. The metal layer is etched down where not covered by the mask. This etching down is partial so that the barrier layer is not exposed. This etching down leaves the metal layer underlying the mask thicker than the metal layer not underlying the mask. The masking layer is etched away. The metal layer and the barrier layer are polished down to the top surface of the dielectric layer to form the planned interconnects, and the integrated circuit is completed.
摘要翻译：已经实现了在互连制造中去除多余的金属，特别是铜的方法。根据本发明的目的，已经实现了在互连形成中去除多余金属的新方法。提供半导体衬底。提供覆盖在半导体衬底上的电介质层。在该电介质层中形成用于计划镶嵌或双镶嵌互连的沟槽。设置覆盖在电介质层上并且衬套沟槽的阻挡层。设置覆盖在阻挡层上并完全填充沟槽的金属层。掩蔽层沉积在金属层上。图案化掩模层以形成仅覆盖在沟槽上的掩模。金属层被蚀刻到不被掩模覆盖的地方。该蚀刻是部分的，使得阻挡层不暴露。这种蚀刻使得掩模下面的金属层比不在掩模下方的金属层更厚。掩蔽层被蚀刻掉。金属层和阻挡层被抛光到介电层的顶表面以形成预定的互连，并且集成电路完成。

44. 发明授权

US06352921B1 Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization 有权
公开(公告)号：US06352921B1
公开(公告)日：2002-03-05
申请号：US09619377
申请日：2000-07-19
申请人： Licheng M. Han , Yi Xu , Joseph Zhifeng Xie , Mei Sheng Zhou , Simon Chooi
发明人： Licheng M. Han , Yi Xu , Joseph Zhifeng Xie , Mei Sheng Zhou , Simon Chooi
IPC分类号： H01L214763
CPC分类号： H01L21/76834 , H01L21/76807 , H01L21/76829 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a boron carbide layer for use as a barrier and an etch-stop layer in a copper dual damascene structure, and the structure itself are disclosed. In addition to providing a good barrier to copper diffusion, good insulating properties, high etch selectivity with respect to dielectric insulators, boron carbide also provides good electrical characteristics because of its low dielectric constant of less than 5. The amorphous boron carbide is formed in a PECVD chamber by introducing a boron source gas such as B2H6, B5H9+, and carbon source gas such as CH4 and C2H6 at a deposition temperature of about 400° C. Any one, or any combination of the passivation, etch-stop, cap layers of the damascene structure can comprise boron carbide.

45. 发明授权

US06350689B1 Method to remove copper contamination by using downstream oxygen and chelating agent plasma 失效
标题翻译：使用下游氧和螯合剂等离子体去除铜污染的方法
公开(公告)号：US06350689B1
公开(公告)日：2002-02-26
申请号：US09839962
申请日：2001-04-23
申请人： Paul Ho , Simon Chooi , Yakub Aliyu , Mei Sheng Zhou , John Sudijono , Subhash Gupta , Sudipto Ranendra Roy , Yi Xu
发明人： Paul Ho , Simon Chooi , Yakub Aliyu , Mei Sheng Zhou , John Sudijono , Subhash Gupta , Sudipto Ranendra Roy , Yi Xu
IPC分类号： H01L2144
CPC分类号： H01L21/02074 , H01L21/02046 , H01L21/0209 , H01L21/32136 , Y10S438/906
摘要： A method of removing copper contamination from a semiconductor wafer, comprising the following steps. A semiconductor wafer having copper contamination thereon is provided. An oxidizing radical containing downstream plasma is provided from a first source (alternatively halogen (F2, Cl2, or Br2) may be used as on oxidizing agent). A vaporized chelating agent is provided from a second source. The oxidizing radical containing downstream plasma and vaporized chelating agent are mixed to form an oxidizing radical containing downstream plasma/vaporized chelating agent mixture. The mixture is directed to the copper contamination so that the mixture reacts with the copper contamination to form a volatile product. The volatile product is removed from the proximity of the wafer.
摘要翻译：一种从半导体晶片去除铜污染的方法，包括以下步骤。提供其上具有铜污染的半导体晶片。从第一来源提供含有下游等离子体的氧化基团（或者可以在氧化剂上使用卤素（F2，Cl2或Br2））。从第二来源提供蒸发的螯合剂。将含有下游等离子体和气化螯合剂的氧化基团混合以形成含有下游等离子体/汽化螯合剂混合物的氧化基团。混合物被引导到铜污染物，使得混合物与铜污染物反应形成挥发性产物。从晶片附近去除挥发性产物。

46. 发明授权

US06331479B1 Method to prevent degradation of low dielectric constant material in copper damascene interconnects 有权
标题翻译：防止铜大马士革互连中低介电常数材料退化的方法
公开(公告)号：US06331479B1
公开(公告)日：2001-12-18
申请号：US09398294
申请日：1999-09-20
申请人： Jianxun Li , Mei Sheng Zhou , Yi Xu , Simon Chooi
发明人： Jianxun Li , Mei Sheng Zhou , Yi Xu , Simon Chooi
IPC分类号： H01L214763
CPC分类号： H01L21/76832 , H01L21/31144 , H01L21/7681 , H01L21/76811 , H01L21/76835
摘要： A method of fabricating trenches has been achieved. The method may be applied to damascene and dual damascene contacts to prevent damage to organic low dielectric constant materials due to photoresist ashing. A semiconductor substrate is provided. A first dielectric layer is deposited overlying the semiconductor substrate. A first etch stopping layer is deposited overlying the first dielectric layer. A second etch stopping layer is deposited overlying the first etch stopping layer. An optional anti-reflective coating is applied. A photoresist layer is deposited. The photoresist layer is patterned to define openings for planned trenches. The second etch stopping layer is etched through to form a hard mask for the planned trenches. The photoresist layer is stripped away by ashing where the first etch stopping layer protects the first dielectric layer from damage due to the presence of oxygen radicals. The first etch stopping layer is etched through to complete the trenches, and the integrated circuit device is completed.
摘要翻译：已经实现了制造沟槽的方法。该方法可以应用于镶嵌和双镶嵌接触，以防止由于光致抗蚀剂灰化而损坏有机低介电常数材料。提供半导体衬底。沉积在半导体衬底上的第一介电层。第一蚀刻停止层沉积在第一介电层上。第二蚀刻停止层沉积在第一蚀刻停止层上。应用可选的抗反射涂层。沉积光致抗蚀剂层。图案化光致抗蚀剂层以限定计划沟槽的开口。蚀刻第二蚀刻停止层以形成用于所计划的沟槽的硬掩模。光致抗蚀剂层通过灰化被剥离，其中第一蚀刻停止层保护第一介电层免受由于氧自由基的存在的损害。蚀刻第一蚀刻停止层以完成沟槽，并且完成集成电路器件。

47. 发明授权

US06287979B1 Method for forming an air gap as low dielectric constant material using buckminsterfullerene as a porogen in an air bridge or a sacrificial layer 有权
标题翻译：在空气桥或牺牲层中使用作为致孔剂的巴克明斯特富勒烯作为低介电常数材料形成气隙的方法
公开(公告)号：US06287979B1
公开(公告)日：2001-09-11
申请号：US09550265
申请日：2000-04-17
申请人： Mei-Sheng Zhou , Simon Chooi
发明人： Mei-Sheng Zhou , Simon Chooi
IPC分类号： H01L2100
CPC分类号： B82Y30/00 , B82Y10/00 , H01L21/02118 , H01L21/02126 , H01L21/02129 , H01L21/02134 , H01L21/02164 , H01L21/022 , H01L21/02282 , H01L21/312 , H01L21/7682 , Y10S977/844 , Y10S977/888
摘要： A method for reducing RC delay by forming an air gap between conductive lines. A sacrificial layer is formed over a semiconductor structure, filling the gaps between conductive lines on the semiconductor structure. An air bridge layer is formed over the sacrificial layer. The semiconductor structure is exposed to an oxygen plasma, which penetrates through pores in the air bridge layer to react with the sacrificial layer, whereby the sacrificial layer is removed through the air bridge layer. The sacrificial layer and/or the air bridge layer comprise buckminsterfullerene. The air bridge layer can comprise buckminsterfullerene incorporated in an inorganic spin-on material. The buckminsterfullerene reacts with the oxygen plasma and is removed to form a porous air bridge layer. Then the oxygen species from the plasma penetrate the porous air bridge layer to react with and remove the sacrificial layer. The sacrificial layer can comprise buckminsterfullerene incorporated in an inorganic spin-on material, or the sacrificial layer can consist solely of buckminstefullerene. The buckminsterfullerene reacts with the oxygen plasma and is removed through the pores in the air bridge layer.
摘要翻译：一种通过在导线之间形成气隙来减小RC延迟的方法。在半导体结构上形成牺牲层，填充半导体结构上的导线之间的间隙。在牺牲层上形成空气桥接层。半导体结构暴露于氧等离子体，其穿透空气桥接层中的孔以与牺牲层反应，由此牺牲层通过空气桥接层去除。牺牲层和/或空气桥接层包括buckminsterfullerene。空气桥层可以包含掺入无机旋涂材料中的巴克米特富勒烯。降压富勒烯与氧等离子体反应并被除去以形成多孔空气桥接层。然后来自等离子体的氧气穿过多孔空气桥接层与牺牲层反应并除去。牺牲层可以包括掺入无机旋涂材料中的buckminsterfullerene，或者牺牲层可以仅由buckminstefullerene组成。降压富勒烯与氧等离子体反应，并通过空气桥层中的孔除去。

48. 发明授权

US06284657B1 Non-metallic barrier formation for copper damascene type interconnects 有权
标题翻译：铜镶嵌型互连的非金属阻挡层形成
公开(公告)号：US06284657B1
公开(公告)日：2001-09-04
申请号：US09512379
申请日：2000-02-25
申请人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
发明人： Simon Chooi , Subhash Gupta , Mei-Sheng Zhou , Sangki Hong
IPC分类号： H01L2144
CPC分类号： H01L21/76832 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76831
摘要： A method for forming dual-damascene type conducting interconnects with non-metallic barriers that protect said interconnects from fluorine out-diffusion from surrounding low-k, fluorinated dielectric materials. One embodiment of the method is particularly suited for forming such interconnects in microelectronics fabrications of the sub 0.15 micron generation.
摘要翻译：用于形成具有非金属屏障的双镶嵌型导电互连的方法，其保护所述互连免受氟周围的低k，氟化介电材料的氟扩散。该方法的一个实施例特别适用于在0.15微米级的微电子制造中形成这种互连。

49. 发明授权

US07060613B2 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding 有权
公开(公告)号：US07060613B2
公开(公告)日：2006-06-13
申请号：US10988692
申请日：2004-11-15
申请人： Simon Chooi , Yakub Aliyu , Mei Sheng Zhou , John Sudijono , Subhash Gupta , Sudipto Roy , Paul Ho , Xu Yi
发明人： Simon Chooi , Yakub Aliyu , Mei Sheng Zhou , John Sudijono , Subhash Gupta , Sudipto Roy , Paul Ho , Xu Yi
IPC分类号： H01L21/44
CPC分类号： H01L24/13 , H01L24/11 , H01L24/81 , H01L2224/05001 , H01L2224/05023 , H01L2224/0508 , H01L2224/05568 , H01L2224/1147 , H01L2224/1308 , H01L2224/13083 , H01L2224/13147 , H01L2224/1319 , H01L2224/1329 , H01L2224/133 , H01L2224/81801 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/15747 , H01L2924/00014 , H01L2224/13099 , H01L2924/00
摘要： A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.

50. 发明授权

US06835989B2 Methods to form dual metal gates by incorporating metals and their conductive oxides 失效
标题翻译：通过引入金属及其导电氧化物形成双金属栅极的方法
公开(公告)号：US06835989B2
公开(公告)日：2004-12-28
申请号：US10736943
申请日：2003-12-16
申请人： Wenhe Lin , Mei-Sheng Zhou , Kin Leong Pey , Simon Chooi
发明人： Wenhe Lin , Mei-Sheng Zhou , Kin Leong Pey , Simon Chooi
IPC分类号： H01L2976
CPC分类号： H01L21/823842 , H01L29/66545
摘要： Methods for forming dual-metal gate CMOS transistors are described. An NMOS and a PMOS active area of a semiconductor substrate are separated by isolation regions. A metal layer is deposited over a gate dielectric layer in each active area. Oxygen ions are implanted into the metal layer in one active area to form an implanted metal layer which is oxidized to form a metal oxide layer. Thereafter, the metal layer and the metal oxide layer are patterned to form a metal gate in one active area and a metal oxide gate in the other active area wherein the active area having the gate with the higher work function is the PMOS active area. Alternatively, both gates may be metal oxide gates wherein the oxide concentrations of the two gates differ. Alternatively, a dummy gate may be formed in each of the active areas and covered with a dielectric layer. The dielectric layer is planarized thereby exposing the dummy gates. The dummy gates are removed leaving gate openings to the semiconductor substrate. A metal layer is deposited over a gate dielectric layer within the gate openings to form metal gates. One or both of the gates are oxygen implanted and oxidized. The PMOS gate has the higher work function.
摘要翻译：描述形成双金属栅极CMOS晶体管的方法。半导体衬底的NMOS和PMOS有源区由隔离区隔开。金属层沉积在每个有源区域中的栅极电介质层上。将氧离子注入到一个活性区域中的金属层中，以形成被氧化形成金属氧化物层的注入金属层。此后，金属层和金属氧化物层被图案化以在一个有源区域中形成金属栅极，而在另一个有源区域中形成金属氧化物栅极，其中具有较高功函数的栅极的有源区是PMOS有源区。或者，两个栅极可以是金属氧化物栅极，其中两个栅极的氧化物浓度不同。或者，可以在每个有源区域中形成伪栅极并且被电介质层覆盖。介电层被平坦化，从而暴露虚拟栅极。去除虚拟栅极留下栅极开口到半导体衬底。金属层沉积在栅极开口内的栅极电介质层上，形成金属栅极。一个或两个栅极是氧注入和氧化的。 PMOS栅极具有较高的功函数。

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