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41. 发明授权

US08697555B2 Method of producing semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US08697555B2
公开(公告)日：2014-04-15
申请号：US12526731
申请日：2008-08-21
申请人： Kazuhiro Fujikawa , Shin Harada , Yasuo Namikawa , Takeyoshi Masuda
发明人： Kazuhiro Fujikawa , Shin Harada , Yasuo Namikawa , Takeyoshi Masuda
IPC分类号： H01L21/265
CPC分类号： H01L29/7802 , H01L21/046 , H01L21/67109 , H01L29/45 , H01L29/66068 , Y10T117/1068 , Y10T117/1088
摘要： The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.
摘要翻译：本发明提供一种制造半导体器件的方法，该半导体器件能够通过在热处理步骤中充分抑制晶片的表面粗糙化以及其中性能恶化的半导体器件来抑制由于晶片的表面粗糙而导致的性能恶化造成表面粗糙度受到抑制。制造作为半导体器件的MOSFET的方法具有制备由碳化硅制成的晶片3的步骤和通过加热晶片3进行活化退火的活化退火步骤。在活化退火步骤中，晶片3被加热在包含由除了晶片3之外的发生源的SiC片61产生的碳化硅蒸气的气氛中。

42. 发明申请

US20120119225A1 SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：硅碳化硅基板，外延层基板，半导体器件及制造碳化硅基板的方法
公开(公告)号：US20120119225A1
公开(公告)日：2012-05-17
申请号：US13322089
申请日：2011-02-21
申请人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
发明人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/02631 , H01L21/02658 , H01L21/02664 , H01L21/046 , H01L21/0495 , H01L29/04 , H01L29/1608 , H01L29/6606 , H01L29/66068
摘要： The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.
摘要翻译：本发明提供一种碳化硅衬底，提供衬底的外延层，半导体器件和制造碳化硅衬底的方法，其中每一个都实现了降低的导通电阻。碳化硅衬底是具有主表面的碳化硅衬底，并且包括：形成在主表面的至少一部分中的SiC单晶衬底; 以及设置成围绕SiC单晶衬底的基底构件。基部构件包括边界区域和基底区域。边界区域沿着主表面的方向与SiC单晶基板相邻，并且在其中具有晶界。基极区域在与主表面垂直的方向上与SiC单晶衬底相邻，杂质浓度高于SiC单晶衬底。

43. 发明授权

US08921903B2 Lateral junction field-effect transistor 有权
标题翻译：侧面场效应晶体管
公开(公告)号：US08921903B2
公开(公告)日：2014-12-30
申请号：US12517761
申请日：2007-09-21
申请人： Takeyoshi Masuda , Yasuo Namikawa
发明人： Takeyoshi Masuda , Yasuo Namikawa
IPC分类号： H01L29/808 , H01L29/66 , H01L21/04 , H01L29/10 , H01L29/16 , H01L29/20
CPC分类号： H01L29/808 , H01L21/048 , H01L29/1066 , H01L29/1608 , H01L29/2003 , H01L29/66901
摘要： On a p− epitaxial layer, an n-type epitaxial layer and a gate region are formed in this order. A gate electrode is electrically connected to the gate region, and a source electrode and a drain electrode are spaced apart from each other with the gate electrode sandwiched therebetween. A control electrode is used for applying to the p− epitaxial layer a voltage that causes a reverse biased state of the p− epitaxial layer and the n-type epitaxial layer in an OFF operation.
摘要翻译：在p-外延层上依次形成n型外延层和栅极区。栅电极电连接到栅极区，源电极和漏极彼此间隔开，栅电极夹在其间。控制电极被用于向p-外延层施加一个电压，该电压导致p型外延层和n型外延层在OFF操作中的反向偏压状态。

44. 发明授权

US6070911A Clamp-type pipe joint 失效
标题翻译：夹式管接头
公开(公告)号：US6070911A
公开(公告)日：2000-06-06
申请号：US260577
申请日：1999-03-01
申请人： Yasuo Namikawa , Toshikazu Nakamura , Keizo Hosoya , Muneyasu Ichimura
发明人： Yasuo Namikawa , Toshikazu Nakamura , Keizo Hosoya , Muneyasu Ichimura
IPC分类号： F16L25/02 , F16L11/12
CPC分类号： F16L25/026 , Y10S277/919 , Y10S277/943
摘要： A clamp-type isolating pipe joint is disclosed, which can connect pipes by providing insulation between them, is easy to assemble and disassemble, has high reliability and allows easy replacement of parts and is inexpensive to manufacture and install. The joint comprises hubs weldable to connectable pipes, a seal ring interposed between butted surfaces of the hubs and a clamp disposed around the circumferences of the hubs for clamping itself with bolts in the radial direction of the hubs to be fixed as insulated from each other. The clamp and hubs are insulated by interposing between them a metal plate with an insulating resin coat formed thereon. Insulation layers are also provided between the seal ring and the hubs.
摘要翻译：公开了一种夹式隔离管接头，其可以通过在其间提供绝缘来连接管道，易于组装和拆卸，具有高可靠性并且容易地更换零件，并且制造和安装便宜。接头包括可焊接到可连接管道的毂，插入在轮毂的对接表面之间的密封环和围绕轮毂周围设置的夹具，用于通过沿着毂的径向方向的螺栓夹持自身，以被固定为彼此绝缘。夹具和毂通过在其之间插入形成有绝缘树脂涂层的金属板绝缘。绝缘层也设置在密封环和轮毂之间。

45. 发明授权

US06881658B2 Process of and apparatus for heat-treating II-VI compound semiconductors and semiconductor heat-treated by the process 失效
标题翻译：用于热处理II-VI化合物半导体的工艺和设备，以及通过该工艺热处理的半导体
公开(公告)号：US06881658B2
公开(公告)日：2005-04-19
申请号：US10243198
申请日：2002-09-13
申请人： Yasuo Namikawa
发明人： Yasuo Namikawa
IPC分类号： H01L29/221 , C30B31/10 , C30B33/00 , H01L21/22 , H01L21/225 , H01L21/324 , H01L21/385 , H01L21/477 , H01L33/28 , H01L21/28
CPC分类号： H01L21/385 , C30B29/48 , C30B33/00 , H01L33/0095 , H01L33/28
摘要： A process of heat-treating II-VI compound semiconductors reduces the electrical resistivity without the decrease in crystallinity resulting from the increase in dislocation density. The process comprises the following steps:(a) placing at least one II-VI compound semiconductor in contact with aluminum in a heat-treating chamber having the inside surface formed by at least one material selected from the group consisting of pyrolytic born nitride, hexagonal-system boron nitride, sapphire, alumina, aluminum nitride, and polycrystalline diamond; and (b) heat-treating the II-VI compound semiconductor or semiconductors in a gaseous atmosphere containing the group II element constituting part of the II-VI compound semiconductor or semiconductors. A II-VI compound semiconductor is heat-treated by the foregoing process. An apparatus for heat-treating II-VI compound semiconductors comprises components for performing the foregoing process.
摘要翻译：一种热处理II-VI化合物半导体的方法降低了电阻率，而不会由于位错密度的增加而导致结晶度的降低。该方法包括以下步骤：（a）将至少一种与铝接触的II-VI化合物半导体放置在热处理室中，所述热处理室具有由至少一种选自热解出的氮化物，六方晶系的材料形成的内表面系统氮化硼，蓝宝石，氧化铝，氮化铝和多晶金刚石; 和（b）在构成II-VI族化合物半导体或半导体的一部分的II族元素的气氛气氛中热处理II-VI族化合物半导体或半导体。通过上述方法对II-VI化合物半导体进行热处理。用于热处理II-VI化合物半导体的装置包括用于执行上述方法的组分。

46. 发明授权

US5846323A Crystal manufacturing apparatus 失效
标题翻译：水晶制造装置
公开(公告)号：US5846323A
公开(公告)日：1998-12-08
申请号：US725939
申请日：1996-10-08
申请人： Masahiro Egami , Yuh Shiohara , Yasuo Namikawa
发明人： Masahiro Egami , Yuh Shiohara , Yasuo Namikawa
IPC分类号： C30B15/00 , C30B15/26 , C30B29/22 , C30B35/00
CPC分类号： C30B29/22 , C30B15/26 , Y10T117/1032 , Y10T117/1068 , Y10T117/1088
摘要： A crystal pulling apparatus is designed to generate a thermal gradient across the melt surface to prevent nucleation of stray crystals and production of floating debris to produce a high quality crystal, and has special provisions for observing the growth behavior and crystal dimension measurements. The apparatus includes a cylindrical chamber, a crucible disposed centrally within the chamber, a cylindrical heater surrounding the crucible, an insulation member disposed on the top section of the crucible, a first transparent plate and a second transparent plate for closing the center hole in the insulation member, a pull rod passing through the center hole of the transparent plates, a crystal illumination mechanism, a crystal size determination mechanism and an ambient atmosphere flowing mechanism. The crystal size determination mechanism is provided with a quartz prism, an infrared transmitting filter on a side wall of the chamber, a revolution count circuit, phase angle setting circuit, a CCD camera, an image processing section, and a crystal size determination device having a TV monitor.
摘要翻译：设计了一种晶体拉制装置，以在熔体表面上产生热梯度，以防止杂散晶体的成核和浮选碎屑的产生，产生高质量的晶体，并且具有观察生长行为和晶体尺寸测量的特殊规定。该装置包括圆柱形腔室，设置在腔室中心的坩埚，围绕坩埚的圆柱形加热器，设置在坩埚顶部的绝缘构件，第一透明板和第二透明板，用于封闭坩埚中的中心孔绝缘构件，穿过透明板的中心孔的拉杆，晶体照明机构，晶体尺寸确定机构和环境大气流动机构。晶体尺寸确定机构设置有石英棱镜，在室的侧壁上的红外透射滤光器，转数计算电路，相位角设置电路，CCD照相机，图像处理部分和晶体尺寸确定装置，其具有电视监视器。

47. 发明授权

US5707441A Method for preparing an oxide crystal 失效
标题翻译：氧化物晶体的制备方法
公开(公告)号：US5707441A
公开(公告)日：1998-01-13
申请号：US569895
申请日：1995-12-08
申请人： Yasuo Namikawa , Yuh Shiohara , Shoji Tanaka
发明人： Yasuo Namikawa , Yuh Shiohara , Shoji Tanaka
IPC分类号： C01G1/00 , C01G3/00 , C01G3/02 , C30B15/00 , C30B15/20 , C30B15/22 , C30B29/22 , H01B12/00 , H01B13/00
CPC分类号： C30B29/225 , C30B15/20 , Y10T117/1004
摘要： In order to prepare a large yttrium or lanthanoid based oxide superconductor crystal of higher quality, a method and an apparatus which can stably control the shape of a pulled crystal and stably maintain growth of the crystal from a melt are provided. A crystal of an oxide having a structure of RBa.sub.2 Cu.sub.3 O.sub.7-X (R: yttrium or lanthanoid element, 0.ltoreq.X.ltoreq.1) is pulled from a raw material melt which is stored in a crucible by a rotary crystal pulling shaft. During such pulling, a position of the surface of the raw material melt is measured with time to obtain a lowering speed of the surface in a direction substantially parallel to the crystal pulling direction, for adjusting the lifting speed of the crystal pulling shaft by this lowering speed.
摘要翻译：为了制备更高质量的大型钇或镧系氧化物超导体晶体，提供了可以稳定地控制拉晶体的形状并稳定地保持晶体从熔体生长的方法和装置。具有RBa2Cu3O7-X（R：钇或镧系元素，0

48. 发明申请

US20120208302A1 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20120208302A1
公开(公告)日：2012-08-16
申请号：US13502991
申请日：2011-02-25
申请人： Satomi Itoh , Hiromu Shiomi , Yasuo Namikawa , Keiji Wada , Mitsuru Shimazu , Toru Hiyoshi
发明人： Satomi Itoh , Hiromu Shiomi , Yasuo Namikawa , Keiji Wada , Mitsuru Shimazu , Toru Hiyoshi
IPC分类号： H01L21/66
CPC分类号： H01L21/02057 , H01L21/02236 , H01L21/049 , H01L29/1608 , H01L29/66068 , H01L29/7802
摘要： There is provided a method for manufacturing a SiC semiconductor device achieving improved performance. The method for manufacturing the SiC semiconductor device includes the following steps. That is, a SiC semiconductor is prepared which has a first surface having at least a portion into which impurities are implanted. By cleaning the first surface of the SiC semiconductor, a second surface is formed. On the second surface, a Si-containing film is formed. By oxidizing the Si-containing film, an oxide film constituting the SiC semiconductor device is formed.
摘要翻译：提供了一种制造提高性能的SiC半导体器件的方法。 SiC半导体器件的制造方法包括以下步骤。也就是说，制备具有至少一部分注入有杂质的第一表面的SiC半导体。通过清洗SiC半导体的第一表面，形成第二表面。在第二表面上形成含Si膜。通过氧化含Si膜，形成构成SiC半导体器件的氧化物膜。

49. 发明授权

US5632811A Method of retaining melt of oxide 失效
标题翻译：保留氧化物熔体的方法
公开(公告)号：US5632811A
公开(公告)日：1997-05-27
申请号：US420519
申请日：1995-04-12
申请人： Yasuo Namikawa , Yasuji Yamada , Satoshi Koyama , Yuh Shiohara , Shoji Tanaka
发明人： Yasuo Namikawa , Yasuji Yamada , Satoshi Koyama , Yuh Shiohara , Shoji Tanaka
IPC分类号： C30B9/00 , C30B15/00 , C30B15/12 , C30B29/22 , H01B13/00 , H01L21/208 , C30B29/16
CPC分类号： C30B29/225 , C30B15/12 , C30B9/00
摘要： In order to stably retain an oxide-based melt consisting essentially of yttrium or a lanthanoid element, barium, copper and oxygen at a prescribed temperature with no impurity contamination thereby preparing a large oxide crystal of high quality from the melt, an oxide melt consisting essentially of yttrium or a lanthanoid element, barium, copper and oxygen is stored in a first crucible, which in turn is held in a second crucible. The first crucible is made of a material which is an oxide of at least one element forming the melt having a melting point higher by at least 10.degree. C. than a melt retention temperature and causing no structural phase transition up to a temperature higher by 10.degree. C. than the aforementioned prescribed temperature, with solubility of not more than 5 atomic percent with respect to the melt in a temperature range from the room temperature to a temperature higher by 10.degree. C. than the melt retention temperature. The second crucible is made of a material substantially causing neither melting nor chemical reaction with respect to the oxide-based melt, which can retain the melt more stably than the first material. Even if the melt overflows the first crucible, this overflow is suppressed by the second crucible. It is possible to prepare a crystal of an oxide superconductor such as YBa.sub.2 Cu.sub.3 O.sub.7-x (0.ltoreq.X.ltoreq.1) by the pulling method from the melt which is stored in the first crucible.
摘要翻译：为了稳定地保持基本上由钇或镧系元素，钡，铜和氧组成的氧化物基熔体，在规定的温度下没有杂质污染，从而从熔体制备高质量的大的氧化物晶体，基本上由的钇或镧系元素，钡，铜和氧储存在第一坩埚中，第一坩埚又保持在第二坩埚中。第一坩埚由至少一种形成熔体的元素的氧化物的材料制成，其熔点比熔融保持温度高至少10℃，并且不会导致结构相变达到高于10℃的温度 ℃以上的规定温度，相对于熔体，在室温至高于熔融保持温度10℃的温度范围内的溶解度为5原子％以下。第二坩埚由相对于基于氧化物的熔体基本上不熔化和化学反应的材料制成，其可以比第一材料更稳定地保持熔体。即使熔体溢出第一坩埚，这种溢流被第二坩埚抑制。可以通过从存储在第一坩埚中的熔体的拉伸方法制备氧化物超导体的晶体，例如YBa2Cu3O7-x（0≤X1）。

50. 发明授权

US08642476B2 Method for manufacturing silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US08642476B2
公开(公告)日：2014-02-04
申请号：US13502991
申请日：2011-02-25
申请人： Satomi Itoh , Hiromu Shiomi , Yasuo Namikawa , Keiji Wada , Mitsuru Shimazu , Toru Hiyoshi
发明人： Satomi Itoh , Hiromu Shiomi , Yasuo Namikawa , Keiji Wada , Mitsuru Shimazu , Toru Hiyoshi
IPC分类号： H01L21/302
CPC分类号： H01L21/02057 , H01L21/02236 , H01L21/049 , H01L29/1608 , H01L29/66068 , H01L29/7802
摘要： There is provided a method for manufacturing a SiC semiconductor device achieving improved performance. The method for manufacturing the SiC semiconductor device includes the following steps. That is, a SiC semiconductor is prepared which has a first surface having at least a portion into which impurities are implanted. By cleaning the first surface of the SiC semiconductor, a second surface is formed. On the second surface, a Si-containing film is formed. By oxidizing the Si-containing film, an oxide film constituting the SiC semiconductor device is formed.
摘要翻译：提供了一种制造提高性能的SiC半导体器件的方法。 SiC半导体器件的制造方法包括以下步骤。也就是说，制备具有至少一部分注入有杂质的第一表面的SiC半导体。通过清洗SiC半导体的第一表面，形成第二表面。在第二表面上形成含Si膜。通过氧化含Si膜，形成构成SiC半导体器件的氧化物膜。

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