专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US06362110B1 Enhanced resist strip in a dielectric etcher using downstream plasma 有权
标题翻译：使用下游等离子体的介质蚀刻器中增强的抗蚀剂条
公开(公告)号：US06362110B1
公开(公告)日：2002-03-26
申请号：US09539294
申请日：2000-03-30
申请人： Jeffrey Marks
发明人： Jeffrey Marks
IPC分类号： H01L213065
CPC分类号： H01J37/32082 , G03F7/427 , H01J37/32357 , H01J2237/3342 , H01L21/31138
摘要： A method and apparatus for performing a dielectric etch, etch mask stripping, and etch chamber clean. A wafer is placed in an etch chamber. A dielectric etch is performed on the wafer using an in situ plasma generated by an in situ plasma device in the etch chamber. The etch mask is stripped using a remote plasma generated in a remote plasma device connected to the etch chamber. The wafer is removed from the etch chamber and either the in situ plasma or the remote plasma may be used to clean the etch chamber. In etch chambers that do not use confinement rings, a heater may be used to heat the etch chamber wall to provide improved cleaning.
摘要翻译：用于执行电介质蚀刻，蚀刻掩模剥离和蚀刻室清洁的方法和装置。将晶片放置在蚀刻室中。使用在蚀刻室中由原位等离子体装置产生的原位等离子体在晶片上进行电介质蚀刻。使用在连接到蚀刻室的远程等离子体装置中产生的远程等离子体来剥离蚀刻掩模。晶片从蚀刻室中移除，原位等离子体或远程等离子体可用于清洁蚀刻室。在不使用限制环的蚀刻室中，可以使用加热器来加热蚀刻室壁以提供改进的清洁。

42. 发明授权

US06280297B1 Apparatus and method for distribution of slurry in a chemical mechanical polishing system 有权
标题翻译：用于在化学机械抛光系统中分配浆料的装置和方法
公开(公告)号：US06280297B1
公开(公告)日：2001-08-28
申请号：US09481735
申请日：2000-01-11
申请人： Robert D. Tolles , William L. Guthrie , Jeffrey Marks , Tsungnan Cheng
发明人： Robert D. Tolles , William L. Guthrie , Jeffrey Marks , Tsungnan Cheng
IPC分类号： B24B100
CPC分类号： B24B37/04 , B24B57/02
摘要： Slurry is provided to the surface of the polishing pad by pumping the slurry up through a central port, or by dripping the slurry down onto the surface of the polishing pad from a slurry feed tube. A slurry wiper, which may have one or more flexible members, sweeps the slurry evenly and thinly across the polishing pad. A control system coordinates the distribution of slurry to the polishing pad with the motion of the carrier head.
摘要翻译：通过将浆料向上泵送通过中心口，或通过从浆料进料管将浆料向下滴落到抛光垫的表面上而将浆料提供到抛光垫的表面。可以具有一个或多个柔性构件的浆料刮水器将抛光浆料均匀且薄薄地扫过抛光垫。控制系统通过载体头的运动来协调浆料与抛光垫的分布。

43. 发明申请

US20090064247A1 USER GENERATED CONTENT 审中-公开
标题翻译：用户生成内容
公开(公告)号：US20090064247A1
公开(公告)日：2009-03-05
申请号：US12203123
申请日：2008-09-02
申请人： Bryan Biniak , Chris Cunningham , Atanas Ivanov , Jeffrey Marks , Brock Meltzer
发明人： Bryan Biniak , Chris Cunningham , Atanas Ivanov , Jeffrey Marks , Brock Meltzer
IPC分类号： H04N7/173
CPC分类号： H04N7/163 , H04N21/47205 , H04N21/4788 , H04N21/8133
摘要： The system provides a computer based presentation synchronized to a broadcast and not merely to an event. The system includes a customizable interface that uses a broadcast and a plurality of secondary sources to present data and information to a user to enhance and optimize a broadcast experience. The secondary sources can comprise commercially available sources as well as user generated content that is generated prior to, or coincidentally with, the broadcast of the primary content.
摘要翻译：该系统提供与广播同步的基于计算机的呈现，而不仅仅是事件。该系统包括可定制的接口，其使用广播和多个次要源向用户呈现数据和信息以增强和优化广播体验。次要来源可以包括商业上可获得的来源以及在主要内容的广播之前产生的或与主要内容的广播同时产生的用户生成的内容。

44. 发明授权

US07405521B2 Multiple frequency plasma processor method and apparatus 有权
标题翻译：多频等离子体处理器的方法和装置
公开(公告)号：US07405521B2
公开(公告)日：2008-07-29
申请号：US10645665
申请日：2003-08-22
申请人： Raj Dhindsa , S. M. Reza Sadjadi , Felix Kozakevich , Dave Trussell , Lumin Li , Eric Lenz , Camelia Rusu , Mukund Srinivasan , Aaron Eppler , Jim Tietz , Jeffrey Marks
发明人： Raj Dhindsa , S. M. Reza Sadjadi , Felix Kozakevich , Dave Trussell , Lumin Li , Eric Lenz , Camelia Rusu , Mukund Srinivasan , Aaron Eppler , Jim Tietz , Jeffrey Marks
IPC分类号： H01J7/24 , C23F1/00 , C23C16/00
CPC分类号： H01J37/32174 , H01J37/32082 , H01J37/32165
摘要： A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation frequencies to the exclusion of other frequencies.
摘要翻译：通过以几个频率激发等离子体，在真空等离子体处理室中用等离子体处理工件，使得等离子体被几个频率激发同时导致在等离子体中发生几种不同的现象。该腔室包括中央顶部和底部电极以及由RF供电的外围顶部和/或底部电极装置，或通过将至少一个等离子体激发频率传递至排除另一个等离子体激发频率的滤波器装置连接到参考电位频率

45. 发明申请

US20080081700A1 SYSTEM FOR PROVIDING AND PRESENTING FANTASY SPORTS DATA 审中-公开
标题翻译：提供和呈现幻想体育数据的系统
公开(公告)号：US20080081700A1
公开(公告)日：2008-04-03
申请号：US11848182
申请日：2007-08-30
申请人： BRYAN BINIAK , Chris Cunningham , Atanas Ivanov , Jeffrey Marks , Brock Meltzer
发明人： BRYAN BINIAK , Chris Cunningham , Atanas Ivanov , Jeffrey Marks , Brock Meltzer
IPC分类号： A63F13/12
CPC分类号： H04N21/4722 , H04N7/17318 , H04N21/252 , H04N21/2668 , H04N21/4667 , H04N21/4788 , H04N21/8405
摘要： The system provides a method to present a Fantasy League and Fantasy Games in a fully customizable format. The system provides a match up experience where the owner can focus on his own team as if it were a single game with all of the owner's players participating (even though the owner's players come from different teams and play at different times and even different days of the week). The system also provides for match up presentation for Head-to-Head leagues so it appears as if a real game between two Fantasy Teams is being played. The system includes a scoreboard, play by play, player profiles, boxscores, images and video, news, chat, contextual information, alerts, and other information related to the owner's team.
摘要翻译：该系统提供了一种以完全可定制的格式呈现幻想联盟和幻想游戏的方法。该系统提供了一个匹配的体验，其中所有者可以专注于自己的团队，就好像它是与所有所有者玩家参与的单一游戏（即使所有者的玩家来自不同的队伍，并在不同的时间，甚至不同的日子星期）。该系统还提供了头对头联赛的配对演示，因此看起来好像是在两个幻想团队之间进行真正的比赛。该系统包括记分牌，玩游戏，玩家简介，盒子，图像和视频，新闻，聊天，情境信息，警报和与业主团队相关的其他信息。

46. 发明申请

US20060134917A1 Reduction of etch mask feature critical dimensions 审中-公开
标题翻译：蚀刻掩模的减少具有关键尺寸
公开(公告)号：US20060134917A1
公开(公告)日：2006-06-22
申请号：US11016455
申请日：2004-12-16
申请人： Zhisong Huang , S.M. Sadjadi , Jeffrey Marks
发明人： Zhisong Huang , S.M. Sadjadi , Jeffrey Marks
IPC分类号： H01L21/4757 , C23F1/00
CPC分类号： H01L21/67069 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： A method for forming features in an etch layer in an etch stack with an etch mask over the etch layer, wherein the etch mask has etch mask features with sidewalls, where the etch mask features have a first critical dimension, is provided. A cyclical critical dimension reduction is performed to form deposition layer features with a second critical dimension, which is less than the first critical dimension. Each cycle, comprises a depositing phase for depositing a deposition layer over the exposed surfaces, including the vertical sidewalls, of the etch mask features and an etching phase for etching back the deposition layer leaving a selective deposition on the vertical sidewalls. Features are etched into the etch layer, wherein the etch layer features have a third critical dimension, which is less than the first critical dimension.
摘要翻译：一种用于在蚀刻层上的蚀刻层中形成蚀刻层中的特征的方法，其中蚀刻掩模具有带侧壁的蚀刻掩模特征，其中蚀刻掩模特征具有第一临界尺寸。执行周期性临界尺寸降低以形成具有小于第一临界尺寸的第二临界尺寸的沉积层特征。每个循环包括沉积相，用于在包括垂直侧壁的蚀刻掩模特征的暴露表面上沉积沉积层，以及用于蚀刻回沉积层的蚀刻阶段，在垂直侧壁上留下选择性沉积。将特征蚀刻到蚀刻层中，其中蚀刻层特征具有小于第一临界尺寸的第三临界尺寸。

47. 发明授权

US5204288A Method for planarizing an integrated circuit structure using low melting inorganic material 失效
标题翻译：使用低熔点无机材料平面化集成电路结构的方法
公开(公告)号：US5204288A
公开(公告)日：1993-04-20
申请号：US845544
申请日：1992-03-04
申请人： Jeffrey Marks , Kam S. Law , David N. Wang , Dan Maydan
发明人： Jeffrey Marks , Kam S. Law , David N. Wang , Dan Maydan
IPC分类号： H01L21/3105 , H01L21/316 , H01L21/768 , H01L23/31
CPC分类号： H01L21/3105 , H01L21/31055 , H01L21/31604 , H01L21/76819 , H01L23/3157 , H01L2924/0002 , Y10S148/133 , Y10S438/913
摘要： A planarizing process for planarizing an integrated circuit structure in a CVD apparatus is disclosed using a low melting inorganic planarizing material which comprises flowing white depositing a low melting inorganic planarizing layer such as a boron oxide glass over a layer of insulating material such as an oxide of silicon, then dry etching the low melting inorganic planarizing layer to planarize the structure, and then depositing a further layer of an insulating material to encapsulate any remaining portions of the low melting glass planarizing layer which may be hygroscopic. The method eliminates the need for separate coating, drying, and curing steps associated with the application of organic-based planarizing layers usually carried out outside of a vacuum apparatus. In a preferred embodiment, the deposition steps and the etching step are all carried out without removing the integrated circuit structure from the apparatus. In a particularly preferred embodiment, all of the steps are carried out in the same chamber of the apparatus. An additional etching step may be carried out after depositing the first insulating layer and prior to deposition of the planarizing layer to remove any voids formed in the insulating layer.
摘要翻译：公开了使用低熔点无机平面化材料来平坦化CVD装置中的集成电路结构的平面化工艺，该无机平面化材料包括使诸如氧化硼玻璃之类的低熔点无机平面化层在诸如氧化物硅，然后干法蚀刻低熔点无机平面化层以使结构平坦化，然后沉积另外的绝缘材料层以封装可能是吸湿性的低熔点玻璃平坦化层的任何剩余部分。该方法消除了对通常在真空装置外进行的有机基平坦化层的应用的独立涂布，干燥和固化步骤的需要。在优选实施例中，沉积步骤和蚀刻步骤全部进行而不从集成电路结构从设备中移除。在特别优选的实施例中，所有步骤在装置的相同腔室中进行。在沉积第一绝缘层之后并且在沉积平坦化层以去除在绝缘层中形成的任何空隙之前，可以进行另外的蚀刻步骤。

48. 发明申请

US20140308812A1 CVD BASED METAL/SEMICONDUCTOR OHMIC CONTACT FOR HIGH VOLUME MANUFACTURING APPLICATIONS 有权
标题翻译：基于CVD的金属/半导体OHMIC联系人用于高容量制造应用
公开(公告)号：US20140308812A1
公开(公告)日：2014-10-16
申请号：US13862048
申请日：2013-04-12
申请人： Reza Arghavani , Jeffrey Marks , Benjamin A. Bonner
发明人： Reza Arghavani , Jeffrey Marks , Benjamin A. Bonner
IPC分类号： H01L21/768 , H01L21/67
CPC分类号： H01L21/7688 , H01L21/285 , H01L21/76831 , H01L21/76834 , H01L23/485 , H01L29/0895 , H01L2924/0002 , H01L2924/00
摘要： An apparatus and method for manufacturing an interconnect structure to provide ohmic contact in a semiconductor device is provided. The method includes providing a semiconductor device, such as a transistor, comprising a substrate, a gate dielectric, a gate electrode, and source and drain regions in the substrate. An ultra-thin interfacial dielectric is deposited by chemical vapor deposition (CVD) over the source and drain regions, where the interfacial dielectric can have a thickness between about 3 Å and about 20 Å. The ultra-thin interfacial dielectric is configured to unpin the metal Fermi level from the source and drain regions. Other steps such as the deposition of a metal by CVD and the cleaning of the substrate surface can be performed in an integrated process tool without a vacuum break. The method further includes forming one or more vias through a pre-metal dielectric over the source and drain regions of the substrate.
摘要翻译：提供一种用于制造在半导体器件中提供欧姆接触的互连结构的装置和方法。该方法包括在衬底中提供诸如晶体管的半导体器件，其包括衬底，栅极电介质，栅极电极以及源极和漏极区域。通过在源极和漏极区域上的化学气相沉积（CVD）沉积超薄界面电介质，其中界面电介质可以具有在约和之间的厚度。超薄界面电介质被配置为从源极和漏极区域去除金属费米能级。其他步骤，例如通过CVD沉积金属和清洁基板表面可以在没有真空断裂的集成工艺工具中进行。该方法还包括在衬底的源极和漏极区域上形成通过前金属电介质的一个或多个通孔。

49. 发明申请

US20070264830A1 Pitch reduction 有权
标题翻译：节距减少
公开(公告)号：US20070264830A1
公开(公告)日：2007-11-15
申请号：US11432194
申请日：2006-05-10
申请人： Zhisong Huang , Jeffrey Marks , S.M. Sadjadi
发明人： Zhisong Huang , Jeffrey Marks , S.M. Sadjadi
IPC分类号： H01L21/311 , H01L21/306
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139
摘要： A method for providing features in an etch layer is provided. A sacrificial patterned layer with sacrificial features is provided over an etch layer. Conformal sidewalls are formed in the sacrificial features, comprising at least two cycles of a sidewall formation process, wherein each cycle comprises a sidewall deposition phase and a sidewall profile shaping phase. Parts of the sacrificial patterned layer between conformal sidewalls are removed leaving the conformal sidewalls with gaps between the conformal sidewalls where parts of the sacrificial patterned layer were selectively removed. Features are etched in the etch layer using the conformal sidewalls as an etch mask, wherein the features in the etch layer are etched through the gaps between the conformal sidewalls where parts of the sacrificial patterned layer were selectively removed.
摘要翻译：提供了一种用于在蚀刻层中提供特征的方法。在蚀刻层上提供具有牺牲特征的牺牲图案层。保形侧壁形成在牺牲特征中，包括侧壁形成工艺的至少两个循环，其中每个循环包括侧壁沉积阶段和侧壁轮廓成形阶段。除去共形侧壁之间的牺牲图案层的部分，留下保形侧壁，其中保形侧壁之间的间隙被选择性地去除牺牲图案层的部分。使用保形侧壁作为蚀刻掩模在蚀刻层中蚀刻特征，其中蚀刻层中的特征被蚀刻通过牺牲图案层的部分被选择性去除的共形侧壁之间的间隙。

50. 发明申请

US20070082299A1 Methods and apparatus for fabricating conductive features on glass substrates used in liquid crystal displays 审中-公开
标题翻译：用于在液晶显示器中使用的玻璃基板上的导电特征的制造方法和装置
公开(公告)号：US20070082299A1
公开(公告)日：2007-04-12
申请号：US11398254
申请日：2006-04-04
申请人： Jeffrey Marks
发明人： Jeffrey Marks
IPC分类号： G03C5/00
CPC分类号： H01L29/4908 , C25D5/022 , C25D5/06 , G02F1/136286 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1285 , H01L27/1292 , H01L29/458
摘要： Methods and systems for defining metal features to be part of a liquid crystal display (LCD) is provided. The method is applied to a glass substrate, and the glass substrate has a blanket conductive metal layer (e.g., a barrier layer) defined on the glass substrate or a layer of the glass substrate. An inverse photoresist mask is applied over the blanket conductive metal layer. A plating meniscus is then formed over the inverse photoresist mask. The plating meniscus contains at least an electrolytic solution and a plating chemistry, where the plating meniscus forms metal features in regions over the blanket conductive metal layer not covered by the inverse photoresist mask.
摘要翻译：提供了将金属特征定义为液晶显示器（LCD）的一部分的方法和系统。该方法应用于玻璃基板，并且玻璃基板具有限定在玻璃基板或玻璃基板的层上的覆盖层导电金属层（例如阻挡层）。将反光致抗蚀剂掩模施加在覆盖层导电金属层上。然后在反光致抗蚀剂掩模上形成电镀弯月面。电镀弯液面至少包含电解液和电镀化学品，其中电镀弯液面在未被反光致抗蚀剂掩模覆盖的覆盖层导电金属层上的区域中形成金属特征。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式