专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20090122817A1 VARIABLE-WAVELENGTH FILTER AND VARIABLE-WAVELENGTH LASER 审中-公开
标题翻译：可变波长滤波器和可变波长激光器
公开(公告)号：US20090122817A1
公开(公告)日：2009-05-14
申请号：US12064441
申请日：2006-09-04
申请人： Kenji Sato , Jan De Merli , Kenji Mizutani , Shinya Sudo , Koji Kudo , Hiroyuki Yamazaki
发明人： Kenji Sato , Jan De Merli , Kenji Mizutani , Shinya Sudo , Koji Kudo , Hiroyuki Yamazaki
IPC分类号： H01S3/10 , G02B6/10
CPC分类号： G02B6/12007 , G02F1/313 , G02F2203/15 , G02F2203/585 , H01S5/02248 , H01S5/0687 , H01S5/101 , H01S5/1032 , H01S5/142
摘要： Only the light at an overlapping wavelength of the transmission characteristics of at least two wavelength selecting filters is looped, and at least one of the wavelength selecting filters varies a selected wavelength. Since a loss due to the optical filters is small and there is not a loss caused by a highly reflecting film, the output of an external-resonator variable-wavelength laser can be increased. Optical circuit component (8) divides light input from external device (1) into at least two ports. Loop waveguide (11) interconnects at least ports (9, 10) divided by optical circuit component (8) in the form of a loop. At least two first wavelength selecting filters (12, 13) are inserted in series in a path of loop waveguide (11), and have periodic transmission characteristics on a frequency axis which are different from each other. At least one of first wavelength selecting filters (12, 13) varies the selected wavelength.
摘要翻译：只有至少两个波长选择滤波器的传输特性的重叠波长的光被环绕，并且至少一个波长选择滤波器改变选定的波长。由于由于滤光器引起的损耗小，并且不会由高反射膜引起的损耗，所以可以增加外部谐振器可变波长激光器的输出。光电路部件（8）将从外部设备（1）输入的光分成至少两个端口。环形波导（11）至少以循环形式的由光电路部件（8）划分的端口（9,10）互连。至少两个第一波长选择滤波器（12,13）串联插入到环形波导（11）的路径中，并且在频率轴上具有彼此不同的周期性传输特性。第一波长选择滤光器（12,13）中的至少一个改变所选择的波长。

42. 发明申请

US20070033115A1 Watch design creating system and method of the same 审中-公开
标题翻译：手表设计创造系统和方法相同
公开(公告)号：US20070033115A1
公开(公告)日：2007-02-08
申请号：US11581515
申请日：2006-10-17
申请人： Hiroyuki Harasaki , Akihiro Hori , Eiichi Sakita , Shiro Kato , Masashi Ozaki , Akio Okabe , Kaoru Yamauchi , Koji Kudo , Masami Ichihara , Yuuzi Ehara
发明人： Hiroyuki Harasaki , Akihiro Hori , Eiichi Sakita , Shiro Kato , Masashi Ozaki , Akio Okabe , Kaoru Yamauchi , Koji Kudo , Masami Ichihara , Yuuzi Ehara
IPC分类号： G06Q30/00
CPC分类号： G06Q30/00 , G04D3/00 , G06Q10/087 , G06Q30/0621 , G06Q30/0643
摘要： The watch design creating system according to the present invention utilizes, for example, the internet as an information communication network. For example, a consumer (1) in subscribers (1 to N) which are customers, requests design information to a host computer (H) of the watch maker which is a watch supplier, through the internet, the watch maker provides, for example, a CD-ROM stored design software and data used for original design to the consumer. The consumer creates the original design watch in accordance with steps stored in the CD-ROM, records it into a FD (floppy disk) and sends it to the watch maker. The watch maker produces the original watch and delivers the completed watch to the consumer (FIG. 1).
摘要翻译：根据本发明的手表设计创建系统利用例如互联网作为信息通信网络。例如，作为顾客的订户（1至N）中的消费者（1）通过互联网向作为手表供应商的钟表制造商的主机（H）请求设计信息，钟表制造商提供例如，一个CD-ROM存储的设计软件和用于原始设计的数据给消费者。消费者根据存储在CD-ROM中的步骤创建原始设计手表，将其记录到FD（软盘）中，并将其发送到手表制造商。手表制造商生产原始手表，并将完成的手表交付给消费者（图1）。

43. 发明申请

US20050119944A1 Watch design creating system and method of the same 审中-公开
标题翻译：手表设计创造系统和方法相同
公开(公告)号：US20050119944A1
公开(公告)日：2005-06-02
申请号：US10876704
申请日：2004-06-28
申请人： Hiroyuki Harasaki , Akihiro Hori , Eiichi Sakita , Shiro Kato , Masashi Ozaki , Akio Okabe , Kaoru Yamauchi , Koji Kudo , Masami Ichihara , Yuuzi Ehara
发明人： Hiroyuki Harasaki , Akihiro Hori , Eiichi Sakita , Shiro Kato , Masashi Ozaki , Akio Okabe , Kaoru Yamauchi , Koji Kudo , Masami Ichihara , Yuuzi Ehara
IPC分类号： G04D3/00 , G06Q10/00 , G06Q30/00 , G06F17/60
CPC分类号： G06Q30/00 , G04D3/00 , G06Q10/087 , G06Q30/0621 , G06Q30/0643
摘要： The watch design creating system according to the present invention utilizes, for example, the internet as an information communication network. For example, a consumer (1) in subscribers (1 to N) which are customers, requests design information to a host computer (H) of the watch maker which is a watch supplier, through the internet, the watch maker provides, for example, a CD-ROM stored design software and data used for original design to the consumer. The consumer creates the original design watch in accordance with steps stored in the CD-ROM, records it into a FD (floppy disk) and sends it to the watch maker. The watch maker produces the original watch and delivers the completed watch to the consumer (FIG. 1).
摘要翻译：根据本发明的手表设计创建系统利用例如互联网作为信息通信网络。例如，作为顾客的订户（1至N）中的消费者（1）通过互联网向作为手表供应商的钟表制造商的主机（H）请求设计信息，钟表制造商提供例如，一个CD-ROM存储的设计软件和用于原始设计的数据给消费者。消费者根据存储在CD-ROM中的步骤创建原始设计手表，将其记录到FD（软盘）中，并将其发送到手表制造商。手表制造商生产原始手表，并将完成的手表交付给消费者（图1）。

44. 发明授权

US06323507B1 Semiconductor photonic element, method of fabricating the same, and semiconductor photonic device equipped therewith 失效
标题翻译：半导体光子元件及其制造方法以及配备有该半导体光子器件的半导体光子器件
公开(公告)号：US06323507B1
公开(公告)日：2001-11-27
申请号：US09488508
申请日：2000-01-20
申请人： Yoshitaka Yokoyama , Koji Kudo , Masayoshi Tsuji
发明人： Yoshitaka Yokoyama , Koji Kudo , Masayoshi Tsuji
IPC分类号： H01L3300
CPC分类号： H01S5/227 , H01S5/0265 , H01S5/2077 , H01S5/2215 , H01S5/2272 , H01S5/4031 , H01S5/4087
摘要： A semiconductor photonic element is provided, which realize low threshold current and satisfactory characteristics in the high temperatures and/or high output operating condition. This element is comprised of (a) a semiconductor substrate; (b) a mesa structure formed on a first surface of the substrate to extend in a specific direction; the mesa structure including an active layer and a pair of p- and n-type cladding layers located respectively at top and bottom sides of the active layer, forming a double heterojunction; (c)a current-constricting structure for constricting an injection current formed at each side of the mesa structure to expose a top of the mesa structure from the current-constricting structure; the current-constricting structure comprising a first current-blocking part and a second current-blocking part; the first current-blocking part having a dielectric current-blocking layer that extends to the mesa structure; the dielectric current-blocking layer being contacted with top edges of the mesa structure; the second current-blocking part having a semiconductor current-blocking layer; and (d) a semiconductor burying layer formed to cover the mesa structure and the multilayer current-constricting structure; the semiconductor burying layer being contacted with the top of the mesa structure.
摘要翻译：提供半导体光子元件，其在高温和/或高输出操作条件下实现低阈值电流和令人满意的特性。该元件由（a）半导体衬底构成; （b）形成在所述基板的第一表面上以沿特定方向延伸的台面结构; 所述台面结构包括分别位于所述有源层的顶侧和底侧的有源层和一对p型和n型覆层，形成双异质结; （c）用于收缩形成在台面结构的每一侧的注入电流的电流收缩结构，以从电流收缩结构暴露台面结构的顶部; 所述电流收缩结构包括第一电流阻挡部分和第二电流阻挡部分; 所述第一电流阻挡部分具有延伸到所述台面结构的介电阻流层; 所述介质电流阻挡层与所述台面结构的顶部边缘接触; 所述第二电流阻挡部分具有半导体电流阻挡层; 以及（d）形成为覆盖所述台面结构和所述多层电流收缩结构的半导体掩埋层; 半导体掩埋层与台面结构的顶部接触。

45. 发明授权

US06228670B1 Method of manufacturing a semiconductor optical waveguide array and an array-structured semiconductor optical device 有权
公开(公告)号：US06228670B1
公开(公告)日：2001-05-08
申请号：US09298229
申请日：1999-04-22
申请人： Koji Kudo
发明人： Koji Kudo
IPC分类号： H01L2120
CPC分类号： H01S5/026 , G02B6/12004 , G02B2006/12107 , G02B2006/12121 , G02B2006/12142 , G02B2006/12164 , G02B2006/12195 , H01S5/0265 , H01S5/06256 , H01S5/06258 , H01S5/2077 , H01S5/4025 , H01S5/4087 , H01S5/50
摘要： In a method of manufacturing a semiconductor optical waveguide array in an ultra-high integration, the device yield per wafer is considerably increased and uniform and improved characteristics are obtained. In this method, there is manufactured a semiconductor optical waveguide array including a plurality of optical waveguides in an array structure in stripe-shaped growth regions enclosed by dielectric thin films on a substrate. The waveguides are fabricated through a selective crystal growth process and include a semiconductor multilayer structure including a quantum well layer or a semiconductor multilayer structure including a bulk layer. Namely, there is formed a plurality of stripe-shaped growth regions elongated parallel to each other, the regions being enclosed with a dielectric thin film. In each growth region, a semiconductor multilayer structure is selectively grown by metallo-organic vapor phase epitaxy (MOVPE). In the selective growth, the growth regions are parallel to each other with an interval therebetween, the interval being less than a diffusion length of a source material in a reactive tube during the crystal growth. Assuming that the dielectric thin film arranged between the respective growth regions has a width Wa and a first outer-most dielectric thin film and a second outer-most dielectric thin film arranged respectively outside of outer-most ones of the growth regions respectively have widths Wm1 and Wm2, there is satisfied a relationship of Wm1>Wa and Wm2>Wa.

46. 发明授权

US5143253A Chip packaging means and supply mechanism for supplying chips by using the chip packaging means 失效
标题翻译：用于通过使用芯片封装装置供应芯片的芯片封装装置和供电机构
公开(公告)号：US5143253A
公开(公告)日：1992-09-01
申请号：US402041
申请日：1989-09-01
申请人： Kuniaki Takahashi , Koji Kudo , Tetsuo Takahashi
发明人： Kuniaki Takahashi , Koji Kudo , Tetsuo Takahashi
IPC分类号： B65G51/03 , H05K13/02
CPC分类号： H05K13/027 , B65G51/03
摘要： A chip packaging casing for packing chips and also serving as a chip supply source comprises a substantially plate-like body having a spiral passageway formed in its interior, and a plurality of chips received in a row in the spiral passageway of the body. The plate-like body further has a chip-outlet formed therein as a continuation of the spiral passageway to communicate with the exterior of the body and at least one air-intake formed therein to communicate between the passageway and the exterior of the body. The air-intake is adapted to be connected to an air supply source and serves to facilitate the forwarding of the chips along the passageway toward the outlet to discharge the chips form the outlet. A chip supply mechanism is provided for supplying chips to a mounting head of an automatic chip mounting apparatus by using the chip packaging casing.
摘要翻译：用于包装芯片并且还用作芯片供应源的芯片封装壳体包括在其内部形成有螺旋形通道的基本上板状的主体，以及在主体的螺旋通道中并排接收的多个芯片。板状体还具有形成在其中作为螺旋通道的延续部分的芯片出口，其与主体的外部连通并且形成在其中的至少一个进气口在主体的通道和外部之间连通。进气口适于连接到空气供应源，并且用于促进沿着通道朝向出口排出切屑以从出口排出芯片。提供了一种芯片供给机构，用于通过使用芯片封装壳体将芯片供应到自动芯片安装装置的安装头。

47. 发明授权

US4627739A Bracelet type wrist watch 失效
标题翻译：手链式手表
公开(公告)号：US4627739A
公开(公告)日：1986-12-09
申请号：US697077
申请日：1985-01-31
申请人： Ichikawa Shingo , Hisahide Nakagawa , Hayao Kano , Koji Kudo
发明人： Ichikawa Shingo , Hisahide Nakagawa , Hayao Kano , Koji Kudo
IPC分类号： A44C5/12 , G04B37/22 , G04B37/00
CPC分类号： G04B37/225 , A44C5/12
摘要： A bracelet type wrist watch composed of a curved body having a watch embedded therein, and a coil spring covering said curved body, thus presenting a neat appearance as an ornamental ring when worn around the wrist.
摘要翻译：手表式手表由嵌入其中的手表的弯曲体和卷绕在该弯曲体上的螺旋弹簧构成，因此当佩戴在手腕周围时呈现出整洁的外观。

48. 发明授权

US10270257B2 Electric power management system and electric power management method 有权
公开(公告)号：US10270257B2
公开(公告)日：2019-04-23
申请号：US15216012
申请日：2016-07-21
申请人： Koji Kudo , Hisato Sakuma , Hitoshi Yano
发明人： Koji Kudo , Hisato Sakuma , Hitoshi Yano
IPC分类号： G06F1/26 , G06F1/32 , H02J3/38 , H02J3/46 , G06F1/3203
摘要： The HEMS of each consumer transmits the amount of surplus electricity that is expected by to be generated by a PV system, and/or the amount of electric power that is needed by a controllable load, in a predetermined time slot on a predetermined date, to a server apparatus. The server apparatus, based on the notified amount of surplus electricity and the amount of electric power that is needed by the controllable load, combines a first consumer and a second consumer so that the amount of electric power needed by the controllable load will be equal to or greater than the amount of surplus electricity. Then, under the control the HEMS of the second consumer, the surplus electricity that is generated by the first consumer is consumed by each controllable load.

49. 发明授权

US09531212B2 Secondary battery system and charge and discharge method for the same 有权
标题翻译：二次电池系统和充放电方法相同
公开(公告)号：US09531212B2
公开(公告)日：2016-12-27
申请号：US13810835
申请日：2012-06-13
申请人： Hiroo Hongo , Kenji Kobayashi , Koji Kudo , Kenichi Ishii , Takayuki Nyu
发明人： Hiroo Hongo , Kenji Kobayashi , Koji Kudo , Kenichi Ishii , Takayuki Nyu
IPC分类号： G06F17/50 , H02J7/00 , H01M10/44 , H01M10/48 , H02J3/32 , H01M4/505 , H01M10/052 , H01M10/42
CPC分类号： H02J7/007 , H01M4/505 , H01M10/052 , H01M10/44 , H01M10/441 , H01M10/48 , H01M10/482 , H01M2010/4271 , H02J3/32 , H02J7/0013 , H02J7/0021 , H02J7/0063 , H02J7/0073 , H02J2007/0067 , Y02E60/122 , Y02P70/54 , Y02T10/7011 , Y02T10/7055
摘要： A secondary battery has a progressively degrading SOC that is an SOC at which the battery performance degrades during storage, and is charged and discharged by a controller. An information processor holds a first threshold value set in advance and lower than the progressively degrading SOC of the secondary battery, and a second threshold value set in advance and higher than the progressively degrading SOC, makes the controller continue an operation to charge the secondary battery from the first threshold value to the second threshold value at the time of charging the secondary battery based on the value of the SOC of the secondary battery detected by the controller, and makes the controller continue an operation to discharge the secondary battery from the second threshold value to the first threshold value at the time of discharging the secondary battery based on the value of the SOC of the secondary battery detected by the controller.
摘要翻译：二次电池具有逐渐劣化的SOC，其是在存储期间电池性能劣化的SOC，并且由控制器充电和放电。信息处理器保持预先设定的低于二次电池的逐渐劣化的SOC的第一阈值和预先设定为高于逐渐劣化的SOC的第二阈值，使得控制器继续对二次电池充电的操作基于由控制器检测到的二次电池的SOC的值，从二次电池充电时的第一阈值到第二阈值，并使控制器继续进行从第二阈值排出二次电池的操作基于由控制器检测到的二次电池的SOC的值，在二次电池放电时的值为第一阈值。

50. 发明授权

US09513141B2 Electric power measurement system, electric power measurement method, and information processing device 有权
标题翻译：电力测量系统，电力测量方法和信息处理装置
公开(公告)号：US09513141B2
公开(公告)日：2016-12-06
申请号：US13513584
申请日：2010-10-15
申请人： Koji Kudo , Yukiko Morioka , Hiroo Hongo , Hisato Sakuma
发明人： Koji Kudo , Yukiko Morioka , Hiroo Hongo , Hisato Sakuma
IPC分类号： G01D4/00 , H02J13/00
CPC分类号： G01D4/004 , G01D4/002 , H02J13/0006 , Y02B70/3266 , Y02B90/242 , Y02B90/246 , Y04S20/242 , Y04S20/322 , Y04S20/42
摘要： An electric device has an electric power measurement unit with an electric power detection element measuring consumed electric power and an information communication element transmitting the measured power. An electric power meter has an information communication element measuring and transmitting total electric power consumed indoors. An information processing unit stores the measured values in every predetermined sampling period. If a difference α of two measurement values of the electric power detection element is a finite value, the information processing unit calculates and stores both a difference β of two measurement values of the electric power meter corresponding to the two measurement values and β/α, and calibrates the amount of electric power consumed by the electric device and that is measured by the electric power detection element using a median of values of β/α obtained in a predetermined measurement period or a median of a predetermined number of values of β/α.
摘要翻译：电气设备具有电力测量单元，其具有测量消耗电力的电力检测元件和传送测量功率的信息通信元件。电力计具有测量和传送室内消耗的总电力的信息通信元件。信息处理单元在每个预定采样周期中存储测量值。如果电力检测元件的两个测量值的差值α为有限值，则信息处理单元计算并存储与两个测量值相对应的电力计量器的两个测量值的差值β和β/α，并且校准由电气设备消耗的电力量，并且由电力检测元件使用在预定测量周期中获得的β/α值的中值或预定数量的β/α的中值来测量的电力量。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式