会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 49. 发明授权
    • Efficient method to detect process induced defects in the gate stack of flash memory devices
    • 高效的方法来检测闪存器件的栅极堆叠中的工艺引起的缺陷
    • US06717850B1
    • 2004-04-06
    • US10313676
    • 2002-12-05
    • Jiang LiNian YangZhigang WangJohn Jianshi Wang
    • Jiang LiNian YangZhigang WangJohn Jianshi Wang
    • G11C1604
    • G11C29/50G11C16/04G11C2029/0403
    • A method of processing a semiconductor device is disclosed and comprises applying a relatively high voltage across a gate stack of a flash memory cell for a certain period of time. Then, the polarity of the applied voltage is reversed and is again applied across the gate stack for another certain period of time. The voltage applied is greater than a channel erase voltage utilized for the memory cell. This applied voltage causes extrinsic defects to become amplified at interfaces of oxide/insulator layers of the gate stack. Then, the memory cell is tested (e.g., via a battery of tests) in order to determine if the memory cell is defective. If the cell is defective (e.g., fails the test), it can be assumed that substantial extrinsic defects were present in the memory cell and have been amplified resulting in the test failure. If the cell passes the test, it can be assumed that the memory cell is substantially free from extrinsic defects. Defective memory cells/devices can be marked or otherwise indicated as being defective.
    • 公开了一种处理半导体器件的方法,并且包括在闪存单元的栅极堆叠上施加相当高的电压一段时间。 然后,施加的电压的极性反转,并再次施加在栅极堆叠另外一段时间。 施加的电压大于用于存储器单元的通道擦除电压。 该施加的电压导致外部缺陷在栅极堆叠的氧化物/绝缘体层的界面处被放大。 然后,测试存储器单元(例如,通过测试电池),以便确定存储器单元是否有故障。 如果细胞有缺陷(例如,测试失败),则可以认为在存储单元中存在大量的外在缺陷并且被放大,导致测试失败。 如果单元通过测试,则可以认为存储单元基本上没有外在缺陷。 存储器单元/器件不良或可能被标记为有缺陷。