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41. 发明申请

US20140002141A1 System and Method for a Driver Circuit 有权
标题翻译：驱动电路的系统和方法
公开(公告)号：US20140002141A1
公开(公告)日：2014-01-02
申请号：US13598163
申请日：2012-08-29
申请人： Jens Barrenscheen , Laurent Beaurenaut , Marco Bachhuber , Tommaso Bacigalupo , Marcus Nuebling
发明人： Jens Barrenscheen , Laurent Beaurenaut , Marco Bachhuber , Tommaso Bacigalupo , Marcus Nuebling
IPC分类号： H03K3/00
CPC分类号： H02M1/08 , H02M1/32 , H02M1/38 , H02M2001/0012
摘要： In accordance with an embodiment, a method of operating a gate driving circuit includes receiving a reference timing pulse, measuring the received timing pulse according to a local clock generator of the gate driving circuit, and generating a switching control signal based on the measured received timing pulse.
摘要翻译：根据实施例，一种操作栅极驱动电路的方法包括接收参考定时脉冲，根据门驱动电路的本地时钟发生器测量接收到的定时脉冲，并且基于所测量的接收定时产生切换控制信号脉冲。

42. 发明申请

US20130311691A1 System and Method to Address Devices Connected to a Bus System 有权
公开(公告)号：US20130311691A1
公开(公告)日：2013-11-21
申请号：US13473236
申请日：2012-05-16
申请人： Jens Barrenscheen , Ansgar Pottbaecker , Fabrizio Cortigiani
发明人： Jens Barrenscheen , Ansgar Pottbaecker , Fabrizio Cortigiani
IPC分类号： G06F13/20 , G06F13/40
CPC分类号： G06F13/404 , G06F13/364 , H04L12/403 , H04L25/028 , H04L43/50 , H04L61/2038 , H04L2012/40234 , Y04S40/168
摘要： A system includes a bus system, such as a LIN bus system. A number of components are connected to the bus system. A first component of the components is configured to detect a direction of a current to detect a location of the first component in the bus system. Each of the components can have a unique address.

43. 发明授权

US08504776B2 Device and method for controlling caches 有权
标题翻译：控制缓存的设备和方法
公开(公告)号：US08504776B2
公开(公告)日：2013-08-06
申请号：US12201134
申请日：2008-08-29
申请人： Jens Barrenscheen
发明人： Jens Barrenscheen
IPC分类号： G06F12/12
CPC分类号： G06F12/0888
摘要： Device and method for controlling caches, comprising a decoder configured to decode additional information of datasets retrievable from a memory, wherein the decoded additional information is configured to control whether particular ones of the datasets are to be stored in a cache.
摘要翻译：用于控制高速缓存的设备和方法，包括解码器，其被配置为解码可从存储器检索的数据集的附加信息，其中解码的附加信息被配置为控制是否将特定数据集存储在高速缓存中。

44. 发明申请

US20130135030A1 Systems, Circuits and a Method for Generating a Configurable Feedback 有权
标题翻译：系统，电路和生成可配置反馈的方法
公开(公告)号：US20130135030A1
公开(公告)日：2013-05-30
申请号：US13308054
申请日：2011-11-30
申请人： Jens Barrenscheen , Laurent Beaurenaut
发明人： Jens Barrenscheen , Laurent Beaurenaut
IPC分类号： G06G7/12
CPC分类号： G05B19/0428
摘要： A system can generate a configurable feedback. The system includes a number of circuitries that are coupled to a number of drivers and connected to each other in a chain via a single-wire connection. Control circuitry is connected to the plurality of circuitries and adapted to output configuration data to at least one circuitry of the plurality of circuitries to configure a feedback signal to be delivered by the plurality of circuitries to the control circuitry via the single-wire connection.
摘要翻译：系统可以生成可配置的反馈。该系统包括耦合到多个驱动器并且经由单线连接在链条中彼此连接的多个电路。控制电路连接到多个电路，并且适于将配置数据输出到多个电路中的至少一个电路，以将由多个电路传送的反馈信号经由单线连接配置到控制电路。

45. 发明授权

US08432215B2 Charge pump 有权
标题翻译：电荷泵
公开(公告)号：US08432215B2
公开(公告)日：2013-04-30
申请号：US13247854
申请日：2011-09-28
申请人： Jens Barrenscheen , Martin Feldtkeller
发明人： Jens Barrenscheen , Martin Feldtkeller
IPC分类号： G05F1/10
CPC分类号： H02M3/3376 , H04B5/0012 , H04B5/0031 , H04B5/0037 , H04B5/0093
摘要： A charge pump for transmitting energy and data has a primary side, a secondary side and a first coupling capacitance by way of which the primary side is connected to the secondary side, wherein the primary side is designed to periodically transmit energy in the form of a charge packet to the secondary side with the first coupling capacitance during a charge pump interval, the primary side being designed to impress an item of data on the charge pump interval by modulation, wherein the secondary side is designed to receive the item of data by demodulating the charge pump interval, wherein the secondary side is designed to impress an item of data on the charge pump interval by modulation, and wherein the primary side is designed to receive the item of data by demodulation of the charge pump interval.
摘要翻译：用于传输能量和数据的电荷泵具有初级侧，次级侧和第一耦合电容，初级侧通过该电容连接到次级侧，其中初级侧被设计成周期性地传输形式为在电荷泵间隔期间利用第一耦合电容向次级侧充电分组，所述初级侧被设计成通过调制在电荷泵间隔上压制数据项，其中次级侧被设计为通过解调来接收数据项所述电荷泵间隔，其中所述次级侧被设计成通过调制来压制所述电荷泵间隔上的数据项，并且其中所述初级侧被设计成通过所述电荷泵间隔的解调来接收所述数据项。

46. 发明授权

US08339139B2 System and method for testing a circuit 有权
标题翻译：用于测试电路的系统和方法
公开(公告)号：US08339139B2
公开(公告)日：2012-12-25
申请号：US12696932
申请日：2010-01-29
申请人： Jens Barrenscheen , Dirk Hammerschmidt
发明人： Jens Barrenscheen , Dirk Hammerschmidt
IPC分类号： G01R31/327 , G01R31/02
CPC分类号： G01R31/327 , G01R31/00 , G01R31/007 , G01R31/3272
摘要： In one embodiment, a sensor for circuit testing has a first terminal and a second terminal. The first terminal is configured to be coupled to a first node of a first circuit via a first capacitor, and the second terminal is configured to be coupled to a second node of the first circuit. The sensor also has at least one transmitter and at least one receiver that measures a first transmission factor between the first terminal and the second terminal. The sensor determines that the first circuit is in a first state if the first transmission factor is above a first threshold, and determines that the first circuit is in a second state if the first transmission factor is below the first threshold.
摘要翻译：在一个实施例中，用于电路测试的传感器具有第一端子和第二端子。第一终端被配置为经由第一电容器耦合到第一电路的第一节点，并且第二终端被配置为耦合到第一电路的第二节点。传感器还具有至少一个发射器和至少一个测量第一端子和第二端子之间的第一传输系数的接收器。如果第一传输因子高于第一阈值，则传感器确定第一电路处于第一状态，并且如果第一传输因子低于第一阈值，则确定第一电路处于第二状态。

47. 发明申请

US20120117283A1 ARRANGEMENT COMPRISING A FIRST SEMICONDUCTOR CHIP AND A SECOND SEMICONDUCTOR CHIP CONNECTED THERETO 有权
标题翻译：包含第一半导体芯片和连接的第二个半导体芯片的布置
公开(公告)号：US20120117283A1
公开(公告)日：2012-05-10
申请号：US13355130
申请日：2012-01-20
申请人： Jens Barrenscheen , Peter Rohm , Angela Rohm , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
发明人： Jens Barrenscheen , Peter Rohm , Angela Rohm , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
IPC分类号： G06F3/00
CPC分类号： G05B19/0428 , G05B9/02 , G05B2219/25012
摘要： A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.
摘要翻译：一种用于半导体芯片的数据通信方法，包括从第一半导体芯片向一个或多个第二半导体芯片发送负载控制数据，导频数据和传输时钟信号，所述第二半导体芯片分别耦合到一个或多个电负载，基于由负载控制数据定义的定时，通过将传输时钟信号除以由导频数据规定的分频因子得出传输速率，并以传输速率从一个或多个第二半导体芯片向第一半导体芯片发送诊断数据。

48. 发明授权

US08112563B2 Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto 有权
标题翻译：包括第一半导体芯片和与其连接的第二半导体芯片的布置
公开(公告)号：US08112563B2
公开(公告)日：2012-02-07
申请号：US10727102
申请日：2003-12-02
申请人： Jens Barrenscheen , Peter Rohm , Angela Rohm, legal representative , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
发明人： Jens Barrenscheen , Peter Rohm , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
IPC分类号： G06F13/12 , G06F13/38
CPC分类号： G05B19/0428 , G05B9/02 , G05B2219/25012
摘要： An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.
摘要翻译：一种包括连接到其上的第一半导体芯片和第二半导体芯片的布置，其中第二半导体芯片另外连接到电负载并且基于由负载控制数据规定的定时驱动这些电负载，并且其中第一半导体芯片向第二半导体芯片发送上述负载控制数据和控制第二半导体芯片的导频数据，第二半导体芯片向第一半导体芯片发送表示第二半导体芯片中的状态的诊断数据，发生。诊断数据经由第一传输信道发送，负载控制数据和导频数据经由第二传输信道发送。

49. 发明申请

US20100327946A1 BOOST MECHANISM USING DRIVER CURRENT ADJUSTMENT FOR SWITCHING PHASE IMPROVEMENT 有权
标题翻译：使用驱动电流调整进行相位改善的增强机制
公开(公告)号：US20100327946A1
公开(公告)日：2010-12-30
申请号：US12875824
申请日：2010-09-03
申请人： Jens Barrenscheen
发明人： Jens Barrenscheen
IPC分类号： H03K17/687
CPC分类号： H02M1/08
摘要： System and method for providing a boost current to a switching transistor gate is disclosed. A boost capacitor precharged to a voltage level above a gate-source voltage is coupled to a switching transistor gate at the beginning of a switch-on phase. The boost capacitor is decoupled from the switching transistor gate when a boost capacitor voltage falls below the gate-source voltage and is again precharged to the voltage level above the gate-source voltage. A second-phase resistance is coupled between a supply voltage and the switching transistor gate. The second-phase resistance value is selected based upon a current peak detected in the switching transistor. A switch-off capacitor precharged to a voltage level below the gate-source voltage may be coupled to the switching transistor gate at the beginning of a switch-of phase.
摘要翻译：公开了一种用于向开关晶体管栅极提供升压电流的系统和方法。预充电到电压电平高于栅极 - 源极电压的升压电容在开关阶段开始时耦合到开关晶体管栅极。当升压电容器电压降低到栅极 - 源极电压以下并且再次预充电到高于栅极 - 源极电压的电压电平时，升压电容器与开关晶体管栅极去耦。第二相电阻耦合在电源电压和开关晶体管栅极之间。基于在开关晶体管中检测到的电流峰值选择第二相电阻值。预充电到电压电平低于栅源电压的关断电容器可以在开关切换开始时耦合到开关晶体管栅极。

50. 发明申请

US20100156361A1 System and Method for Transmitting Current Sharing Information among Paralleled Power Trains 有权
标题翻译：用于在并联电力列车中传输当前共享信息的系统和方法
公开(公告)号：US20100156361A1
公开(公告)日：2010-06-24
申请号：US12340285
申请日：2008-12-19
申请人： Jens Barrenscheen
发明人： Jens Barrenscheen
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2001/0012
摘要： An embodiment of the invention relates to a power control device configured to provide current-sharing control in a power converter including a plurality of power trains. The power control device transmits or receives a synchronization signal on a synchronization node to initiate a time frame that includes a plurality of time slots, and to control a switching activity of a power switch in a respective power train. The power control device further includes a current sharing bus node on which a digital current-sharing signal is transmitted in a designated time slot. The power control device determines a load current of the power converter and controls a power train current employing current data received on the current-sharing bus node from another power control device. The power control device may be a master power control device that transmits the synchronization signal on the synchronization node.
摘要翻译：本发明的实施例涉及一种功率控制装置，其被配置为在包括多个动力系的功率转换器中提供电流共享控制。功率控制装置在同步节点上发送或接收同步信号，以启动包括多个时隙的时间帧，并且控制相应的动力系中的电力开关的切换活动。功率控制装置还包括电流共享总线节点，在指定的时隙中发送数字电流共享信号。功率控制装置确定功率转换器的负载电流，并且利用来自另一个功率控制装置的在共享总线节点上接收的当前数据来控制传动系电流。功率控制装置可以是在同步节点上发送同步信号的主功率控制装置。

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