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41. 发明申请

US20140175363A1 Forming Nonvolatile Memory Elements By Diffusing Oxygen Into Electrodes 有权
标题翻译：通过将氧气扩散到电极中形成非易失性存储元件
公开(公告)号：US20140175363A1
公开(公告)日：2014-06-26
申请号：US13721476
申请日：2012-12-20
申请人： INTERMOLECULAR INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： Mihir Tendulkar , Tim Minvielle , Yun Wang , Takeshi Yamaguchi
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , H01L27/2463 , H01L45/1266 , H01L45/146 , H01L45/1633
摘要： Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing. At least one electrode in a memory element is reactive, while another may be inert. The precursor layer is converted into a resistance switching layer as a result of this diffusion. The precursor layer may initially include a stoichiometric oxide that generally does not exhibit resistance switching characteristics until oxygen vacancies are created. Metals forming such oxides may be more electronegative than metals forming a reactive electrode. The reactive electrode may have substantially no oxygen at least prior to annealing. Annealing may be performed at 250-400° C. in the presence of hydrogen. These methods simplify process control and may be used to form nonvolatile memory elements including resistance switching layers less than 20 Angstroms thick.
摘要翻译：提供了形成包括电阻切换层的非易失性存储元件的方法。一种方法包括通过退火将氧从前体层扩散到一个或多个反应电极。存储元件中的至少一个电极是反应性的，而另一个电极可能是惰性的。作为该扩散的结果，前体层被转换成电阻切换层。前体层可以最初包括化学计量的氧化物，其通常在氧空位产生之前不表现出电阻转换特性。形成这种氧化物的金属可能比形成反应性电极的金属更具电负性。至少在退火之前，反应电极可以基本上不含氧。在氢气存在下，可以在250-400℃下进行退火。这些方法简化了过程控制，并且可以用于形成包括小于20埃厚的电阻开关层的非易失性存储元件。

42. 发明申请

US20140175361A1 Resistive Switching Layers Including Hf-Al-O 有权
标题翻译：包含Hf-Al-O的电阻式开关层
公开(公告)号：US20140175361A1
公开(公告)日：2014-06-26
申请号：US13721406
申请日：2012-12-20
申请人： Intermolecular Inc. , SanDisk 3D LLC , Kabushiki Kaisha Toshiba
发明人： Chien-Lan Hsueh , Randall J. Higuchi , Tim Minvielle , Jinhong Tong , Yun Wang , Takeshi Yamaguchi
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , H01L27/2463 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/1616
摘要： Provided are resistive random access memory (ReRAM) cells having switching layers that include hafnium, aluminum, oxygen, and nitrogen. The composition of such layers is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. In some embodiments, the concentration of nitrogen in a switching layer is between about 1 and 20 atomic percent or, more specifically, between about 2 and 5 atomic percent. Addition of nitrogen helps to control concentration and distribution of defects in the switching layer. Also, nitrogen as well as a combination of two metals helps with maintaining this layer in an amorphous state. Excessive amounts of nitrogen reduce defects in the layer such that switching characteristics may be completely lost. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD).
摘要翻译：提供了具有包括铪，铝，氧和氮的开关层的电阻随机存取存储器（ReRAM）单元。这些层的组成被设计成实现期望的性能特性，例如低电流泄漏以及低和一致的开关电流。在一些实施方案中，开关层中氮的浓度在约1至20原子百分比之间，或更具体地在约2至5原子百分比之间。添加氮有助于控制开关层缺陷的浓度和分布。此外，氮气以及两种金属的组合有助于将该层保持在非晶状态。过量的氮减少了层中的缺陷，使得开关特性可能完全丧失。可以使用诸如溅射或原子层沉积（ALD）的各种技术来沉积切换层。

43. 发明申请

US20140175354A1 SEQUENTIAL ATOMIC LAYER DEPOSITION OF ELECTRODES AND RESISTIVE SWITCHING COMPONENTS 有权
标题翻译：电极和电阻开关元件的顺序原子层沉积
公开(公告)号：US20140175354A1
公开(公告)日：2014-06-26
申请号：US13721549
申请日：2012-12-20
申请人： INTERMOLECULAR INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： Yun Wang , Tony P. Chiang , Tim Minvielle , Takeshi Yamaguchi
IPC分类号： H01L45/00
CPC分类号： H01L45/145 , H01L27/2481 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/16 , H01L45/1616
摘要： Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.
摘要翻译：提供了使用原子层沉积技术形成非易失性存储元件的方法，其中存储元件的至少两个不同层顺次沉积并且在沉积室中不破坏真空。该方法可以用于防止用于电极的各种材料的氧化，而不需要单独的氧阻隔层。可以使用信号线和电阻开关层的组合来封盖电极并使其氧化最小化。因此，存储元件中需要更少的层。此外，原子层沉积允许更精确地控制电极厚度。在一些实施例中，电极的厚度可以小于50埃。总的来说，电极和电阻开关层的原子层沉积导致整个存储元件的较小厚度，使得它们更适合于高级节点的低纵横比特征。

44. 发明申请

US20140117303A1 Resistive Random Access Memory Cells Having METAL ALLOY Current Limiting layers 有权
公开(公告)号：US20140117303A1
公开(公告)日：2014-05-01
申请号：US13722314
申请日：2012-12-20
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Tony P. Chiang , Imran Hashim , Tim Minvielle , Dipankar Pramanik , Takeshi Yamaguchi
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/003 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/16
摘要： Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance.

45. 发明授权

US08652923B2 Nonvolatile memory device having an electrode interface coupling region 有权
标题翻译：具有电极接口耦合区域的非易失性存储器件
公开(公告)号：US08652923B2
公开(公告)日：2014-02-18
申请号：US13829194
申请日：2013-03-14
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Tony P. Chiang , Imran Hashim
IPC分类号： H01L21/20
CPC分类号： H01L45/1608 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/065 , H01L45/08 , H01L45/10 , H01L45/12 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/1616 , H01L45/1625
摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.
摘要翻译：本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

46. 发明申请

US20130334490A1 Transition Metal Oxide Bilayers 有权
公开(公告)号：US20130334490A1
公开(公告)日：2013-12-19
申请号：US13971467
申请日：2013-08-20
申请人： Intermolecular Inc. , SanDisk 3D LLC , Kabushiki Kaisha Toshiba
发明人： Hieu Pham , Vidyut Gopal , Imran Hashim , Tim Minvielle , Yun Wang , Takeshi Yamaguchi , Hong Sheng Yang
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , H01L27/2409 , H01L27/2463 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1616 , H01L45/1625 , H01L45/1641
摘要： Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

47. 发明申请

US20130217179A1 Nonvolatile Memory Device Having An Electrode Interface Coupling Region 有权
标题翻译：具有电极接口耦合区域的非易失性存储器件
公开(公告)号：US20130217179A1
公开(公告)日：2013-08-22
申请号：US13829194
申请日：2013-03-14
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Tony P. Chiang , Imran Hashim
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/065 , H01L45/08 , H01L45/10 , H01L45/12 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/1616 , H01L45/1625
摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.
摘要翻译：本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

48. 发明授权

US09269896B2 Confined defect profiling within resistive random memory access cells 有权
标题翻译：电阻式随机存储器存取单元中的限制缺陷分析
公开(公告)号：US09269896B2
公开(公告)日：2016-02-23
申请号：US14519376
申请日：2014-10-21
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Vidyut Gopal , Chien-Lan Hsueh
IPC分类号： H01L45/00 , G11C13/00
CPC分类号： H01L45/10 , G11C13/0002 , G11C13/0007 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/71 , G11C2213/77 , H01L45/08 , H01L45/1253 , H01L45/1266 , H01L45/145 , H01L45/146 , H01L45/1616 , H01L45/1625 , H01L45/1641
摘要： Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A stack including a defect source layer, a defect blocking layer, and a defect acceptor layer disposed between the defect source layer and the defect blocking layer may be subjected to annealing. During the annealing, defects are transferred in a controllable manner from the defect source layer to the defect acceptor layer. At the same time, the defects are not transferred into the defect blocking layer thereby creating a lowest concentration zone within the defect acceptor layer. This zone is responsible for resistive switching. The precise control over the size of the zone and the defect concentration within the zone allows substantially improvement of resistive switching characteristics of the ReRAM cell. In some embodiments, the defect source layer includes aluminum oxynitride, the defect blocking layer includes titanium nitride, and the defect acceptor layer includes aluminum oxide.
摘要翻译：提供了电阻随机存取存储器（ReRAM）单元及其制造方法。可以对包括缺陷源层，缺陷阻挡层和设置在缺陷源层和缺陷阻挡层之间的缺陷受主层的堆叠进行退火。在退火过程中，缺陷以可控方式从缺陷源层转移到缺陷受体层。同时，缺陷不会转移到缺陷阻挡层中，从而在缺陷受体层内形成最低浓度区。该区域负责电阻交换。精确控制区域的尺寸和区域内的缺陷浓度允许ReRAM单元的电阻开关特性得到显着改善。在一些实施例中，缺陷源层包括氮氧化铝，缺陷阻挡层包括氮化钛，缺陷受主层包括氧化铝。

49. 发明授权

US09178151B2 Work function tailoring for nonvolatile memory applications 有权
标题翻译：非易失性存储器应用的工作功能定制
公开(公告)号：US09178151B2
公开(公告)日：2015-11-03
申请号：US14078838
申请日：2013-11-13
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Tony P. Chiang , Imran Hashim
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1608 , H01L27/2463 , H01L45/04 , H01L45/065 , H01L45/10 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1633 , H01L45/1641
摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.
摘要翻译：本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

50. 发明授权

US09054307B2 Resistive random access memory cells having metal alloy current limiting layers 有权
标题翻译：具有金属合金限流层的电阻随机存取存储单元
公开(公告)号：US09054307B2
公开(公告)日：2015-06-09
申请号：US14317155
申请日：2014-06-27
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Yun Wang , Tony P. Chiang , Imran Hashim , Tim Minvielle , Dipankar Pramanik , Takeshi Yamaguchi
IPC分类号： G11C13/00 , G11C7/00 , H01L45/00 , H01L27/24
CPC分类号： H01L45/1608 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/003 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/16
摘要： Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance.
摘要翻译：提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由过渡金属的合金形成的限流层。这种合金的一些实例包括还可以包括镍，铝和/或硅的含铬合金。其它实例包括也可以包括硅和碳的组合或铝和氮的组合的含钽和/或钛的合金。这些限流层可具有至少约1欧姆 - 厘米的电阻率。即使当这些层受到强电场和/或高温处理时，也保持该电阻率水平。在一些实施例中，限流层的击穿电压为至少约8V。层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

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