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41. 发明授权

US07623173B2 Solid-state image pickup device having analog-digital converters configured to sum values of multiple pixels in the array and method for driving the same 有权
标题翻译：具有模拟数字转换器的固态图像拾取装置，其被配置为求和阵列中的多个像素的值和用于驱动该像素的方法
公开(公告)号：US07623173B2
公开(公告)日：2009-11-24
申请号：US11058851
申请日：2005-02-16
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A CMOS image sensor includes column-parallel ADCs. Each of the ADCs includes a comparator and an up/down counter. With this configuration, digital values of pixels in a plurality of rows can be added without using additional circuits, such as an adder and a line memory device, and the frame rate can be increased while maintaining constant sensitivity.
摘要翻译： CMOS图像传感器包括列并行ADC。每个ADC都包括一个比较器和一个向上/向下计数器。利用这种配置，可以不使用诸如加法器和行存储器件的附加电路来添加多行中的像素的数字值，并且可以在保持恒定的灵敏度的同时增加帧速率。

42. 发明授权

US07538709B2 Analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
标题翻译：模拟数字转换方法，模数转换器，用于检测物理量分布的半导体器件，以及电子设备
公开(公告)号：US07538709B2
公开(公告)日：2009-05-26
申请号：US11462429
申请日：2006-08-04
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/38
CPC分类号： H03M1/1295 , H03K5/2481 , H03K5/249 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.
摘要翻译：在用于将表示待处理的模拟信号中的参考分量和信号分量之间的差的差信号分量转换为数字数据的模数转换方法中，在第一处理中，对应于参考将信号分量与参考信号进行比较，以转换成数字数据。与比较同时，以递减计数模式和递增计数模式中的一个进行计数，并且保持比较完成时的计数值。在第二过程中，将与参考分量和信号分量中的另一个相对应的信号与参考信号进行比较。与比较同时，在下计数模式和向上计数模式中的另一个中执行计数，并且保持比较完成时的计数值。

43. 发明授权

US07532148B2 Method and apparatus for AD conversion, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
公开(公告)号：US07532148B2
公开(公告)日：2009-05-12
申请号：US11532260
申请日：2006-09-15
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/56
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.

44. 发明申请

US20090084941A1 COUNTER CIRCUIT, AD CONVERSION METHOD, AD CONVERTER, SEMICONDUCTOR DEVICE FOR DETECTING DISTRIBUTION OF PHYSICAL QUANTITIES, AND ELECTRONIC APPARATUS 有权
标题翻译：计数器电路，AD转换方法，AD转换器，用于检测物理分布分布的半导体器件和电子设备
公开(公告)号：US20090084941A1
公开(公告)日：2009-04-02
申请号：US12329682
申请日：2008-12-08
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H01L27/02
CPC分类号： H03K23/62 , H03K23/56 , H03M1/1023 , H03M1/123 , H03M1/1295 , H03M1/56 , H04N5/335
摘要： A solid-state image pick up device including a pixel array unit having unit pixels arranged in a matrix pattern. Each unit pixel includes a photoelectric converter. Additionally, the solid-state image pick up device has column signal lines that correspond to the respective columns of the matrix pattern, a row scanning means for selectively controlling each unit pixel, and an analog-digital converting unit for converting analog signals output from the unit pixels in a row selectively controlled by the row scanning means. The analog-digital converting unit further includes an asynchronous counter which performs counting in two modes and the asynchronous counter includes a counter processor configured so that when switching between the count modes occurs, a running count value is broken and there is an interval between the count modes and when a mode begins the running count value is reset to the value before the running count value was broken.
摘要翻译：一种固态图像拾取装置，包括具有以矩阵图案排列的单位像素的像素阵列单元。每个单位像素包括光电转换器。此外，固态图像拾取装置具有与矩阵图案的各列相对应的列信号线，用于选择性地控制每个单位像素的行扫描装置，以及用于转换从单元像素输出的模拟信号的模拟数字转换单元由行扫描装置选择性地控制的行中的单位像素。模拟数字转换单元还包括以两种模式执行计数的异步计数器，并且异步计数器包括配置为当在计数模式之间切换时发生计数模式的计数器处理器，运行计数值被破坏并且计数之间存在间隔模式，当模式开始时，运行计数值将重置为运行计数值中断之前的值。

45. 发明授权

US07129883B2 Method and apparatus for AD conversion, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
公开(公告)号：US07129883B2
公开(公告)日：2006-10-31
申请号：US11059587
申请日：2005-02-16
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/34
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.

46. 发明申请

US20060097902A1 Analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
公开(公告)号：US20060097902A1
公开(公告)日：2006-05-11
申请号：US11268428
申请日：2005-11-07
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/12
CPC分类号： H03M1/1295 , H03K5/2481 , H03K5/249 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.

47. 发明申请

US20060013485A1 Data processing method, data processing apparatus, semiconductor device, and electronic apparatus 有权
标题翻译：数据处理方法，数据处理装置，半导体装置和电子装置
公开(公告)号：US20060013485A1
公开(公告)日：2006-01-19
申请号：US11179772
申请日：2005-07-12
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiro Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiro Yasui
IPC分类号： G06K9/46
CPC分类号： G06K9/60 , H04N5/367
摘要： In a solid-state imaging device with an AD converter mounted on the same chip, to enable an efficient product-sum operation while reducing the size of the circuit scale and the number of transmission signal lines. A pixel signal during an n-row readout period is compared with a reference signal for digitizing this pixel signal, and a counting operation is performed in one of a down-counting mode and an up-counting mode while the comparison processing is being performed, and then, the count value when the comparison processing is finished is stored. Subsequently, by using the n-row counting result as the initial value, a pixel signal during an (n+1)-row readout period is compared with the reference signal for digitizing this pixel signal, and also, the counting operation is performed in one of the down-counting mode and the up-counting mode, and then, the count value when the comparison processing is finished is stored. If the count mode for the n+1 row is set to be opposite to the count mode for the n row, the count value obtained by the counting operation for the n+1 row is a subtraction result. If the count modes for the n+1 row and the n row are set to be the same, the count value obtained by the counting operation for the n+1 row is an addition result
摘要翻译：在具有安装在同一芯片上的AD转换器的固态成像装置中，能够在减小电路规模和发送信号线的数量的同时实现有效的乘积和运算。将n行读出期间的像素信号与用于数字化该像素信号的参考信号进行比较，并且在执行比较处理时以递减计数模式和递增计数模式中的一个进行计数操作，然后存储比较处理结束时的计数值。随后，通过使用n行计数结果作为初始值，将第（n + 1）行读出期间的像素信号与用于数字化该像素信号的参考信号进行比较，并且还进行计数操作下计数模式和向上计数模式之一，然后存储比较处理结束时的计数值。如果将n + 1行的计数模式设置为与n行的计数模式相反，则通过对n + 1行的计数操作获得的计数值是减法结果。如果n + 1行和n行的计数模式被设置为相同，则通过n + 1行的计数操作获得的计数值是相加结果

48. 发明申请

US20110199526A1 SOLID-STATE IMAGE PICKUP DEVICE AND METHOD FOR DRIVING THE SAME 有权
标题翻译：固态图像拾取装置及其驱动方法
公开(公告)号：US20110199526A1
公开(公告)日：2011-08-18
申请号：US13094420
申请日：2011-04-26
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A system and method for driving a solid-state image pickup device including a pixel array unit including unit pixels. Each unit pixel includes a photoelectric converter, column signal lines and a number of analog-digital converting units. The unit pixels are selectively controlled in units of rows. Analog signals output from the unit pixels in a row selected by the selective control though the column signal lines are converted to digital signals via the analog-digital converting units. The digital signals are added among a number of unit pixels via the analog-digital converting units. The added digital signals from the analog-digital converting units are read. Each unit pixel in the pixel array unit is selectively controlled in units of arbitrary rows, the analog-distal converting units being operable to performing the converting in a (a) normal-frame-rate mode and a (b) high-frame-rate mode in response to control signals.
摘要翻译：一种用于驱动包括包括单位像素的像素阵列单元的固态图像拾取装置的系统和方法。每个单位像素包括光电转换器，列信号线和多个模数转换单元。以行为单位选择性地控制单位像素。通过选择性控制通过列信号线选择的行中的单位像素输出的模拟信号经由模拟数字转换单元转换成数字信号。数字信号通过模拟数字转换单元被添加到多个单位像素中。读取来自模拟数字转换单元的附加数字信号。像素阵列单元中的每个单位像素以任意行为单位选择性地被控制，所述模拟 - 远端转换单元可操作以以（a）正常帧速率模式和（b）高帧速率模式响应于控制信号。

49. 发明授权

US07961238B2 Solid-state image pickup device and method for driving the same in a number of modes 有权
标题翻译：固态摄像装置及其在多种模式中的驱动方法
公开(公告)号：US07961238B2
公开(公告)日：2011-06-14
申请号：US12772573
申请日：2010-05-03
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A system and method for driving a solid-state image pickup device including a pixel array unit including unit pixels. Each unit pixel includes a photoelectric converter, column signal lines and a number of analog-digital converting units. The unit pixels are selectively controlled in units of rows. Analog signals output from the unit pixels in a row selected by the selective control though the column signal lines are converted to digital signals via the analog-digital converting units. The digital signals are added among a number of unit pixels via the analog-digital converting units. The added digital signals from the analog-digital converting units are read. Each unit pixel in the pixel array unit is selectively controlled in units of arbitrary rows, the analog-distal converting units being operable to performing the converting in a (a) normal-frame-rate mode and a (b) high-frame-rate mode in response to control signals.
摘要翻译：一种用于驱动包括包括单位像素的像素阵列单元的固态图像拾取装置的系统和方法。每个单位像素包括光电转换器，列信号线和多个模数转换单元。以行为单位选择性地控制单位像素。通过选择性控制通过列信号线选择的行中的单位像素输出的模拟信号经由模拟数字转换单元转换成数字信号。数字信号通过模拟数字转换单元被添加到多个单位像素中。读取来自模拟数字转换单元的附加数字信号。像素阵列单元中的每个单位像素以任意行为单位选择性地被控制，所述模拟 - 远端转换单元可操作以以（a）正常帧速率模式和（b）高帧速率模式响应于控制信号。

50. 发明授权

US07315273B2 Analog-to-digital conversion method, analog-to-digital converter, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
公开(公告)号：US07315273B2
公开(公告)日：2008-01-01
申请号：US11268428
申请日：2005-11-07
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/34
CPC分类号： H03M1/1295 , H03K5/2481 , H03K5/249 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： In an analog-to-digital conversion method for converting a difference signal component representing a difference between a reference component and a signal component in an analog signal to be processed into digital data, in a first process, a signal corresponding to one of the reference component and the signal component is compared with a reference signal for conversion into the digital data. Concurrently with the comparison, counting is performed in one of a down-count mode and an up-count mode, and a count value at a time of completion of the comparison is held. In a second process, a signal corresponding to the other one of the reference component and the signal component is compared with the reference signal. Concurrently with the comparison, counting is performed in the other one of the down-count mode and the up-count mode, and a count value at a time of completion of the comparison is held.

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