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    • 44. 发明申请
    • OPERATING METHOD OF TEST HANDLER
    • 测试手术操作方法
    • US20080238470A1
    • 2008-10-02
    • US12051959
    • 2008-03-20
    • Yun Sung NaIn Gu JeonDong Hyun YoHyun Song
    • Yun Sung NaIn Gu JeonDong Hyun YoHyun Song
    • G01R31/26
    • G01R31/2893
    • Operation methods of test handler are disclosed. The pick-and-place apparatus picks up semiconductor devices from first loading compartments arrayed in a matrix on a first loading element, moves, and places onto second loading compartments arrayed in a matrix on a second loading element. Pickers of the pick-and-place apparatus pick up the semiconductor devices from the first loading compartments and place them selectively onto a plurality of adjacent odd rows or a plurality of adjacent even rows of the second loading compartments during one operation. The pick-and-place apparatus includes a relatively large number of the pickers, preferably arrayed in a matrix, and thus performs loading and unloading of semiconductor devices at a relatively high speed.
    • 公开了测试处理器的操作方法。 拾取和放置装置从在第一加载元件上排列成矩阵的第一加载隔间拾取半导体器件,移动并放置在第二加载元件上排列成矩阵的第二加载隔间上。 拾取和放置装置的拾取器从第一加载隔间拾取半导体器件,并且在一次操作期间将它们选择性地放置在第二加载隔间的多个相邻奇数行或多个相邻偶数行上。 拾取和放置装置包括相对大量的拾取器,优选地排列成矩阵,并且因此以相对高的速度执行半导体器件的装载和卸载。
    • 45. 发明申请
    • PICK AND PLACE APPARATUS
    • 拍摄和放置设备
    • US20080213078A1
    • 2008-09-04
    • US12103306
    • 2008-04-15
    • Jae Gyun SHIMYun Sung NAIn Gu JEONTae Hung KUDong Hyun YO
    • Jae Gyun SHIMYun Sung NAIn Gu JEONTae Hung KUDong Hyun YO
    • B65G1/133
    • G01R31/2893H05K13/0482
    • A pick and place apparatus includes a plurality of device holing elements in a predetermined arrangement; a power supply mechanism for supplying a power for controlling a horizontal pitch between the plurality of device holding elements; a power transmission mechanism for delivering the power from the power supply mechanism to the plurality of device holding elements as a translational force in a horizontal direction; a first linear motion guide mechanism for guiding horizontal movements of some of the plurality of device holding elements; and a second linear motion guide mechanism disposed below the first linear motion guide mechanism, for guiding horizontal movements of the other device holding elements. The plurality of device holding elements are slidably coupled to the first and the second linear motion guide mechanism alternately.
    • 拾取和放置装置包括预定布置的多个装置孔元件; 电源机构,用于提供用于控制所述多个设备保持元件之间的水平间距的电力; 动力传递机构,用于将来自供电机构的动力作为水平方向的平移力传递到多个装置保持元件; 用于引导所述多个装置保持元件中的一些的水平移动的第一线性运动引导机构; 以及第二线性运动引导机构,其设置在所述第一线性运动引导机构的下方,用于引导所述另一装置保持元件的水平运动。 多个装置保持元件交替地可滑动地联接到第一和第二直线运动引导机构。
    • 46. 发明申请
    • Test handler
    • 测试处理程序
    • US20080018354A1
    • 2008-01-24
    • US11727851
    • 2007-03-28
    • Jae-Gyun ShimYun-Sung NaIn-Gu JeonTae-Hung KuJae-Sung ParkSu-Myung Lee
    • Jae-Gyun ShimYun-Sung NaIn-Gu JeonTae-Hung KuJae-Sung ParkSu-Myung Lee
    • G01R1/04
    • G01R31/2893
    • A test handler is disclosed in the present invention. The test handler may include a test tray on which a plurality of inserts are arrayed for loading at least one semiconductor device, at least one opening unit for simultaneously opening one part of the plurality of inserts which are arrayed on one part of the test tray, and a test tray transfer apparatus for allowing the opening unit to simultaneously open other parts of the plurality of inserts which are arrayed on another part of the test tray as the test tray is transferred. Therefore, although semiconductor devices to be tested change their sizes, the replaced parts of the test handler are reduced in number, thereby reducing manufacturing cost and replacement work time. The inventive test handler reduces semiconductor devices loading time, reduces jamming, increases teaching efficiency and improves space utilization efficiency. Furthermore, the test handler can be applied to various types of testers.
    • 在本发明中公开了一种测试处理器。 测试处理器可以包括其上布置有多个插入件以装载至少一个半导体器件的测试托盘,用于同时打开排列在测试托盘的一部分上的多个插入件的一部分的至少一个开口单元, 以及测试托盘传送装置,用于允许打开单元同时打开在传送测试托盘时排列在测试托盘的另一部分上的多个插入件的其他部分。 因此,尽管要测试的半导体器件改变其尺寸,但是测试处理器的更换部件数量减少,从而降低制造成本和更换工作时间。 本发明的测试处理器减少半导体器件的加载时间,减少干扰,提高教学效率并提高空间利用效率。 此外,测试处理程序可以应用于各种类型的测试器。
    • 49. 发明授权
    • Test handler
    • 测试处理程序
    • US08026735B2
    • 2011-09-27
    • US12368930
    • 2009-02-10
    • Jae-Gyun ShimYun-Sung NaIn-Gu JeonTae-Hung KuJae-Sung ParkSu-Myung Lee
    • Jae-Gyun ShimYun-Sung NaIn-Gu JeonTae-Hung KuJae-Sung ParkSu-Myung Lee
    • G01R31/26G01R31/28
    • G01R31/2893
    • A test handler is disclosed in the present invention. The test handler may include a test tray on which a plurality of inserts are arrayed for loading at least one semiconductor device, at least one opening unit for simultaneously opening one part of the plurality of inserts which are arrayed on one part of the test tray, and a test tray transfer apparatus for allowing the opening unit to simultaneously open other parts of the plurality of inserts which are arrayed on another part of the test tray as the test tray is transferred. Therefore, although semiconductor devices to be tested change their sizes, the replaced parts of the test handler are reduced in number, thereby reducing manufacturing cost and replacement work time. The inventive test handler reduces semiconductor devices loading time, reduces jamming, increases teaching efficiency and improves space utilization efficiency. Furthermore, the test handler can be applied to various types of testers.
    • 在本发明中公开了一种测试处理器。 测试处理器可以包括其上布置有多个插入件以装载至少一个半导体器件的测试托盘,用于同时打开排列在测试托盘的一部分上的多个插入件的一部分的至少一个开口单元, 以及测试托盘传送装置,用于允许打开单元同时打开在传送测试托盘时排列在测试托盘的另一部分上的多个插入件的其他部分。 因此,尽管要测试的半导体器件改变其尺寸,但是测试处理器的更换部件数量减少,从而降低制造成本和更换工作时间。 本发明的测试处理器减少半导体器件的加载时间,减少干扰,提高教学效率并提高空间利用效率。 此外,测试处理程序可以应用于各种类型的测试器。