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41. 发明授权

US06917539B2 High-density NVRAM 有权
标题翻译：高密度NVRAM
公开(公告)号：US06917539B2
公开(公告)日：2005-07-12
申请号：US10360005
申请日：2003-02-07
申请人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Steve Kuo-Ren Hsia , Wayne Kinney
发明人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Steve Kuo-Ren Hsia , Wayne Kinney
IPC分类号： G11C11/56 , G11C13/00 , G11C11/14
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/71 , G11C2213/77
摘要： High density NVRAM. An array of memory cells capable of storing at least a megabit of information, each memory cell including a memory plug that includes a memory element that switches from a first resistance state to a second resistance state upon application of a first write voltage of a first polarity and reversibly switches from the second resistance state to the first resistance state upon application of a second write voltage of polarity opposite to the first polarity.
摘要翻译：高密度NVRAM。一种能够存储至少一兆位信息的存储器单元阵列，每个存储器单元包括存储器插件，该存储器插件包括存储元件，该存储器元件在施加第一极性的第一写入电压时从第一电阻状态切换到第二电阻状态并且当施加与第一极性相反的极性的第二写入电压时，可逆地从第二电阻状态切换到第一电阻状态。

42. 发明授权

US06906939B2 Re-writable memory with multiple memory layers 有权
公开(公告)号：US06906939B2
公开(公告)日：2005-06-14
申请号：US10612191
申请日：2003-07-01
申请人： Darrell Rinerson , Christophe J. Chevallier , Steven W. Longcor , Wayne Kinney , Edmond R. Ward
发明人： Darrell Rinerson , Christophe J. Chevallier , Steven W. Longcor , Wayne Kinney , Edmond R. Ward
IPC分类号： G11C11/56 , G11C13/00 , G11C16/02 , H01L27/24 , G11C5/06
CPC分类号： G11C13/0007 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C2213/31
摘要： A re-writable memory with multiple memory layers. Using both terminals of a memory cell in a stacked cross point structure for selection purposes allows multiple layers of conductive lines to be selected as long as there is only one memory cell that has two terminals selected. Sharing logic over multiple layers allows driver sets to be reused.

43. 发明授权

US06870755B2 Re-writable memory with non-linear memory element 失效
标题翻译：具有非线性存储元件的可重写存储器
公开(公告)号：US06870755B2
公开(公告)日：2005-03-22
申请号：US10604556
申请日：2003-07-30
申请人： Darrell Rinerson , Christophe J. Chevallier , Steven W. Longcor , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia
发明人： Darrell Rinerson , Christophe J. Chevallier , Steven W. Longcor , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia
IPC分类号： G11C13/00 , G11C11/00
CPC分类号： G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/77
摘要： A re-writable memory that uses resistive memory cell elements with non-linear IV characteristics is disclosed. Non-linearity is important in certain memory arrays to prevent unselected cells from being disturbed and to reduce the required current. Non-linearity refers to the ability of the element to block the majority of current up to a certain level, but then, once that level is reached, the element allows the majority of the current over and above that level to flow.
摘要翻译：公开了一种使用具有非线性IV特性的电阻性存储单元元件的可重写存储器。在某些存储器阵列中非线性是重要的，以防止未选择的单元被干扰并减少所需的电流。非线性是指元件将大多数电流阻塞到一定水平的能力，但是，一旦达到该电平，该元件允许超过该电平的大部分电流流动。

44. 发明授权

US06753561B1 Cross point memory array using multiple thin films 有权
标题翻译：使用多个薄膜的交叉点存储阵列
公开(公告)号：US06753561B1
公开(公告)日：2004-06-22
申请号：US10330512
申请日：2002-12-26
申请人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Steve Kuo-Ren Hsia , Wayne Kinney , Christophe J. Chevallier
发明人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Steve Kuo-Ren Hsia , Wayne Kinney , Christophe J. Chevallier
IPC分类号： H01L31062
CPC分类号： H01L27/2418 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/76 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/147 , H01L45/165
摘要： Cross point memory array using multiple thin films. The invention is a cross point memory array that uses conductive array lines and multiple thin films as a memory plug. The thin films of the memory plug include a memory element and a non-ohmic device. The memory element switches between resistive states upon application of voltage pulses and the non-ohmic device imparts a relatively high resistance to the memory plug upon application of low magnitude voltages.
摘要翻译：使用多个薄膜的交叉点存储阵列。本发明是使用导电阵列线和多个薄膜作为存储器插头的交叉点存储器阵列。存储器插头的薄膜包括存储器元件和非欧姆器件。存储器元件在施加电压脉冲时在电阻状态之间切换，并且非欧姆器件在施加低幅度电压时对存储器插头施加相当高的电阻。

45. 发明授权

US08395928B2 Threshold device for a memory array 有权
公开(公告)号：US08395928B2
公开(公告)日：2013-03-12
申请号：US13206460
申请日：2011-08-09
申请人： Julie Casperson Brewer , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Darrell Rinerson , Lawrence Schloss
发明人： Julie Casperson Brewer , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Darrell Rinerson , Lawrence Schloss
IPC分类号： G11C11/36
CPC分类号： G11C7/02 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/32 , G11C2213/71 , G11C2213/76 , H01L27/2418 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/147
摘要： A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.

46. 发明授权

US08320161B2 Conductive metal oxide structures in non volatile re writable memory devices 有权
标题翻译：非易失性可重写存储器件中的导电金属氧化物结构
公开(公告)号：US08320161B2
公开(公告)日：2012-11-27
申请号：US13252932
申请日：2011-10-04
申请人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Rene Meyer
发明人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Rene Meyer
IPC分类号： G11C11/21
CPC分类号： H01L45/085 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C2013/0073 , G11C2213/56 , G11C2213/71 , G11C2213/72 , G11C2213/74 , G11C2213/76
摘要： A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).
摘要翻译：公开了包括与导电金属氧化物（CMO）接触的电解绝缘体的存储元件的存储单元。 CMO包括晶体结构并且可以包含烧绿石氧化物，导电二元氧化物，多个B位钙钛矿和Ruddlesden-Popper结构。 CMO包括可以响应于施加在电解绝缘体和CMO上施加的写入电压产生的适当幅度和方向的电场，可以将其输送到电解绝缘体/从电解绝缘体传输的移动离子。存储器单元可以包括与存储元件电串联的非欧姆器件（NOD）。存储器单元可以位于单层存储器中的两端交叉点存储器阵列中的导电阵列线的交叉点或多个垂直堆叠的存储器层之间，该衬底层在衬底上制造，该衬底包括用于数据的有源电路对数组层进行操作。

47. 发明授权

US08045364B2 Non-volatile memory device ion barrier 失效
公开(公告)号：US08045364B2
公开(公告)日：2011-10-25
申请号：US12653838
申请日：2009-12-18
申请人： Lawrence Schloss , Rene Meyer , Wayne Kinney , Roy Lambertson , Julie Casperson Brewer
发明人： Lawrence Schloss , Rene Meyer , Wayne Kinney , Roy Lambertson , Julie Casperson Brewer
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/32 , H01L27/2409 , H01L27/2418 , H01L27/2472 , H01L27/2481 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile.

48. 发明授权

US07884349B2 Selection device for re-writable memory 有权
标题翻译：可重写存储器的选择装置
公开(公告)号：US07884349B2
公开(公告)日：2011-02-08
申请号：US12283339
申请日：2008-09-11
申请人： Darrell Rinerson , Steve Kuo-Ren Hsia , Steven W. Longcor , Wayne Kinney , Edmond Ward , Christophe J. Chevallier
发明人： Darrell Rinerson , Steve Kuo-Ren Hsia , Steven W. Longcor , Wayne Kinney , Edmond Ward , Christophe J. Chevallier
IPC分类号： H01L29/06
CPC分类号： H01L27/101 , G11C11/00 , G11C11/56 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/77 , G11C2213/79 , H01L27/11502 , H01L27/11507 , H01L27/24 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/00 , H01L45/10 , H01L45/1233 , H01L45/147
摘要： A memory cell including a memory element and a non-ohmic device (NOD) that are electrically in series with each other is disclosed. The NOD comprises a semiconductor based selection device operative to electrically isolate the memory element from a range of voltages applied across the memory cell that are not read voltages operative read stored data from the memory element or write voltages operative to write data to the memory element. The selection device may comprise a pair of diodes that are electrically in series with each other and disposed in a back-to-back configuration. The memory cell may be fabricated over a substrate (e.g., a silicon wafer) that includes active circuitry. The selection device and the semiconductor materials (e.g., poly-silicon) that form the selection device are fabricated above the substrate and are integrated with other thin film layers of material that form the memory cell.
摘要翻译：公开了一种包括彼此电串联的存储元件和非欧姆器件（NOD）的存储单元。 NOD包括基于半导体的选择装置，其操作以将存储器元件与施加在存储器单元上的电压范围电隔离，所述电压范围不是读取电压，从存储元件读取存储的数据，或者写入电压可操作以将数据写入存储器元件。选择装置可以包括彼此电连接并以背对背配置设置的一对二极管。可以在包括有源电路的衬底（例如，硅晶片）上制造存储器单元。形成选择装置的选择装置和半导体材料（例如，多晶硅）制造在衬底之上，并与形成存储单元的材料的其它薄膜层集成。

49. 发明申请

US20070152202A1 Roller jack assembly and methods of using same 审中-公开
标题翻译：滚筒千斤顶总成及使用方法
公开(公告)号：US20070152202A1
公开(公告)日：2007-07-05
申请号：US11324622
申请日：2006-01-03
申请人： Wayne Kinney
发明人： Wayne Kinney
IPC分类号： B66F5/00
CPC分类号： B66F7/26 , B66F3/245 , B66F5/04
摘要： A roller jack assembly is provided for supporting at least one roller of a dozer. The roller jack assembly includes a frame assembly, a jack frame assembly, and a jack assembly. The frame assembly is disposable on a supporting structure. The jack frame assembly is supported by the frame assembly. The jack frame assembly has a jack frame and means for selectively moving the jack frame along the frame assembly. The jack assembly is supported by the jack frame of the jack frame assembly. The jack assembly has a base frame, a jack supported by the base frame, means for selectively moving the base frame along the jack frame and a roller support member supported by the jack for engaging and supporting at least one roller of the dozer.
摘要翻译：提供了用于支撑推土机的至少一个辊的滚子千斤顶组件。滚子千斤顶组件包括框架组件，千斤顶框架组件和千斤顶组件。框架组件一次性在支撑结构上。插座框架组件由框架组件支撑。插座框架组件具有插座框架和用于沿着框架组件选择性地移动插座框架的装置。千斤顶组件由千斤顶框架组件的千斤顶框架支撑。千斤顶组件具有底架，由底架支撑的千斤顶，用于选择性地沿底座框架移动底座的装置和由千斤顶支撑的滚子支撑构件，用于接合和支撑推土机的至少一个滚子。

50. 发明授权

US07095643B2 Re-writable memory with multiple memory layers 有权
标题翻译：具有多个内存层的可重写内存
公开(公告)号：US07095643B2
公开(公告)日：2006-08-22
申请号：US11151880
申请日：2005-06-13
申请人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Steven W. Longcor , Edmond R. Ward
发明人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Steven W. Longcor , Edmond R. Ward
IPC分类号： G11C5/06
CPC分类号： G11C13/0007 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C2213/31
摘要： A re-writable memory with multiple memory layers. Using both terminals of a memory cell in a stacked cross point structure for selection purposes allows multiple layers of conductive lines to be selected as long as there is only one memory cell that has two terminals selected. Sharing logic over multiple layers allows driver sets to be reused.
摘要翻译：具有多个内存层的可重写内存。只要存在只有一个选择了两个端子的存储单元，就可以选择使用层叠交叉点结构中的存储单元的两个端子进行选择，以便选择多层导电线。通过多层共享逻辑可以重新使用驱动程序集。

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