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1. 发明授权

US08565006B2 Conductive metal oxide structures in non volatile re writable memory devices 有权
标题翻译：非易失性可重写存储器件中的导电金属氧化物结构
公开(公告)号：US08565006B2
公开(公告)日：2013-10-22
申请号：US13719106
申请日：2012-12-18
申请人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Rene Meyer
发明人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Rene Meyer
IPC分类号： G11C13/00
CPC分类号： H01L45/085 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C2013/0073 , G11C2213/56 , G11C2213/71 , G11C2213/72 , G11C2213/74 , G11C2213/76
摘要： A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).
摘要翻译：公开了包括与导电金属氧化物（CMO）接触的电解绝缘体的存储元件的存储单元。 CMO包括晶体结构并且可以包含烧绿石氧化物，导电二元氧化物，多个B位钙钛矿和Ruddlesden-Popper结构。 CMO包括可以响应于施加在电解绝缘体和CMO上施加的写入电压产生的适当幅度和方向的电场，可以将其输送到电解绝缘体/从电解绝缘体传输的移动离子。存储器单元可以包括与存储元件电串联的非欧姆器件（NOD）。存储器单元可以位于单层存储器中的两端交叉点存储器阵列中的导电阵列线的交叉点或多个垂直堆叠的存储器层之间，该衬底层在衬底上制造，该衬底包括用于数据的有源电路对数组层进行操作。

2. 发明申请

US20120033481A1 Memory Element With A Reactive Metal Layer 有权
标题翻译：具有活性金属层的记忆元件
公开(公告)号：US20120033481A1
公开(公告)日：2012-02-09
申请号：US13272985
申请日：2011-10-13
申请人： DARRELL RINERSON , WAYNE KINNEY , EDMOND R. WARD , STEVE KUO-REN HSIA , STEVEN LONGCOR , CHRISTOPHE J. CHEVALLIER , JOHN SANCHEZ , PHILIP F. S. SWAB
发明人： DARRELL RINERSON , WAYNE KINNEY , EDMOND R. WARD , STEVE KUO-REN HSIA , STEVEN LONGCOR , CHRISTOPHE J. CHEVALLIER , JOHN SANCHEZ , PHILIP F. S. SWAB
IPC分类号： G11C11/00
CPC分类号： H01L27/2463 , G11C11/16 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/31 , G11C2213/32 , G11C2213/71 , G11C2213/77 , G11C2213/79 , H01L27/24 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1633 , H01L45/1658
摘要： A memory cell including conductive oxide electrodes is disclosed. The memory cell includes a memory element operative to store data as a plurality of resistive states. The memory element includes a layer of a conductive metal oxide (CMO) (e.g., a perovskite) in contact with an electrode that may comprise one or more layers of material. At least one of those layers of material can be a conductive oxide (e.g., a perovskite such as LaSrCoO3—LSCoO or LaNiO3—LNO) that is in contact with the CMO. The conductive oxide layer can be selected as a seed layer operative to provide a good lattice match with and/or a lower crystallization temperature for the CMO. The conductive oxide layer may also be in contact with a metal layer (e.g., Pt). The memory cell additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays, such as non-volatile two-terminal cross-point memory arrays.
摘要翻译：公开了一种包括导电氧化物电极的存储单元。存储单元包括用于将数据存储为多个电阻状态的存储元件。存储元件包括与可包括一层或多层材料的电极接触的导电金属氧化物（CMO）（例如，钙钛矿）层。这些材料层中的至少一层可以是与CMO接触的导电氧化物（例如，诸如LaSrCoO3-LSCoO或LaNiO3-LNO的钙钛矿）。可以选择导电氧化物层作为晶种层，以为CMO提供良好的晶格匹配和/或较低的结晶温度。导电氧化物层也可以与金属层（例如Pt）接触。存储单元还具有非线性IV特性，这在某些阵列中是有利的，例如非易失性两端交叉点存储阵列。

3. 发明授权

US07889539B2 Multi-resistive state memory device with conductive oxide electrodes 有权
公开(公告)号：US07889539B2
公开(公告)日：2011-02-15
申请号：US12653486
申请日：2009-12-14
申请人： Darrell Rinerson , Wayne Kinney , Edmond Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe Chevallier , John E. Sanchez, Jr. , Philip Swab
发明人： Darrell Rinerson , Wayne Kinney , Edmond Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe Chevallier , John E. Sanchez, Jr. , Philip Swab
IPC分类号： G11C11/00 , H01L49/00
CPC分类号： H01L27/2463 , G11C11/16 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/31 , G11C2213/32 , G11C2213/71 , G11C2213/77 , G11C2213/79 , H01L27/24 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1633 , H01L45/1658
摘要： A memory cell including conductive oxide electrodes is disclosed. The memory cell includes a memory element operative to store data as a plurality of resistive states. The memory element includes a layer of a conductive metal oxide (CMO) (e.g., a perovskite) in contact with an electrode that may comprise one or more layers of material. At least one of those layers of material can be a conductive oxide (e.g., a perovskite such as LaSrCoO3-LSCoO or LaNiO3-LNO) that is in contact with the CMO. The conductive oxide layer can be selected as a seed layer operative to provide a good lattice match with and/or a lower crystallization temperature for the CMO. The conductive oxide layer may also be in contact with a metal layer (e.g., Pt). The memory cell additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays, such as non-volatile two-terminal cross-point memory arrays.

4. 发明申请

US20100157657A1 Multi-resistive state memory device with conductive oxide electrodes 有权
标题翻译：具有导电氧化物电极的多电阻状态存储器件
公开(公告)号：US20100157657A1
公开(公告)日：2010-06-24
申请号：US12653486
申请日：2009-12-14
申请人： Darrell Rinerson , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe J. Chevallier , John Sanchez , Philip F.S. Swab
发明人： Darrell Rinerson , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe J. Chevallier , John Sanchez , Philip F.S. Swab
IPC分类号： G11C11/00
CPC分类号： H01L27/2463 , G11C11/16 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/31 , G11C2213/32 , G11C2213/71 , G11C2213/77 , G11C2213/79 , H01L27/24 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1633 , H01L45/1658
摘要： A memory cell including conductive oxide electrodes is disclosed. The memory cell includes a memory element operative to store data as a plurality of resistive states. The memory element includes a layer of a conductive metal oxide (CMO) (e.g., a perovskite) in contact with an electrode that may comprise one or more layers of material. At least one of those layers of material can be a conductive oxide (e.g., a perovskite such as LaSrCoO3-LSCoO or LaNiO3-LNO) that is in contact with the CMO. The conductive oxide layer can be selected as a seed layer operative to provide a good lattice match with and/or a lower crystallization temperature for the CMO. The conductive oxide layer may also be in contact with a metal layer (e.g., Pt). The memory cell additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays, such as non-volatile two-terminal cross-point memory arrays.
摘要翻译：公开了一种包括导电氧化物电极的存储单元。存储单元包括用于将数据存储为多个电阻状态的存储元件。存储元件包括与可包括一层或多层材料的电极接触的导电金属氧化物（CMO）（例如，钙钛矿）层。这些材料层中的至少一层可以是与CMO接触的导电氧化物（例如，诸如LaSrCoO3-LSCoO或LaNiO3-LNO的钙钛矿）。可以选择导电氧化物层作为晶种层，以为CMO提供良好的晶格匹配和/或较低的结晶温度。导电氧化物层也可以与金属层（例如Pt）接触。存储单元还具有非线性IV特性，这在某些阵列中是有利的，例如非易失性两端交叉点存储阵列。

5. 发明申请

US20090016094A1 Selection device for Re-Writable memory 有权
标题翻译：可重写存储器的选择装置
公开(公告)号：US20090016094A1
公开(公告)日：2009-01-15
申请号：US12283339
申请日：2008-09-11
申请人： Darrell Rinerson , Steve Kuo-Ren Hsia , Steven W. Longcor , Wayne Kinney , Edmond B. Ward , Christophe J. Chevallier
发明人： Darrell Rinerson , Steve Kuo-Ren Hsia , Steven W. Longcor , Wayne Kinney , Edmond B. Ward , Christophe J. Chevallier
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C11/00 , G11C11/56 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/77 , G11C2213/79 , H01L27/11502 , H01L27/11507 , H01L27/24 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/00 , H01L45/10 , H01L45/1233 , H01L45/147
摘要： A memory cell including a memory element and a non-ohmic device (NOD) that are electrically in series with each other is disclosed. The NOD comprises a semiconductor based selection device operative to electrically isolate the memory element from a range of voltages applied across the memory cell that are not read voltages operative read stored data from the memory element or write voltages operative to write data to the memory element. The selection device may comprise a pair of diodes that are electrically in series with each other and disposed in a back-to-back configuration. The memory cell may be fabricated over a substrate (e.g., a silicon wafer) that includes active circuitry. The selection device and the semiconductor materials (e.g., poly-silicon) that form the selection device are fabricated above the substrate and are integrated with other thin film layers of material that form the memory cell.
摘要翻译：公开了一种包括彼此电串联的存储元件和非欧姆器件（NOD）的存储单元。 NOD包括基于半导体的选择装置，其操作以将存储器元件与施加在存储器单元上的电压范围电隔离，所述电压范围不是读取电压，从存储元件读取存储的数据，或者写入电压可操作以将数据写入存储器元件。选择装置可以包括彼此电连接并以背对背配置设置的一对二极管。可以在包括有源电路的衬底（例如，硅晶片）上制造存储器单元。形成选择装置的选择装置和半导体材料（例如，多晶硅）制造在衬底之上，并与形成存储单元的材料的其它薄膜层集成。

6. 发明申请

US20080293196A1 Method for fabricating multi-resistive state memory devices 有权
标题翻译：制造多电阻状态存储器件的方法
公开(公告)号：US20080293196A1
公开(公告)日：2008-11-27
申请号：US12215958
申请日：2008-06-30
申请人： Darrell Rinerson , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe J. Chevallier , John Sanchez , Philip F.S. Swab
发明人： Darrell Rinerson , Wayne Kinney , Edmond R. Ward , Steve Kuo-Ren Hsia , Steven W. Longcor , Christophe J. Chevallier , John Sanchez , Philip F.S. Swab
IPC分类号： H01L21/8244
CPC分类号： H01L27/2463 , G11C11/16 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/31 , G11C2213/32 , G11C2213/71 , G11C2213/77 , G11C2213/79 , H01L27/24 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1633 , H01L45/1658
摘要： A treated conductive element is provided. A conductive element can be treated by depositing either a reactive metal or a very thin layer of material on the conductive element. The reactive metal (or very thin layer of material) would typically be sandwiched between the conductive element and an electrode. The structure additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays.
摘要翻译：提供经处理的导电元件。可以通过在导电元件上沉积反应性金属或非常薄的材料层来处理导电元件。反应性金属（或非常薄的材料层）通常将夹在导电元件和电极之间。该结构还具有非线性IV特性，这在某些阵列中是有利的。

7. 发明授权

US07180772B2 High-density NVRAM 有权
标题翻译：高密度NVRAM
公开(公告)号：US07180772B2
公开(公告)日：2007-02-20
申请号：US11179790
申请日：2005-07-11
申请人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Wayne Kinney
发明人： Darrell Rinerson , Steven W. Longcor , Edmond R. Ward , Wayne Kinney
IPC分类号： G11C11/14
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/71 , G11C2213/77
摘要： A cross point array and peripheral circuitry that accesses the cross point array. The peripheral circuitry receives a supply voltage of approximately 1.8 volts or less, generates voltages of a magnitude not more than approximately 3 volts, and senses current that is indicative of a nonvolatile memory state.
摘要翻译：交叉点阵列和访问交叉点阵列的外围电路。外围电路接收大约1.8伏或更小的电源电压，产生不大于约3伏的电压，并且感测指示非易失性存储器状态的电流。

8. 发明申请

US20060245243A1 Multi-resistive state element with reactive metal 有权
公开(公告)号：US20060245243A1
公开(公告)日：2006-11-02
申请号：US11473005
申请日：2006-06-22
申请人： Darrell Rinerson , Wayne Kinney , Edmond Ward , Steve Hsia , Steven Longcor , Christophe Chevallier , John Sanchez , Philip Swab
发明人： Darrell Rinerson , Wayne Kinney , Edmond Ward , Steve Hsia , Steven Longcor , Christophe Chevallier , John Sanchez , Philip Swab
IPC分类号： G11C11/14
CPC分类号： H01L27/2463 , G11C11/16 , G11C11/5685 , G11C13/0002 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/31 , G11C2213/32 , G11C2213/71 , G11C2213/77 , G11C2213/79 , H01L27/24 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1633 , H01L45/1658
摘要： A treated conductive element is provided. A conductive element can be treated by depositing either a reactive metal or a very thin layer of material on the conductive element. The reactive metal (or very thin layer of material) would typically be sandwiched between the conductive element and an electrode. The structure additionally exhibits non-linear IV characteristics, which can be favorable in certain arrays.

9. 发明申请

US20060171200A1 Memory using mixed valence conductive oxides 审中-公开
标题翻译：使用混合价态导电氧化物的记忆
公开(公告)号：US20060171200A1
公开(公告)日：2006-08-03
申请号：US11095026
申请日：2005-03-30
申请人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Steven Longcor , John Sanchez , Lawrence Schloss , Philip Swab , Edmond Ward
发明人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Steven Longcor , John Sanchez , Lawrence Schloss , Philip Swab , Edmond Ward
IPC分类号： G11C11/34
CPC分类号： H01L45/08 , G06F17/5045 , G11C11/5685 , G11C13/0007 , G11C13/0009 , G11C13/004 , G11C13/0069 , G11C2013/0045 , G11C2013/005 , G11C2013/009 , G11C2213/11 , G11C2213/31 , G11C2213/32 , G11C2213/53 , G11C2213/54 , G11C2213/56 , G11C2213/71 , G11C2213/79 , H01L27/2436 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1625
摘要： A memory using a mixed valence conductive oxides. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.
摘要翻译：使用混合价态导电氧化物的记忆。存储器包括在其缺氧状态下导电性较差的混合价态导电氧化物和作为电解质的氧的混合电子离子导体并且促进有效引起氧离子运动的电场。

10. 发明授权

US07067862B2 Conductive memory device with conductive oxide electrodes 失效
标题翻译：具有导电氧化物电极的导电存储器件
公开(公告)号：US07067862B2
公开(公告)日：2006-06-27
申请号：US10682277
申请日：2003-10-08
申请人： Darrell Rinerson , Steven W. Longcor , Steve Kuo-Ren Hsia , Wayne Kinney , Edmond R. Ward , Christophe J. Chevallier
发明人： Darrell Rinerson , Steven W. Longcor , Steve Kuo-Ren Hsia , Wayne Kinney , Edmond R. Ward , Christophe J. Chevallier
IPC分类号： H01L31/062
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/76 , G11C2213/77 , H01L27/24 , H01L27/2418 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/147 , H01L45/165
摘要： A multi-resistive state element that uses barrier electrodes is provided. If certain materials are used as electrodes, the electrodes can be used for multiple purposes. Oxides and nitrides are especially well suited for acting as a barrier layer, and possibly even an adhesion layer and a sacrificial layer.
摘要翻译：提供了使用阻挡电极的多电阻状态元件。如果使用某些材料作为电极，电极可用于多种用途。氧化物和氮化物特别适用于作为阻挡层，甚至可能甚至粘附层和牺牲层。

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