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41. 发明申请

US20160013045A1 METHOD AND SYSTEM FOR GALLIUM NITRIDE ELECTRONIC DEVICES USING ENGINEERED SUBSTRATES 审中-公开
标题翻译：使用工程衬底的氮化镓电子器件的方法和系统
公开(公告)号：US20160013045A1
公开(公告)日：2016-01-14
申请号：US14617854
申请日：2015-02-09
申请人： Avogy, Inc.
发明人： Hui Nie , Donald R. Disney , Isik C. Kizilyalli
IPC分类号： H01L21/02 , H01L21/683
CPC分类号： H01L21/0254 , H01L21/02645 , H01L21/6835 , H01L24/83 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/66356 , H01L29/66446 , H01L29/739 , H01L29/8083 , H01L29/861 , H01L29/872 , H01L2221/68327 , H01L2224/04026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/32245 , H01L2224/83801 , H01L2224/8384 , H01L2924/12032 , H01L2924/13062 , H01L2924/00014 , H01L2924/00
摘要： A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the GaN-based functional layers and removing at least a portion of the engineered substrate structure. The method further includes forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers and removing the carrier substrate.
摘要翻译：一种制造电子器件的方法包括提供包括III族氮化物种子层的工程化衬底结构，形成与III族氮化物种子层耦合的GaN基功能层，以及形成电耦合到至少一部分 GaN基功能层。该方法还包括将与GaN基功能层相对的载体衬底接合并去除工程衬底结构的至少一部分。该方法还包括形成电耦合到GaN基功能层的至少另一部分并去除载体衬底的第二电极结构。

42. 发明申请

US20150357919A1 METHOD AND SYSTEM FOR VARIABLE OUTPUT POWER SUPPLY 审中-公开
标题翻译：可变输出电源的方法和系统
公开(公告)号：US20150357919A1
公开(公告)日：2015-12-10
申请号：US14301046
申请日：2014-06-10
申请人： Avogy, Inc.
发明人： Antoin Russell , Alberto Doronzo , Saeed Alipour
IPC分类号： H02M3/335
CPC分类号： H02M3/33507 , H01R13/6675 , H01R31/065 , H02M3/28 , H02M2001/0025
摘要： A variable output power supply includes a power unit comprising a housing including an output port and a controller disposed in the housing and in communication with the output port. The variable output power supply also includes a power cable. The controller is operable to modify operation of the output port in response, at least in part, to insertion of the power cable in the output port.
摘要翻译：可变输出电源包括功率单元，其包括壳体，所述壳体包括输出端口和设置在壳体中并与输出端口连通的控制器。可变输出电源还包括电源线。控制器可操作以至少部分地修改输出端口的操作以将电力电缆插入输出端口。

43. 发明申请

US20150263628A1 RESONANT CONVERTER AND CONTROL 审中-公开
标题翻译：谐振转换器和控制
公开(公告)号：US20150263628A1
公开(公告)日：2015-09-17
申请号：US14213195
申请日：2014-03-14
申请人： AVOGY, INC.
发明人： Antoin Russell , Alberto Doronzo
IPC分类号： H02M3/335
CPC分类号： H02M3/1588 , H02M3/156 , H02M2001/0058 , Y02B70/1425 , Y02B70/1466 , Y02B70/1491
摘要： An embodiment of non-isolated resonant converter includes resonant circuitry having inductive and capacitive elements configured to create electrical resonance when an input voltage is applied, a first electrical switch coupled to the resonant circuitry such that the first electrical switch conducts a current of the resonant circuitry, and voltage-monitoring circuitry coupled to the resonant circuitry and configured to determine when there is substantially no voltage across the first electrical switch. The non-isolated resonant converter further includes control circuitry configured to receive an input from the voltage-monitoring circuitry, and operate the first electrical switch. The control circuitry is configured to turn the first electrical switch on when substantially no voltage is detected across the first electrical switch.
摘要翻译：非隔离谐振转换器的实施例包括谐振电路，其具有被配置为当施加输入电压时产生电共振的电感和电容元件，耦合到谐振电路的第一电开关，使得第一电开关导通谐振电路的电流以及电压监测电路，其耦合到所述谐振电路并且被配置为确定何时在所述第一电开关上基本上没有电压。非隔离谐振变换器还包括被配置为从电压监视电路接收输入并操作第一电开关的控制电路。控制电路被配置为当第一电开关基本上没有检测到电压时，使第一电开关接通。

44. 发明授权

US09123799B2 Gallium nitride field effect transistor with buried field plate protected lateral channel 有权
标题翻译：具有掩埋场板的氮化镓场效应晶体管保护横向通道
公开(公告)号：US09123799B2
公开(公告)日：2015-09-01
申请号：US14077039
申请日：2013-11-11
申请人： AVOGY, INC.
发明人： Ozgur Aktas , Isik C. Kizilyalli
IPC分类号： H01L29/735 , H01L29/78 , H01L29/20 , H01L29/66 , H01L29/40
CPC分类号： H01L29/407 , H01L29/0623 , H01L29/1037 , H01L29/1066 , H01L29/2003 , H01L29/66681 , H01L29/66712 , H01L29/7802 , H01L29/7816 , H01L29/812 , H01L29/8122 , H01L29/8124
摘要： A method for fabricating a lateral gallium nitride (GaN) field-effect transistor includes forming a first and second GaN layer coupled to a substrate, removing a first portion of the second GaN layer to expose a portion of the first GaN layer, and forming a third GaN layer coupled to the second GaN layer and the exposed portion of the first GaN layer. The method also includes removing a portion of the third GaN layer to expose a portion of the second GaN layer, forming a source structure coupled to the third GaN layer. A first portion of the second GaN layer is disposed between the source structure and the second GaN layer. A drain structure is formed that is coupled to the third GaN layer or alternatively to the substrate. The method also includes forming a gate structure coupled to the third GaN layer such that a second portion of the third GaN layer is disposed between the gate structure and the second GaN layer.
摘要翻译：制造横向氮化镓（GaN）场效应晶体管的方法包括形成耦合到衬底的第一和第二GaN层，去除第二GaN层的第一部分以暴露第一GaN层的一部分，以及形成耦合到第二GaN层的第三GaN层和第一GaN层的暴露部分。该方法还包括去除第三GaN层的一部分以暴露第二GaN层的一部分，形成耦合到第三GaN层的源极结构。第二GaN层的第一部分设置在源极结构和第二GaN层之间。形成漏极结构，其耦合到第三GaN层或者替代地与衬底连接。该方法还包括形成耦合到第三GaN层的栅极结构，使得第三GaN层的第二部分设置在栅极结构和第二GaN层之间。

45. 发明申请

US20150243758A1 METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL TRANSISTOR 审中-公开
标题翻译：氮化钛垂直晶体管的方法和系统
公开(公告)号：US20150243758A1
公开(公告)日：2015-08-27
申请号：US14711547
申请日：2015-05-13
申请人： AVOGY, Inc.
发明人： Hui Nie , Andrew P. Edwards , Isik Kizilyalli , David P. Bour , Thomas R. Prunty , Quentin Diduck
IPC分类号： H01L29/66 , H01L29/201 , H01L29/06 , H01L29/808 , H01L21/02 , H01L29/20 , H01L29/205
CPC分类号： H01L29/66462 , H01L21/02389 , H01L21/0254 , H01L29/045 , H01L29/0696 , H01L29/122 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/66431 , H01L29/66909 , H01L29/66924 , H01L29/8083
摘要： A vertical JFET includes a GaN substrate comprising a drain of the JFET and a plurality of patterned epitaxial layers coupled to the GaN substrate. A distal epitaxial layer comprises a first part of a source channel and adjacent patterned epitaxial layers are separated by a gap having a predetermined distance. The vertical JFET also includes a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap. A proximal regrown epitaxial layer comprises a second part of the source channel. The vertical JFET further includes a source contact passing through portions of a distal regrown epitaxial layer and in electrical contact with the source channel, a gate contact in electrical contact with a distal regrown epitaxial layer, and a drain contact in electrical contact with the GaN substrate.
摘要翻译：垂直JFET包括包括JFET的漏极和耦合到GaN衬底的多个图案化外延层的GaN衬底。远端外延层包括源通道的第一部分，并且相邻的图案化外延层被具有预定距离的间隙分开。垂直JFET还包括耦合到远端外延层并且设置在间隙的至少一部分中的多个再生长的外延层。近端再生长的外延层包括源通道的第二部分。垂直JFET还包括通过远端再生长外延层的部分并与源极沟道电接触的源极接触，与远端再生长的外延层电接触的栅极接触，以及与GaN衬底电接触的漏极接触。

46. 发明申请

US20150200097A1 EDGE TERMINATION BY ION IMPLANTATION IN GALLIUM NITRIDE 有权
标题翻译：通过离子植入在氮化镓中的边缘终止
公开(公告)号：US20150200097A1
公开(公告)日：2015-07-16
申请号：US14558393
申请日：2014-12-02
申请人： Avogy, Inc.
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L21/265 , H01L29/06 , H01L29/66 , H01L29/20
CPC分类号： H01L21/2654 , H01L29/0619 , H01L29/0642 , H01L29/2003 , H01L29/66143 , H01L29/6631 , H01L29/66446 , H01L29/66856 , H01L29/8083 , H01L29/868 , H01L29/872
摘要： A method of making an edge terminated semiconductor device includes providing a GaN substrate having a GaN epitaxial layer grown thereon and exposing a portion of the GaN epitaxial layer to ion implantation. The energy dose is selected to provide a resistivity that is at least 90% of maximum achievable resistivity. The method also includes depositing a conductive layer over a portion of the implanted region.
摘要翻译：制造边缘端接的半导体器件的方法包括提供其上生长有GaN外延层的GaN衬底，并将GaN外延层的一部分暴露于离子注入。选择能量剂量以提供至少达到最大可实现电阻率的90％的电阻率。该方法还包括在植入区域的一部分上沉积导电层。

47. 发明申请

US20150188521A1 METHOD AND SYSTEM FOR OPERATING GALLIUM NITRIDE ELECTRONICS 审中-公开
标题翻译：氮化镓电子操作方法与系统
公开(公告)号：US20150188521A1
公开(公告)日：2015-07-02
申请号：US14579202
申请日：2014-12-22
申请人： Avogy, Inc.
发明人： Hemal N. Shah , Donald R. Disney , Heratch Amirkhani Namagerdi
IPC分类号： H03K3/012 , H01L29/739 , H01L29/20 , H01L29/80
CPC分类号： H03K3/012 , H01L29/2003 , H01L29/7393 , H01L29/80 , H03K17/04206 , H03K17/687
摘要： An electronic circuit comprising a driver and a main transistor are provided. The driver may include a bias voltage generator, a supplementary transistor, and an output driver. The bias voltage generator may be configured to receive a voltage input and generate a biased voltage output based on the voltage input. The supplementary transistor may have a gate coupled to the biased voltage output of the bias voltage generator, and a source of the supplementary transistor providing a current to the bias voltage generator. The output driver may be configured to receive the biased voltage output from the bias voltage generator and the voltage input, receive the voltage input, and output a drive voltage. The main transistor of the electronic circuit may have a gate, a coupled to the drive voltage, and a drain coupled to a drain of the supplementary transistor.
摘要翻译：提供了包括驱动器和主晶体管的电子电路。驱动器可以包括偏置电压发生器，辅助晶体管和输出驱动器。偏置电压发生器可以被配置为接收电压输入并且基于电压输入产生偏置电压输出。辅助晶体管可以具有耦合到偏置电压发生器的偏置电压输出的栅极，以及向偏置电压发生器提供电流的辅助晶体管的源极。输出驱动器可以被配置为接收来自偏置电压发生器和电压输入的偏置电压输出，接收电压输入并输出驱动电压。电子电路的主晶体管可以具有耦合到驱动电压的栅极和耦合到辅助晶体管的漏极的漏极。

48. 发明申请

US20150140746A1 MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE 有权
标题翻译：单相整体垂直JFET和肖特基二极管
公开(公告)号：US20150140746A1
公开(公告)日：2015-05-21
申请号：US14574265
申请日：2014-12-17
申请人： AVOGY, INC.
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L29/66 , H01L21/8234
CPC分类号： H01L29/66909 , H01L21/823487 , H01L27/0605 , H01L27/0611 , H01L27/0629 , H01L27/0727 , H01L27/098 , H01L29/2003 , H01L29/66143 , H01L29/8083 , H01L29/872
摘要： An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.
摘要翻译：包括垂直III族氮化物FET和肖特基二极管的集成器件包括：包括第一III族氮化物材料的漏极，包括耦合到漏极并沿垂直方向邻近漏极设置的第二III族氮化物材料的漂移区，以及包括耦合到所述漂移区的第三III族氮化物材料的沟道区。集成器件还包括至少部分地围绕沟道区的栅极区域，耦合到沟道区的源极和耦合到漂移区域的肖特基接触。沟道区域沿着垂直方向设置在漏极和源极之间，使得垂直III族氮化物FET和肖特基二极管的工作期间的电流沿垂直方向。

49. 发明申请

US20150137134A1 METHOD AND SYSTEM FOR INTERLEAVED BOOST CONVERTER WITH CO-PACKAGED GALLIUM NITRIDE POWER DEVICES 有权
标题翻译：具有包装氮化镓电力装置的交互式升压转换器的方法和系统
公开(公告)号：US20150137134A1
公开(公告)日：2015-05-21
申请号：US14083217
申请日：2013-11-18
申请人： AVOGY, INC.
发明人： Hemal N. Shah , Donald R. Disney
IPC分类号： H01L29/20 , H01L23/00 , H01L23/36 , H01L27/06
CPC分类号： H01L29/2003 , H01L23/36 , H01L23/495 , H01L23/49524 , H01L23/49541 , H01L23/49562 , H01L23/49568 , H01L23/49575 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/89 , H01L2224/05624 , H01L2224/05647 , H01L2224/0603 , H01L2224/37147 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48724 , H01L2224/48747 , H01L2224/49111 , H01L2224/8384 , H01L2924/01322 , H01L2924/1033 , H01L2924/12032 , H01L2924/13091 , H01L2924/00 , H01L2924/00014 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076
摘要： An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the anode of the second GaN diode is electrically connected to the leadframe.
摘要翻译：电子封装包括引线框和多个引脚。电子封装还包括包括源极，栅极和漏极的第一氮化镓（GaN）晶体管和包括源极，栅极和漏极的第二GaN晶体管。第一GaN晶体管的源极电连接到引线框架，并且第二GaN晶体管的漏极电连接到引线框架。电子封装还包括包括阳极和阴极的第一GaN二极管和包括阳极和阴极的第二GaN二极管。第一GaN二极管的阳极电连接到引线框架，并且第二GaN二极管的阳极电连接到引线框架。

50. 发明申请

US20150129886A1 GALLIUM NITRIDE FIELD EFFECT TRANSISTOR WITH BURIED FIELD PLATE PROTECTED LATERAL CHANNEL 有权
标题翻译：带氮化铝场效应晶体管，带有保护层的边界通道
公开(公告)号：US20150129886A1
公开(公告)日：2015-05-14
申请号：US14077039
申请日：2013-11-11
申请人： AVOGY, INC.
发明人： Ozgur Aktas , Isik C. Kizilyalli
IPC分类号： H01L29/78 , H01L29/66 , H01L29/40 , H01L29/20
CPC分类号： H01L29/407 , H01L29/0623 , H01L29/1037 , H01L29/1066 , H01L29/2003 , H01L29/66681 , H01L29/66712 , H01L29/7802 , H01L29/7816 , H01L29/812 , H01L29/8122 , H01L29/8124
摘要： A method for fabricating a lateral gallium nitride (GaN) field-effect transistor includes forming a first and second GaN layer coupled to a substrate, removing a first portion of the second GaN layer to expose a portion of the first GaN layer, and forming a third GaN layer coupled to the second GaN layer and the exposed portion of the first GaN layer. The method also includes removing a portion of the third GaN layer to expose a portion of the second GaN layer, forming a source structure coupled to the third GaN layer. A first portion of the second GaN layer is disposed between the source structure and the second GaN layer. A drain structure is formed that is coupled to the third GaN layer or alternatively to the substrate. The method also includes forming a gate structure coupled to the third GaN layer such that a second portion of the third GaN layer is disposed between the gate structure and the second GaN layer.
摘要翻译：制造横向氮化镓（GaN）场效应晶体管的方法包括形成耦合到衬底的第一和第二GaN层，去除第二GaN层的第一部分以暴露第一GaN层的一部分，以及形成耦合到第二GaN层的第三GaN层和第一GaN层的暴露部分。该方法还包括去除第三GaN层的一部分以暴露第二GaN层的一部分，形成耦合到第三GaN层的源极结构。第二GaN层的第一部分设置在源极结构和第二GaN层之间。形成漏极结构，其耦合到第三GaN层或者替代地与衬底连接。该方法还包括形成耦合到第三GaN层的栅极结构，使得第三GaN层的第二部分设置在栅极结构和第二GaN层之间。

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