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31. 发明申请

US20120133017A1 SEMICONDUCTOR STRUCTURES INCLUDING POLYMER MATERIAL PERMEATED WITH METAL OXIDE 有权
标题翻译：半导体结构包括用金属氧化物渗透的聚合物材料
公开(公告)号：US20120133017A1
公开(公告)日：2012-05-31
申请号：US13335107
申请日：2011-12-22
申请人： Dan B. Millward , Timothy A. Quick , J. Neil Greeley
发明人： Dan B. Millward , Timothy A. Quick , J. Neil Greeley
IPC分类号： H01L29/06
CPC分类号： H01L21/0271 , B82Y10/00 , B82Y40/00 , C08L53/00 , C08L53/005 , C09D153/00 , C09D153/005 , G03F7/0002 , H01L21/02323 , H01L21/28 , H01L29/06 , Y10S438/947 , Y10S977/888 , Y10S977/89 , C08L2666/02
摘要： Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly. A block copolymer at least within a trench in the substrate and including at least one soluble block and at least one insoluble block may be annealed to form a self-assembled pattern including a plurality of repeating units of the at least one soluble block laterally aligned with the trench and positioned within a matrix of the at least one insoluble block. The self-assembled pattern may be exposed to a metal oxide precursor that impregnates the at least one soluble block. The metal oxide precursor may be oxidized to form a metal oxide. The self-assembled pattern may be removed to form a pattern of metal oxide lines on the substrate surface. Semiconductor device structures are also described.
摘要翻译：使用配制用于自组装的嵌段共聚物体系形成金属氧化物结构的方法和在基材上形成金属氧化物图案的方法。至少在衬底中的沟槽内并且包括至少一个可溶性嵌段和至少一个不溶性嵌段的嵌段共聚物可以被退火以形成自组装图案，其包括多个与所述至少一个可溶嵌段的重复单元横向对准并且定位在所述至少一个不溶性块的基质内。自组装图案可以暴露于浸渍至少一个可溶性嵌段的金属氧化物前体。金属氧化物前体可以被氧化以形成金属氧化物。可以去除自组装图案以在衬底表面上形成金属氧化物线的图案。还描述了半导体器件结构。

32. 发明授权

US08178403B2 Method of producing precision vertical and horizontal layers in a vertical semiconductor structure 有权
标题翻译：在垂直半导体结构中制造精密垂直和水平层的方法
公开(公告)号：US08178403B2
公开(公告)日：2012-05-15
申请号：US12441223
申请日：2007-09-18
申请人： Jonas Ohlsson , Lars Samuelson , Erik Lind , Lars-Erik Wernersson , Truls Löwgren
发明人： Jonas Ohlsson , Lars Samuelson , Erik Lind , Lars-Erik Wernersson , Truls Löwgren
IPC分类号： H01L21/76
CPC分类号： H01L29/7827 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/125 , H01L29/495 , H01L29/517 , H01L29/66439 , H01L29/66666 , H01L29/775 , H01L29/7828 , H01L29/78642 , H01L33/24 , Y10S977/888 , Y10S977/89
摘要： The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.
摘要翻译：本发明涉及在垂直半导体器件（1）的垂直和水平表面（15,20）上提供不同厚度的层。特别地，本发明涉及栅电极和在半导体结构中形成精密层（28），该半导体结构包括基底（10）和基本上从基底上竖立的细长结构（5）。根据本发明的方法，将装置（1）的垂直几何结构与各向异性沉积或各向异性去除沉积材料结合使用以形成非常高精度的垂直或水平层。

33. 发明申请

US20120070938A1 Method of Fabricating Silicon Nanowire Solar Cell Device Having Upgraded Metallurgical Grade Silicon Substrate 失效
标题翻译：制造具有升级冶金级硅衬底的硅纳米线太阳能电池器件的方法
公开(公告)号：US20120070938A1
公开(公告)日：2012-03-22
申请号：US12885095
申请日：2010-09-17
申请人： Tsun-Neng Yang
发明人： Tsun-Neng Yang
IPC分类号： H01L31/18
CPC分类号： H01L31/035227 , C01B33/027 , C30B11/12 , C30B25/18 , C30B29/06 , C30B29/605 , H01L21/02381 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02645 , H01L21/02653 , H01L31/068 , H01L31/1804 , Y02E10/547 , Y02P70/521 , Y10S977/743 , Y10S977/762 , Y10S977/813 , Y10S977/888
摘要： A simplified method for fabricating a solar cell device is provided. The solar cell device has silicon nanowires (SiNW) grown on an upgraded metallurgical grade (UMG) silicon (Si) substrate. Processes of textured surface process and anti-reflection thin film process can be left out for further saving costs on equipment and manufacture investment. Thus, a low-cost Si-based solar cell device can be easily fabricated for wide application.
摘要翻译：提供了一种用于制造太阳能电池装置的简化方法。太阳能电池器件具有在升级冶金级（UMG）硅（Si）衬底上生长的硅纳米线（SiNW）。纹理表面处理和抗反射薄膜工艺的过程可以省略，以进一步节省设备和制造投资的成本。因此，可以容易地制造低成本的基于Si的太阳能电池装置，以用于广泛的应用。

34. 发明申请

US20120061622A1 SURFACE-ACTIVATION OF SEMICONDUCTOR NANOSTRUCTURES FOR BIOLOGICAL APPLICATIONS 审中-公开
标题翻译：用于生物应用的半导体纳米结构的表面活化
公开(公告)号：US20120061622A1
公开(公告)日：2012-03-15
申请号：US13215973
申请日：2011-08-23
申请人： Nader M. Kalkhoran , James G. Moe , Kurt J. Linden , Marisa Sambito
发明人： Nader M. Kalkhoran , James G. Moe , Kurt J. Linden , Marisa Sambito
IPC分类号： H01B1/02 , H01B1/00 , B82Y30/00
CPC分类号： G01N21/6489 , B82Y10/00 , Y10S438/96 , Y10S977/773 , Y10S977/774 , Y10S977/786 , Y10S977/888
摘要： The present invention provides means and methods for producing surface-activated semiconductor nanoparticles suitable for in vitro and in vivo applications that can fluoresce in response to light excitation. Semiconductor nanostructures can be produced by generating a porous layer in semiconductor substrate comprising a network of nanostructures. Prior or subsequent to cleavage from the substrate, the nanostructures can be activated by an activation means such as exposing their surfaces to a plasma, oxidation or ion implantation. In some embodiments, the surface activation renders the nanostructures more hydrophilic, thereby facilitating functionalization of the nanoparticles for either in vitro or in vivo use.
摘要翻译：本发明提供了用于生产表面活化的半导体纳米颗粒的方法和方法，所述表面活化的半导体纳米颗粒适于体外和体内应用，其可响应于光激发而发荧光。可以通过在包括纳米结构网络的半导体衬底中产生多孔层来制造半导体纳米结构。在从衬底切割之前或之后，纳米结构可以通过激活手段来激活，例如将其表面暴露于等离子体，氧化或离子注入。在一些实施方案中，表面活化使得纳米结构更亲水，从而促进纳米颗粒的体外或体内使用的官能化。

35. 发明申请

US20110315660A1 METHOD FOR RECYCLING OF SILICA WASTE AND METHOD FOR PREPARING NANOPOROUS OR SPHERICAL MATERIALS 有权
标题翻译：回收二氧化硅废物的方法及制备纳米材料或球形材料的方法
公开(公告)号：US20110315660A1
公开(公告)日：2011-12-29
申请号：US13097859
申请日：2011-04-29
申请人： Jong-Sung Yu
发明人： Jong-Sung Yu
IPC分类号： C23F1/02 , G01N31/00 , C01B33/12 , C01B39/00 , B82Y40/00
CPC分类号： B82Y30/00 , B82Y40/00 , C01B32/30 , C01B32/342 , C01B37/00 , C01B39/40 , C01P2002/01 , C01P2002/72 , C01P2004/03 , C01P2004/04 , C01P2004/32 , C01P2006/16 , Y10S977/888 , Y10T436/23
摘要： Disclosed are a method for recycling silica waste and a method for preparing nanoporous material and other valuable silica materials. More specifically, a method for preparing a nanoporous material by recycling silica-containing waste produced from a silica etching process in the synthesis of nanoporous carbon is provided. The present disclosure allows recycling of silica waste in an effective and environment-friendly manner, reduction of consumption of chemical materials, and reduction of chemical waste. Accordingly, the present disclosure enables effective preparation of various valuable nanoporous silica and other silica materials from silica waste released for production of various nanoporous materials.
摘要翻译：公开了一种回收二氧化硅废物的方法和一种制备纳米多孔材料和其它有价值的二氧化硅材料的方法。更具体地，提供了一种通过在合成纳米多孔碳中回收由二氧化硅蚀刻工艺产生的含二氧化硅的废料来制备纳米多孔材料的方法。本公开允许以有效和环境友好的方式回收二氧化硅废物，减少化学材料的消耗和减少化学废物。因此，本公开使得能够有效地制备用于生产各种纳米多孔材料的二氧化硅废弃物的各种有价值的纳米多孔二氧化硅和其它二氧化硅材料。

36. 发明授权

US08058089B2 Electromechanical memory array using nanotube ribbons and method for making same 有权
标题翻译：使用纳米管带的机电存储器阵列及其制造方法
公开(公告)号：US08058089B2
公开(公告)日：2011-11-15
申请号：US12415247
申请日：2009-03-31
申请人： Brent M. Segal , Darren K. Brock , Thomas Rueckes
发明人： Brent M. Segal , Darren K. Brock , Thomas Rueckes
IPC分类号： H01L21/00
CPC分类号： G11C23/00 , B82Y10/00 , G11C13/025 , G11C2213/16 , G11C2213/81 , H01H1/0094 , H01L21/76838 , H01L27/10 , Y10S977/724 , Y10S977/742 , Y10S977/796 , Y10S977/856 , Y10S977/888 , Y10S977/943 , Y10T428/24893 , Y10T428/24917
摘要： Electromechanical circuits, such as memory cells, and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate, and nanotube ribbons suspended by the supports that cross the electrically conductive traces, wherein each ribbon comprises one or more nanotubes. The electro-mechanical circuit elements are made by providing a structure having electrically conductive traces and supports, in which the supports extend from a surface of the substrate. A layer of nanotubes is provided over the supports, and portions of the layer of nanotubes are selectively removed to form ribbons of nanotubes that cross the electrically conductive traces. Each ribbon includes one or more nanotubes.
摘要翻译：公开了诸如存储单元的机电电路及其制造方法。这些电路包括具有导电迹线和从衬底表面延伸的支撑体的结构，以及由支撑体悬挂的穿过导电迹线的纳米管带，其中每个带包括一个或多个纳米管。电 - 机械电路元件通过提供具有导电迹线和支撑件的结构来制造，其中支撑件从基板的表面延伸。在载体上提供一层纳米管，并且选择性地去除纳米管层的部分以形成穿过导电迹线的纳米管带。每个带包括一个或多个纳米管。

37. 发明申请

US20110275211A1 Methods of Etching Nanodots, Methods of Removing Nanodots From Substrates, Methods of Fabricating Integrated Circuit Devices, Methods of Etching a Layer Comprising a Late Transition Metal, and Methods of Removing a Layer Comprising a Late Transition Metal From a Substrate 有权
公开(公告)号：US20110275211A1
公开(公告)日：2011-11-10
申请号：US13189798
申请日：2011-07-25
申请人： Eugene P. Marsh
发明人： Eugene P. Marsh
IPC分类号： H01L21/28 , H01L21/306
CPC分类号： C23F1/28 , B82Y10/00 , C23F1/30 , H01L21/28273 , H01L21/32133 , H01L27/115 , H01L27/11521 , H01L29/42332 , H01L29/7881 , Y10S977/888
摘要： Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF.

38. 发明授权

US07972560B2 Apparatus for dispensing material 失效
标题翻译：用于分配材料的设备
公开(公告)号：US07972560B2
公开(公告)日：2011-07-05
申请号：US12102370
申请日：2008-04-14
申请人： Peter Werner Sutter , Eli Anguelova Sutter
发明人： Peter Werner Sutter , Eli Anguelova Sutter
IPC分类号： B01L3/02
CPC分类号： B01L3/0275 , B01L3/0268 , B01L2200/12 , B01L2300/12 , B01L2400/0442 , Y10S977/762 , Y10S977/888 , Y10S977/89
摘要： An apparatus capable of dispensing drops of material with volumes on the order of zeptoliters is described. In some embodiments of the inventive pipette the size of the droplets so dispensed is determined by the size of a hole, or channel, through a carbon shell encapsulating a reservoir that contains material to be dispensed. The channel may be formed by irradiation with an electron beam or other high-energy beam capable of focusing to a spot size less than about 5 nanometers. In some embodiments, the dispensed droplet remains attached to the pipette by a small thread of material, an atomic scale meniscus, forming a virtually free-standing droplet. In some embodiments the droplet may wet the pipette tip and take on attributes of supported drops. Methods for fabricating and using the pipette are also described.
摘要翻译：描述了能够分配具有齐格列斯数量级的体积的材料滴的装置。在本发明移液管的一些实施例中，如此分配的液滴的尺寸由孔或通道的大小决定，通过包封包含要分配材料的储存器的碳壳。可以通过用能够聚焦到小于约5纳米的光斑尺寸的电子束或其它高能束照射来形成通道。在一些实施方案中，分配的液滴通过形成实际上独立的液滴的材料的小线（原子尺度半月板）附着到移液管。在一些实施例中，液滴可以润湿移液管尖端并承担所支持的液滴的属性。还描述了用于制造和使用移液管的方法。

39. 发明申请

US20110129973A1 NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME 有权
标题翻译：使用半导体纳米晶体的非易失性存储器件及其形成方法
公开(公告)号：US20110129973A1
公开(公告)日：2011-06-02
申请号：US13025018
申请日：2011-02-10
申请人： Charles T. Black , Kathryn Wilder Guarini
发明人： Charles T. Black , Kathryn Wilder Guarini
IPC分类号： H01L21/336 , H01L21/20 , B82Y40/00
CPC分类号： H01L29/66825 , B82Y10/00 , G11C2216/06 , H01L21/02118 , H01L21/02227 , H01L21/02532 , H01L21/02636 , H01L21/28273 , H01L21/28282 , H01L21/31111 , H01L29/42332 , H01L29/7887 , H01L29/7923 , Y10S438/947 , Y10S977/78 , Y10S977/783 , Y10S977/813 , Y10S977/856 , Y10S977/883 , Y10S977/888 , Y10S977/893
摘要： A method of making a nanoparticle array that includes replicating a dimension of a self-assembled film into a dielectric film, to form a porous dielectric film, conformally depositing a material over the said porous dielectric film, and anisotropically and selectively etching the deposited material.
摘要翻译：一种制造纳米颗粒阵列的方法，其包括将自组装膜的尺寸复制到电介质膜中，以形成多孔电介质膜，在所述多孔介电膜上保形地沉积材料，并各向异性地选择性地蚀刻沉积的材料。

40. 发明申请

US20100167504A1 Methods of Fabricating Nanostructures 失效
标题翻译：制造纳米结构的方法
公开(公告)号：US20100167504A1
公开(公告)日：2010-07-01
申请号：US12344696
申请日：2008-12-29
申请人： Brent A. ANDERSON , Andres BRYANT , Edward J. NOWAK , Jeffrey W. SLEIGHT
发明人： Brent A. ANDERSON , Andres BRYANT , Edward J. NOWAK , Jeffrey W. SLEIGHT
IPC分类号： H01L21/20
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0669 , H01L29/0673 , H01L29/16 , H01L29/161 , Y10S977/888
摘要： A method is shown for fabricating nanostructures, and more particularly, to methods of fabricating silicon nanowires. The method of manufacturing a nanowire includes forming a sandwich structure of SiX material and material Si over a substrate and etching the sandwich structure to expose sidewalls of the Si material and the SiX material. The method further includes etching the SiX material to expose portions of the Si material and etching the exposed portions of the Si material. The method also includes breaking away the Si material to form silicon nanowires.
摘要翻译：示出了制造纳米结构的方法，更具体地说，涉及制造硅纳米线的方法。制造纳米线的方法包括在衬底上形成SiX材料和材料Si的夹层结构，并蚀刻夹层结构以暴露Si材料和SiX材料的侧壁。该方法还包括蚀刻SiX材料以暴露Si材料的部分并蚀刻Si材料的暴露部分。该方法还包括分离Si材料以形成硅纳米线。

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