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31. 发明授权

US5864257A Replica bias circuit to optimize swing of differential op-amp 失效
标题翻译：复制偏置电路，优化差分运算放大器的摆幅
公开(公告)号：US5864257A
公开(公告)日：1999-01-26
申请号：US892399
申请日：1997-07-15
申请人： Bret C. Rothenberg
发明人： Bret C. Rothenberg
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F3/4565 , H03F2203/45421 , H03F2203/45508 , H03F2203/45651 , H03F2203/45732
摘要： A replica circuit derived from the bias generating circuit for an amplifier. The replica circuit duplicates the operating point of the op-amp transistors, and generates two reference voltages. The average of these two voltages is the optimum common-mode desired output level to maximize differential op-amp swing. Several circuits are disclosed that make use of these two voltages to set the op-amp output to the average of the two voltages.
摘要翻译：源自用于放大器的偏置产生电路的复制电路。复制电路复制运算放大器晶体管的工作点，并产生两个参考电压。这两个电压的平均值是最佳共模期望输出电平，以最大化差分运算放大器摆幅。公开了使用这两个电压来将运算放大器输出设置为两个电压的平均值的几个电路。

32. 发明授权

US5838200A Differential amplifier with switched capacitor common mode feedback 失效
标题翻译：带开关电容的差分放大器共模反馈
公开(公告)号：US5838200A
公开(公告)日：1998-11-17
申请号：US870845
申请日：1997-06-06
申请人： Ion E. Opris
发明人： Ion E. Opris
IPC分类号： H03F3/45
CPC分类号： H03F3/4565 , H03F3/45188 , H03F2203/45421 , H03F2203/45424 , H03F2203/45651
摘要： A differential amplifier with switched capacitor common mode feedback includes a differential telescopic cascode amplifier in which the differential output terminals are individually coupled to a common mode input bias terminal via separate feedback capacitors. During a first time period (e.g., a sampling period), the output terminals are connected together via a pair of output switches to provide a common mode output voltage in response to a common mode input bias voltage applied to the bias terminal via an input switch. An operational amplifier compares the common mode output voltage to a common mode reference voltage and, based upon the difference between such voltages, generates the common mode input bias voltage. During a second time period (e.g., a holding period), the input and output switches are all opened and the output terminals provide a differential output voltage in response to a differential input signal applied to the differential input terminals.
摘要翻译：具有开关电容器共模反馈的差分放大器包括差分伸缩共源共栅放大器，其中差分输出端子通过单独的反馈电容器单独耦合到共模输入偏置端子。在第一时间段（例如，采样周期）期间，输出端子经由一对输出开关连接在一起，以响应于通过输入开关施加到偏置端子的共模输入偏置电压来提供共模输出电压。运算放大器将共模输出电压与共模参考电压进行比较，并且基于这种电压之间的差产生共模输入偏置电压。在第二时间段（例如，保持期间）期间，输入和输出开关都被打开，并且输出端子响应于施加到差分输入端子的差分输入信号而提供差分输出电压。

33. 发明授权

US5281924A Fully differential CMOS power amplifier 失效
标题翻译：全差分CMOS功率放大器
公开(公告)号：US5281924A
公开(公告)日：1994-01-25
申请号：US849363
申请日：1992-05-05
申请人： Franco Maloberti , Giuseppe Palmisano , Luigi Sforzini , Giuseppe Gazzoli
发明人： Franco Maloberti , Giuseppe Palmisano , Luigi Sforzini , Giuseppe Gazzoli
IPC分类号： H03F3/45
CPC分类号： H03F3/4565 , H03F3/45192 , H03F3/45264 , H03F3/45273 , H03F3/45659 , H03F2203/45428 , H03F2203/45711
摘要： A fully differential CMOS power amplifier having a folded-cascode input stage, an AB class output stage, a first common mode feedback circuit that stabilizes the input stage, and a second common mode feedback circuit that stabilizes the output stage. Each feedback circuit feeds back to an internal node of its particular stage. The power amplifier also includes a power dissipation reduction circuit that shuts down the power amplifier's output first and then the rest of the power amplifier, when the power amplifier is idle for a certain period. This reduction circuit activates the power amplifier in the reverse order.
摘要翻译： PCT No.PCT / EP90 / 01839 Sec。 371日期：1992年5月5日 102（e）日期1992年5月5日PCT 1990年11月1日PCT PCT。公开号WO91 / 07814 日期：1991年5月30日。具有折叠共源共栅输入级，AB级输出级，稳定输入级的第一共模反馈电路和稳定输出级的第二共模反馈电路的全差分CMOS功率放大器。每个反馈电路反馈到其特定级的内部节点。功率放大器还包括一个功耗降低电路，当功率放大器空闲一段时间后，首先关闭功率放大器的输出，然后关闭功率放大器的其余部分。该减小电路以相反的顺序激活功率放大器。

34. 发明授权

US4599575A Broad-band differential amplifier with double reverse feed-back of common mode 失效
标题翻译：宽带差分放大器，具有双向反向反馈的共模
公开(公告)号：US4599575A
公开(公告)日：1986-07-08
申请号：US719455
申请日：1985-04-03
申请人： Patrick Bernard
发明人： Patrick Bernard
IPC分类号： H03F3/19 , H03F1/08 , H03F3/34 , H03F3/45 , H03F3/16
CPC分类号： H03F1/086 , H03F3/45183 , H03F3/4565 , H03F2203/45402 , H03F2203/45454 , H03F2203/45631 , H03F2203/45658 , H03F2203/45722
摘要： In order to diminish the risk of oscillation of a broad-band amplifier 20 MHz without considerably reducing the product gain x bandwidth, this amplifier comprises a differential stage T1, T2, T3, T4, a follower stage T5, T6, two common mode feed-back braches T8, T9, T5 on the one hand, T11, T12, T10, on the other hand, and compensation capacitors C1, C2 that are unbalanced, C2 higher than C1, between the supply terminal B and each of the outputs S1, S2 of the differential stage.
摘要翻译：为了降低宽带放大器20MHz的振荡风险，而不会大大降低产品增益x带宽，该放大器包括差分级T1，T2，T3，T4，从动级T5，T6，两个共模馈送另一方面，一方面是T8，T9，T5，另一方面是T11，T12，T10，以及在电源端子B和每个输出端S1之间不平衡的补偿电容器C1，C2高于C1 ，差动级S2。

35. 发明授权

US3959733A Differential amplifier 失效
标题翻译：差分放大器
公开(公告)号：US3959733A
公开(公告)日：1976-05-25
申请号：US549194
申请日：1975-02-12
申请人： James E. Solomon , Ronald W. Russell
发明人： James E. Solomon , Ronald W. Russell
IPC分类号： H03F3/345 , H03F3/45
CPC分类号： H03F3/4508 , H03F3/3455 , H03F3/45381 , H03F3/4565 , H03F3/45659 , H03F2203/45402 , H03F2203/45406 , H03F2203/45648 , H03F2203/45658
摘要： An operational amplifier includes an input differential stage formed of a differential pair of transistors, a tail current source supplying that differential pair, and a pair of current source loads, each connected to a respective one of the transistors of the differential pair. A common mode feedback loop is provided from a second stage of the differential amplifier to remove any excess current supplied by the tail current source which is not drawn by the current source loads. A single capacitor is employed for assymetric frequency compensation of the second stage, such that the above described common mode feedback can be applied without producing oscillations.
摘要翻译：运算放大器包括由差分对的差分对形成的输入差分级，提供该差分对的尾电流源和一对电流源负载，每个电流源负载连接到差分对的相应一个晶体管。从差分放大器的第二级提供共模反馈环路，以消除由电流源不被电流源负载牵引的尾电流源提供的任何过剩电流。单个电容器用于第二级的不对称频率补偿，使得可以应用上述共模反馈而不产生振荡。

36. 发明申请

US20180337645A1 INVERTER AMPLIFIER COMPARATOR 审中-公开
公开(公告)号：US20180337645A1
公开(公告)日：2018-11-22
申请号：US15983610
申请日：2018-05-18
申请人： Avnera Corporation
发明人： Garry N. Link , Wai Lee
IPC分类号： H03F3/45
CPC分类号： H03F3/45237 , H03F3/187 , H03F3/45183 , H03F3/4565 , H03F2200/03 , H03F2200/18 , H03F2200/297 , H03F2200/393 , H03F2200/441 , H03F2200/444 , H03F2200/453 , H03F2200/471 , H03F2200/78 , H03F2203/45418 , H03F2203/45424 , H03F2203/45434 , H03F2203/45466 , H03F2203/45631 , H03F2203/45636 , H03F2203/45702
摘要： A circuit can include a first current source, a second current source, and a differential inverter amplifier electrically coupled between the first current source and the second current source. The differential inverter amplifier can include a plurality of load resistors and a plurality of diode-connected metal oxide semiconductor (MOS) clamps configured to limit output swing and minimize common mode disturbances.

37. 发明授权

US09847762B1 Low voltage high speed CMOS line driver without tail current source 有权
公开(公告)号：US09847762B1
公开(公告)日：2017-12-19
申请号：US15201287
申请日：2016-07-01
申请人： INPHI CORPORATION
发明人： Rajasekhar Nagulapalli , Simon Forey , Parmanand Mishra
IPC分类号： H03F1/34 , H03F3/45
CPC分类号： H03F3/45183 , H03F1/34 , H03F3/45 , H03F3/45188 , H03F3/45479 , H03F3/4565 , H03F3/45659 , H03F2203/45082 , H03F2203/45418 , H03F2203/45424 , H03F2203/45481 , H03F2203/45508 , H03F2203/45652 , H03F2203/45702
摘要： The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.

38. 发明申请

US20170149403A1 CLASS-D AMPLIFIER, AUDIO PROCESSING APPARATUS AND METHOD OF DRIVING CLASS-D AMPLIFIER 审中-公开
公开(公告)号：US20170149403A1
公开(公告)日：2017-05-25
申请号：US15345926
申请日：2016-11-08
申请人： Korea Advanced Institute of Science and Technology
发明人： Gyu-Hyeong Cho , Ji-Hun Lee
IPC分类号： H03G7/00 , H03F3/217 , H04R3/00 , H03F3/183
CPC分类号： H04R3/007 , H03F3/183 , H03F3/2173 , H03F3/45192 , H03F3/4565 , H03F2200/03 , H03F2200/351 , H03F2200/421 , H03F2200/555 , H03F2200/78 , H03G3/3005 , H03G3/3089
摘要： A class-D amplifier includes an error amplification circuit, a duty signal generator, a level selection circuit, a driver and control block and an output stage. The class-D amplifier divides peal levels of an error signal into multi-level and changes a scheme for modulating the error signal when the error signal crosses each level boundary of the multi-level thereby to have an effect such as the error signal is folded. Therefore, the class-D amplifier drives output nodes with multi-level and thus the class-D amplifier may increasing efficiency while reducing EMI.

39. 发明授权

US09577593B2 Implicit feed-forward compensated op-amp with split pairs 有权
标题翻译：具有分裂对的隐式前馈补偿运算放大器
公开(公告)号：US09577593B2
公开(公告)日：2017-02-21
申请号：US14253377
申请日：2014-04-15
申请人： THE BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
发明人： Yun Chiu , Bo Wu
IPC分类号： H03F3/45 , H03F1/08 , H03F3/21
CPC分类号： H03F3/45179 , H03F1/086 , H03F3/211 , H03F3/45183 , H03F3/45188 , H03F3/45237 , H03F3/4565 , H03F2200/153 , H03F2200/408 , H03F2203/45116 , H03F2203/45222 , H03F2203/45236 , H03F2203/45418 , H03F2203/45481
摘要： Disclosed are systems implementing an implicit Feed-Forward Compensated (FFC) op-amp, where the main FFC port is realized by the P-side of the CMOS input structure of the 2nd and 3rd stages of the op-amp, while the main signal path is through the N-side. According to some embodiments, to balance the relative strengths of the main path and feed-forward paths, the 2nd-stage NMOS input pair is split into two pairs, one is used to route the main path while the other is used for auxiliary FFC. The disclosed implicit FCC op-amp is unconditionally stable with adequate phase lead. According to some embodiments, the disclosed op-amp, which may be a wide-band op-amp, can be used in highly linear applications operative at intermediate frequency (IF), such as signal buffers for high-performance data converters or radio-frequency (RF) modulators and demodulators, continuous-time (CT) filters or sigma-delta data converters.
摘要翻译：公开了实现隐式前馈补偿（FFC）运算放大器的系统，其中主FFC端口由运算放大器的第2和第3级的CMOS输入结构的P侧实现，而主信号路径是通过N侧。根据一些实施例，为了平衡主路径和前馈路径的相对强度，第二级NMOS输入对被分成两对，一个用于路由主路径，另一个用于辅助FFC。所公开的隐式FCC运算放大器是无条件稳定的，具有足够的相位导联。根据一些实施例，所公开的可以是宽带运算放大器的运算放大器可以用于在中频（IF）下操作的高度线性的应用中，例如用于高性能数据转换器或无线电设备的信号缓冲器，频率（RF）调制器和解调器，连续时间（CT）滤波器或Σ-Δ数据转换器。

40. 发明授权

US09344048B1 Operational amplifier and method of amplifying with the operational amplifier 有权
标题翻译：运算放大器和运算放大器的放大方法
公开(公告)号：US09344048B1
公开(公告)日：2016-05-17
申请号：US14634890
申请日：2015-03-01
申请人： Beken Corporation
发明人： Jiazhou Liu , Dawei Guo
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/4565 , H03F3/45659 , H03F2200/153 , H03F2203/45072 , H03F2203/45074 , H03F2203/45264 , H03F2203/45418
摘要： An operational amplifier comprises an input pair, an aiding unit, an even number of amplification stages, a feeding unit, a first current source, a second current source. Both the input pair and the aiding unit are connected to the first current source. The input pair receives differential input voltage. Both the input pair and the aiding unit are further connected to a first stage of the even number of amplification stages. The even number of amplification stages are connected in series, and the last stage of the amplification stages outputs differential output voltages. The feeding unit is configured to receive a common mode voltage of the differential output voltages, and feeds a voltage on a first node of the feeding unit back to the aiding unit so as to provide bias voltage to the aiding unit. The aiding unit avoids dead lock of the input pair.
摘要翻译：运算放大器包括输入对，辅助单元，偶数个放大级，馈电单元，第一电流源，第二电流源。输入对和辅助单元都连接到第一电流源。输入对接收差分输入电压。输入对和辅助单元都进一步连接到偶数个放大级的第一级。放大级的偶数个串联，放大级的最后阶段输出差分输出电压。馈送单元被配置为接收差分输出电压的共模电压，并且将馈电单元的第一节点上的电压馈送到辅助单元，以便向辅助单元提供偏置电压。辅助单元避免输入对的死锁。

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