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31. 发明申请

US20080003785A1 Method for Producing Semiconductor Wafer 有权
标题翻译：生产半导体晶圆的方法
公开(公告)号：US20080003785A1
公开(公告)日：2008-01-03
申请号：US11662594
申请日：2005-09-16
申请人： Isao Yokokawa , Nobuhiko Noto , Kiyoshi Mitani
发明人： Isao Yokokawa , Nobuhiko Noto , Kiyoshi Mitani
IPC分类号： H01L21/20
CPC分类号： C30B33/06 , C30B29/30 , C30B29/32 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02694
摘要： The present invention is a method for producing a semiconductor wafer, comprising at least steps of, epitaxially growing a Si1-XGeX layer (0
摘要翻译：本发明是一种半导体晶片的制造方法，其特征在于至少包括以下步骤：将Si 1-X 1 Ge x X 1层（0 1-X＆lt; Ge＆lt; X＆gt;层变成富集的SiGe层，其中至少在氧化气氛下从950℃或更低的温度开始氧化热处理，进行氧化，使得形成的Si 1-Y Y Y Y Y层在升温至950℃期间保留。因此，可以提供一种半导体制造方法可以通过短时间的热处理充分地进行SGOI晶片中的SiGe层的晶格弛豫的晶片，并且可以降低其制造成本。

32. 发明申请

US20070178670A1 METHODS FOR PREPARING CRYSTALLINE FILMS 审中-公开
标题翻译：制备晶体膜的方法
公开(公告)号：US20070178670A1
公开(公告)日：2007-08-02
申请号：US11625271
申请日：2007-01-19
申请人： Suvankar Sengupta , Ramachandra Revur , Troy Pyles
发明人： Suvankar Sengupta , Ramachandra Revur , Troy Pyles
IPC分类号： H01L21/20
CPC分类号： H01L21/02197 , C30B5/00 , C30B7/005 , C30B29/32 , H01L21/02282 , H01L21/02293 , H01L21/02356 , H01L21/31691 , H01L39/2451
摘要： Methods of forming crystalline films on a substrate are provided. The crystalline films may be formed using amorphous nanoparticles. Methods of forming dispersions of amorphous nanoparticles are also provided.
摘要翻译：提供了在基板上形成结晶膜的方法。可以使用无定形纳米颗粒形成晶体膜。还提供了形成无定形纳米颗粒分散体的方法。

33. 发明申请

US20060219655A1 Ferroelectric thin-film production method, voltage-application etching apparatus, ferroelectric crystal thin-film substrate, and ferroelectric crystal wafer 审中-公开
标题翻译：铁电薄膜制造方法，电压施加蚀刻装置，铁电晶体薄膜基板和铁电晶体晶片
公开(公告)号：US20060219655A1
公开(公告)日：2006-10-05
申请号：US10568770
申请日：2004-07-29
申请人： Yasuo Cho , Atsushi Onoe
发明人： Yasuo Cho , Atsushi Onoe
IPC分类号： B44C1/22 , H01L21/306
CPC分类号： C30B29/30 , C30B29/32 , C30B33/00 , G11B9/02 , H01L21/31111
摘要： A ferroelectric thin-film production method produces a ferroelectric crystal thin film by using a ferroelectric crystal having first and second surfaces opposed to each other and having an etching rate of the first surface greater than that of the second surface and etching the first surface of the ferroelectric crystal. While etching, a predetermined voltage is applied to the ferroelectric crystal. When the etching progresses and the thickness of the ferroelectric crystal reaches a target value, the direction of polarization of the ferroelectric crystal are inverted and the progress of the etching automatically stops. Consequently, a ferroelectric crystal thin film extremely thin and uniform in thickness over a wide area can be produced.
摘要翻译：铁电薄膜制造方法通过使用具有彼此相对的第一和第二表面的铁电晶体并且具有大于第二表面的蚀刻速率的第一表面的蚀刻速率来制造铁电晶体薄膜，铁电晶体。在蚀刻时，对铁电晶体施加规定的电压。当蚀刻进行并且铁电晶体的厚度达到目标值时，铁电晶体的极化方向反转，并且蚀刻的进行自动停止。因此，可以制造在宽范围内极薄且厚度均匀的铁电晶体薄膜。

34. 发明申请

US20060216549A1 Lead zirconate titanate niobate film, lead zirconate titanate niobate laminate and method of manufacturing the same 审中-公开
标题翻译：锆钛酸铅铌酸铅薄膜，锆钛酸铅铌酸铅叠层及其制造方法
公开(公告)号：US20060216549A1
公开(公告)日：2006-09-28
申请号：US11388068
申请日：2006-03-23
申请人： Takeshi Kijima , Takamitsu Higuchi
发明人： Takeshi Kijima , Takamitsu Higuchi
IPC分类号： B32B9/00 , B32B19/00 , B05D5/12 , B05D3/02
CPC分类号： H01L21/02197 , C30B5/00 , C30B29/32 , H01L21/02205 , H01L21/02282 , H01L21/3147 , H01L21/31691
摘要： A lead zirconate titanate niobate laminate includes a sapphire substrate and a lead zirconate titanate niobate film formed on the sapphire substrate.
摘要翻译：锆钛酸铅铌酸酯层压体包括形成在蓝宝石衬底上的蓝宝石衬底和锆钛酸铅铌酸铅薄膜。

35. 发明申请

US20060043335A1 Doped cadmium tungstate scintillator with improved radiation hardness 失效
标题翻译：掺杂的钨酸镉闪烁体具有改善的辐射硬度
公开(公告)号：US20060043335A1
公开(公告)日：2006-03-02
申请号：US10928755
申请日：2004-08-27
申请人： Shifan Cheng , Yi-Qun Li
发明人： Shifan Cheng , Yi-Qun Li
IPC分类号： C09K11/68
CPC分类号： C09K11/682 , C04B35/495 , C04B2235/3201 , C04B2235/3203 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3258 , C04B2235/3284 , C04B2235/3291 , C04B2235/3298 , C09K11/7457 , C09K11/7708 , C30B15/00 , C30B29/32 , G21K4/00
摘要： This invention provides novel cadmium tungstate scintillator materials that show improved radiation hardness. In particular, it was discovered that doping of cadmium tungstate (CdWO4) with trivalent metal ions or monovalent metal ions is particularly effective in improving radiation hardness of the scintillator material.
摘要翻译：本发明提供了显示改善的辐射硬度的新型钨酸铯闪烁体材料。特别地，发现用三价金属离子或一价金属离子掺杂钨酸镉（CdWO 4 S）在提高闪烁体材料的辐射硬度方面是特别有效的。

36. 发明授权

US06986955B2 Electronic and optical materials 有权
标题翻译：电子和光学材料
公开(公告)号：US06986955B2
公开(公告)日：2006-01-17
申请号：US10019082
申请日：2001-08-02
申请人： Jerome Schmitt , George Guang-Ji Cui , Henry A. Luten, III , Fang Yang , Fe Alma Gladden , Scott Flanagan , Yongdong Jiang , Andrew Tye Hunt
发明人： Jerome Schmitt , George Guang-Ji Cui , Henry A. Luten, III , Fang Yang , Fe Alma Gladden , Scott Flanagan , Yongdong Jiang , Andrew Tye Hunt
IPC分类号： B32B9/04 , B32B3/00 , C30B29/32 , C01G23/047
CPC分类号： C23C16/404 , C23C16/405 , C23C16/406 , C30B25/02 , C30B29/32 , Y10T428/24917
摘要： Epitaxial and reduced grain boundary materials are deposited on substrates for use in electronic and optical applications. A specific material disclosed is epitaxial barium strontium titanate (14) deposited on the C-plane of sapphire (12).
摘要翻译：外延和还原的晶界材料沉积在用于电子和光学应用的基板上。公开的具体材料是沉积在蓝宝石（12）的C平面上的外延钛酸钡锶（14）。

37. 发明申请

US20050072352A1 Single crystals of lead magnesium niobate-lead titanate 审中-公开
标题翻译：铅镁铌酸铅钛酸铅单晶
公开(公告)号：US20050072352A1
公开(公告)日：2005-04-07
申请号：US10994575
申请日：2004-11-22
申请人： Elgin Eissler
发明人： Elgin Eissler
IPC分类号： C30B29/30 , C30B11/00 , C30B29/32 , G01S7/521 , H04R17/00 , C30B1/00 , C30B3/00 , C30B5/00 , C30B28/02
CPC分类号： C30B29/30 , C30B11/00 , C30B29/32
摘要： A method of making a single crystals of lead magnesium niobate-lead titanate (PMN-PT). The method includes providing a crucible containing PMN-PT starting material, and placing the crucible into a furnace having at least two temperature zones, which is subsequently pressured with an inert gas. The crucible then descends into the temperature zones of the vertical. The temperature zones of the furnace include a first temperature zone having a temperature higher than a melting temperature of the PMN-PT material and a second temperature zone having a temperature less than the melting temperature of the PMN-PT material. The single crystals of PMN-PT prepared using the above-described method exhibits a [110] crystal orientation and may be used in electroacoustic transducers. The electroacoustic transducers are useful in devices that detect or generate acoustic waves.
摘要翻译：制备铌酸铅镁钛酸铅（PMN-PT）单晶的方法。该方法包括提供含有PMN-PT起始材料的坩埚，并将坩埚放入具有至少两个温度区的炉中，其随后用惰性气体加压。坩埚然后下降到垂直的温度区。炉的温度区域包括温度高于PMN-PT材料的熔融温度的第一温度区域和具有低于PMN-PT材料的熔融温度的温度的第二温度区域。使用上述方法制备的PMN-PT的单晶显示[110]晶体取向并且可以用于电声换能器中。电声换能器可用于检测或产生声波的装置。

38. 发明申请

US20040232803A1 Piezoelectric single crystal device and fabrication method thereof 有权
标题翻译：压电单晶器件及其制造方法
公开(公告)号：US20040232803A1
公开(公告)日：2004-11-25
申请号：US10846681
申请日：2004-05-17
申请人： KAWATETSU MINING CO., LTD.
发明人： Mitsuyoshi Matsushita , Yousuke Iwasaki
IPC分类号： H01L041/187
CPC分类号： C30B33/04 , C30B29/30 , C30B29/32 , C30B33/06 , H01L41/18 , H01L41/257 , H01L41/41 , H03H9/02031 , H03H9/176 , H04R17/00
摘要： A piezoelectric single crystal device for actively employing the electromechanical coupling factor k31 in the direction orthogonal to the polarization direction is provided. Specifically, with the polarization direction as null001null axis of a pseudocubic system, an angle between the normal direction 1 of the piezoelectric device edge face and the direction n orthogonal to the domain structure within the crystal face including null010null and null100null axes orthogonal to the polarization direction is in the range 0 to 15null or 40 to 50null.
摘要翻译：提供了一种用于在与偏振方向正交的方向上主动采用机电耦合因子k31的压电单晶器件。具体地说，在假立方体系的[001]轴的偏振方向为压电元件边缘面的法线方向1与在[010]和[100]的晶面内与畴结构正交的方向n之间的角度，与偏振方向正交的轴的范围为0〜15°或40〜50°。

39. 发明授权

US06764864B1 BST on low-loss substrates for frequency agile applications 失效
标题翻译： BST用于频率敏捷应用的低损耗衬底
公开(公告)号：US06764864B1
公开(公告)日：2004-07-20
申请号：US10418372
申请日：2003-04-17
申请人： Hao Li , Jeffrey M. Finder , Yong Liang , Corey Overgaard
发明人： Hao Li , Jeffrey M. Finder , Yong Liang , Corey Overgaard
IPC分类号： H01L2100
CPC分类号： H01L21/32105 , C30B25/18 , C30B29/32 , H01L21/31691 , H01L21/7624
摘要： An exemplary system and method for providing a microwave regime, frequency-agile device is disclosed as comprising inter alia: a low-loss, insulating substrate (200); a layer of SiO2 (210) over the surface of said substrate; and a layer of BST (220) deposited over the SiO2 layer (210). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize frequency response or other material characteristics. Exemplary embodiments of the present invention representatively provide for integrated high-efficiency, low-loss microwave components that may be readily incorporated with existing technologies for the improvement of frequency response, device package form factors, weights and/or other manufacturing, device or material performance metrics.
摘要翻译：公开了一种用于提供微波状态的频率敏捷装置的示例性系统和方法，其特别包括：低损耗绝缘基板（200）; 在所述衬底的表面上的SiO 2层（210）; 以及沉积在SiO 2层（210）上的BST（220）层。公开的特征和规范可以被不同地控制，配置，适配或以其他方式任意地修改，以进一步改进或以其它方式优化频率响应或其他材料特性。本发明的示例性实施例代表性地提供了集成的高效率低损耗微波部件，其可以容易地与用于改进频率响应，装置包装形状因子，重量和/或其他制造，装置或材料性能的现有技术结合指标

40. 发明授权

US06743643B2 Stacked memory cell having diffusion barriers 有权
标题翻译：具有扩散阻挡层的堆积式存储单元
公开(公告)号：US06743643B2
公开(公告)日：2004-06-01
申请号：US10348706
申请日：2003-01-22
申请人： Vikram Joshi , Narayan Solayappan , Carlos A. Paz de Araujo , Larry D. McMillan
发明人： Vikram Joshi , Narayan Solayappan , Carlos A. Paz de Araujo , Larry D. McMillan
IPC分类号： H01G706
CPC分类号： H01L27/11502 , C30B29/32 , C30B29/68 , H01L23/642 , H01L27/11507 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A nonconductive hydrogen barrier layer is deposited on a substrate and completely covers the surface area over a memory capacitor and a MOSFET switch of an integrated circuit memory cell. A portion of an insulator layer adjacent to the bottom electrode of a memory capacitor is removed by etching to form a moat region. A nonconductive oxygen barrier layer is deposited to cover the sidewall and bottom of the moat. The nonconductive oxygen barrier layer and a conductive diffusion barrier beneath the capacitor together provide a substantially continuous diffusion barrier between the capacitor and a switch. Also, the nonconductive hydrogen barrier layer, the nonconductive oxygen barrier, and the conductive diffusion barrier substantially completely envelop the capacitor, in particular a ferroelectric thin film in the capacitor.
摘要翻译：非导电氢阻挡层沉积在基板上并完全覆盖集成电路存储单元的存储电容器和MOSFET开关上的表面积。通过蚀刻去除与存储电容器的底部电极相邻的绝缘体层的一部分，以形成护城河区域。沉积非导电氧阻隔层以覆盖护城河的侧壁和底部。电容器下面的非导电氧阻挡层和导电扩散阻挡层一起在电容器和开关之间提供基本上连续的扩散阻挡层。此外，非导电氢阻挡层，非导电氧阻挡层和导电扩散阻挡层基本上完全包围电容器，特别是电容器中的铁电薄膜。

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