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31. 发明申请

US20050042828A1 Semiconductor device with split gate electrode structure and method for manufacturing the semiconductor device 失效
标题翻译：具有分裂栅电极结构的半导体器件和用于制造半导体器件的方法
公开(公告)号：US20050042828A1
公开(公告)日：2005-02-24
申请号：US10920158
申请日：2004-08-18
申请人： Jung-Ho Moon , Jae-Min Yu , Don-Woo Lee , Chul-Soon Kwon , In-Gu Yoon , Yong-Sun Lee , Jae-Hyun Park
发明人： Jung-Ho Moon , Jae-Min Yu , Don-Woo Lee , Chul-Soon Kwon , In-Gu Yoon , Yong-Sun Lee , Jae-Hyun Park
IPC分类号： H01L27/10 , H01L21/336 , H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11539
摘要： A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.
摘要翻译：半导体器件包括分为存储单元区域和逻辑区域的衬底。在基板的存储单元区域中形成分割栅电极结构。在分离栅电极结构的侧壁和基板的表面上形成氧化硅层。在位于分离栅电极结构的侧壁上的氧化硅层上形成字线。字线具有上宽度和下宽度。较低的宽度大于上部宽度。在基板的逻辑区域上形成逻辑门图案。逻辑门图案具有比字线的较低宽度更薄的厚度。

32. 发明授权

US09140829B2 Apparatus for fabricating light guide panel and backlight unit having the light guide panel 有权
标题翻译：用于制造具有导光板的导光板和背光单元的装置
公开(公告)号：US09140829B2
公开(公告)日：2015-09-22
申请号：US12977175
申请日：2010-12-23
申请人： Jae-Hyun Park , Gi-Bin Kim , Young-Sik Oh , Sun-Man Kim , Min-Soo Park
发明人： Jae-Hyun Park , Gi-Bin Kim , Young-Sik Oh , Sun-Man Kim , Min-Soo Park
IPC分类号： G02B5/02 , G02F1/1335 , F21V8/00
CPC分类号： G02B5/0221 , G02B5/0231 , G02B5/0242 , G02B5/0278 , G02B6/0036 , G02B6/0038 , G02B6/0051 , G02B6/0053 , G02B6/0065 , G02F1/133615
摘要： The present invention relates to an apparatus for fabricating a light guide panel which can improve light efficiency and brightness, and a backlight unit having the light guide panel. The backlight unit includes a light source for generating a light, and a light guide panel for guiding the light incident thereon from the light source, the light guide panel having an upper pattern which is formed on a front side thereof for emitting the light guided thus to upward and a lower pattern which is formed on a backside thereof for reflecting or refracting the light, wherein the lower pattern of the light guide panel is formed in an intaglio pattern having a vertical angle at which two inclined planes meet, and one of the two inclined planes the light from the light source incident thereon has an angle of 45˜55°.
摘要翻译：本发明涉及一种能够提高光效和亮度的导光板的制造装置，以及具有该导光板的背光单元。背光单元包括用于产生光的光源和用于引导从光源入射到其上的光的导光板，导光板具有形成在其前侧的上图案，用于发射由此引导的光形成在其背面的用于反射或折射光的下图案，其中导光板的下图案形成为具有两个倾斜平面相交的垂直角的凹版图案，并且其中一个来自入射在其上的光源的光的两个倾斜平面具有45°至55°的角度。

33. 发明申请

US20100060817A1 Backlight unit and liquid crystal display device including the same 有权
标题翻译：背光单元和包括其的液晶显示装置
公开(公告)号：US20100060817A1
公开(公告)日：2010-03-11
申请号：US12318290
申请日：2008-12-24
申请人： Jae-Hyun Park , Sung-Hun Kim , Jong-Keun Shin , Jin-Hyuk Kwon , Byoung-Ku Kim
发明人： Jae-Hyun Park , Sung-Hun Kim , Jong-Keun Shin , Jin-Hyuk Kwon , Byoung-Ku Kim
IPC分类号： G02F1/13357
CPC分类号： G02B5/02 , G02B5/045 , G02F1/133606 , G02F2001/133607
摘要： A backlight unit for a liquid crystal display panel includes a diffusor that diffuses light emitted from a front surface thereof, a reflective plate that reflects light toward a rear surface of the diffusor; and a collimator that collimates the light emitted from the front surface of the diffusor toward the liquid crystal display panel. The collimator includes a base layer that refracts the diffused light from the diffusor toward the liquid crystal panel, a collimating layer of lenses disposed along two perpendicular directions on a front surface of the base layer, and a reflective pattern on a rear surface of the base layer along a boundary of each of the lenses, the reflective pattern exposing an aperture portion of the base layer facing each of the lenses.
摘要翻译：用于液晶显示面板的背光单元包括扩散器，其漫射从其前表面发射的光;反射板，其朝向扩散器的后表面反射光; 以及将从扩散器的前表面发射的光朝向液晶显示面板准直的准直仪。准直器包括：基底层，其将来自扩散器的漫射光朝向液晶面板折射;沿着两个垂直方向设置的透镜的准直层，位于基底层的前表面上，反射图案位于基底的背面层，沿着每个透镜的边界，反射图案暴露基底层的面对每个透镜的开口部分。

34. 发明授权

US07651906B2 Integrated circuit devices having a stress buffer spacer and methods of fabricating the same 失效
标题翻译：具有应力缓冲垫片的集成电路器件及其制造方法
公开(公告)号：US07651906B2
公开(公告)日：2010-01-26
申请号：US11546120
申请日：2006-10-11
申请人： Jae-Hyun Park , Jae-Hee Oh , Won-Cheol Jeong , Sang-Jin Park
发明人： Jae-Hyun Park , Jae-Hee Oh , Won-Cheol Jeong , Sang-Jin Park
IPC分类号： H01L21/8234
CPC分类号： H01L27/24
摘要： Integrated circuit devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in the contact hole and a stress buffer spacer is provided between the vertical diode and the insulating layer. Methods of forming the integrated circuit devices are also provided.
摘要翻译：集成电路器件包括集成电路衬底和集成电路衬底上的绝缘层。接触孔穿透绝缘层。接触孔中有一个垂直二极管，在垂直二极管和绝缘层之间设有一个应力缓冲垫片。还提供了形成集成电路器件的方法。

35. 发明授权

US07622307B2 Semiconductor devices having a planarized insulating layer and methods of forming the same 失效
标题翻译：具有平坦化绝缘层的半导体器件及其形成方法
公开(公告)号：US07622307B2
公开(公告)日：2009-11-24
申请号：US11184701
申请日：2005-07-19
申请人： Jae-Hyun Park , Jae-Hee Oh , Won-Cheol Jeong
发明人： Jae-Hyun Park , Jae-Hee Oh , Won-Cheol Jeong
IPC分类号： H01L21/4763
CPC分类号： G11C11/16 , B82Y10/00 , G11C13/0004 , G11C2213/79 , H01L21/76819 , H01L27/228 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： A semiconductor device includes at least one phase-change pattern disposed on a semiconductor substrate. A planarized capping layer, a planarized protecting layer, and a planarized insulating layer are sequentially stacked to surround sidewalls of the at least one phase-change pattern. An interconnection layer pattern is disposed on the planarized capping layer, the planarized protecting layer, and the planarized insulating layer. The interconnection layer pattern is in contact with the phase-change pattern.
摘要翻译：半导体器件包括设置在半导体衬底上的至少一个相变图案。依次层叠有平面化覆盖层，平坦化保护层和平坦化绝缘层，以包围至少一个相变图案的侧壁。互连层图案设置在平坦化覆盖层，平坦化保护层和平坦化绝缘层上。互连层图案与相变图案接触。

36. 发明授权

US07598112B2 Phase change memory devices and their methods of fabrication 有权
标题翻译：相变存储器件及其制造方法
公开(公告)号：US07598112B2
公开(公告)日：2009-10-06
申请号：US11392310
申请日：2006-03-28
申请人： Jae-Hyun Park , Jae-Hee Oh , Se-Ho Lee , Won-Cheol Jeong
发明人： Jae-Hyun Park , Jae-Hee Oh , Se-Ho Lee , Won-Cheol Jeong
IPC分类号： H01L29/04
CPC分类号： H01L45/144 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1666
摘要： In an embodiment, a phase change memory device includes a semiconductor substrate of a first conductivity type and a first interlayer insulating layer disposed on the semiconductor substrate. A hole penetrates the first interlayer insulating layer. A first and a second semiconductor pattern are sequentially stacked in a lower region of the hole. A cell electrode is provided on the second semiconductor pattern. The cell electrode has a lower surface than a top surface of the first interlayer insulating layer. A confined phase change material pattern fills the hole on the cell electrode. An upper electrode is disposed on the phase change material pattern. The phase change material pattern in the hole is self-aligned with the first and second semiconductor patterns by the hole. A method of fabricating the phase change memory device is also provided.
摘要翻译：在一个实施例中，相变存储器件包括第一导电类型的半导体衬底和设置在半导体衬底上的第一层间绝缘层。一个孔穿透第一层间绝缘层。第一和第二半导体图案顺序地堆叠在孔的下部区域中。电池电极设置在第二半导体图案上。电池电极具有比第一层间绝缘层的顶表面更低的表面。限制的相变材料图案填充电池电极上的孔。上电极设置在相变材料图案上。孔中的相变材料图案通过孔与第一和第二半导体图案自对准。还提供了一种制造相变存储器件的方法。

37. 发明授权

US07534723B2 Methods of forming fine patterns, and methods of forming trench isolation layers using the same 失效
标题翻译：形成精细图案的方法以及使用其形成沟槽隔离层的方法
公开(公告)号：US07534723B2
公开(公告)日：2009-05-19
申请号：US11519081
申请日：2006-09-11
申请人： Jae-Hyun Park , Jae-Hee Oh , Se-Ho Lee , Won-Cheol Jeong
发明人： Jae-Hyun Park , Jae-Hee Oh , Se-Ho Lee , Won-Cheol Jeong
IPC分类号： H01L21/76 , H01L21/027 , H01L21/033 , C03C25/68 , C23F1/00 , H01L21/302 , H01L21/461
CPC分类号： H01L21/32139 , H01L21/3086 , H01L21/3088 , H01L21/76224 , H01L21/76229 , H01L21/76838
摘要： Methods of forming a fine pattern include forming an underlying layer on a substrate, forming preliminary hard mask patterns having a first pitch on the underlying layer, the preliminary hard mask patterns having a first width and being spaced apart from each other by a second width smaller than the first width. The underlying layer is etched using the preliminary hard mask patterns as etch masks to thereby form preliminary underlying patterns. The preliminary hard mask patterns are pulled back, thereby forming hard mask patterns on the preliminary underlying patterns. An overlayer is formed on the substrate exposing top surfaces of the hard mask patterns. The hard mask patterns and the preliminary underlying patterns disposed below the hard mask patterns are etched using the overlayer as an etch mask, thereby forming underlying patterns having a second pitch smaller than the first pitch, and the overlayer is removed.
摘要翻译：形成精细图案的方法包括在基板上形成下层，在下层上形成具有第一间距的初步硬掩模图案，初步硬掩模图案具有第一宽度并且彼此间隔开第二宽度较小比第一宽。使用初步硬掩模图案作为蚀刻掩模蚀刻下层，从而形成初步的底层图案。初步硬掩模图案被拉回，从而在初始底层图案上形成硬掩模图案。在基板上形成覆盖层，暴露硬掩模图案的顶表面。使用覆盖层作为蚀刻掩模蚀刻设置在硬掩模图案之下的硬掩模图案和初始底层图案，由此形成具有小于第一间距的第二间距的下面的图案，并且去除覆盖层。

38. 发明授权

US07488981B2 Memory devices having sharp-tipped phase change layer patterns 有权
标题翻译：具有尖锐相变层图案的存储器件
公开(公告)号：US07488981B2
公开(公告)日：2009-02-10
申请号：US11018643
申请日：2004-12-21
申请人： Won-Cheol Jeong , Hyeong-Jun Kim , Jae-Hyun Park , Chang-Wook Jeong
发明人： Won-Cheol Jeong , Hyeong-Jun Kim , Jae-Hyun Park , Chang-Wook Jeong
IPC分类号： H01L27/108 , H01L29/00 , H01L31/036 , H01L31/112
CPC分类号： H01L45/06 , H01L45/122 , H01L45/1273 , H01L45/144 , H01L45/1675
摘要： Phase change Random Access Memory (PRAM) devices include a substrate and a phase change layer pattern on the substrate. The phase change layer pattern includes a sharp tip and at least one wall that extends from the sharp tip in a direction away from the substrate. At least one contact hole node is provided that contacts the phase change material pattern adjacent the sharp tip.
摘要翻译：相变随机存取存储器（PRAM）器件包括衬底和衬底上的相变层图案。相变层图案包括尖锐的尖端和至少一个壁，该壁从尖锐的尖端沿远离衬底的方向延伸。提供了与尖锐尖端相邻的相变材料图案的至少一个接触孔节点。

39. 发明授权

US07440308B2 Phase-change random access memory device and method of operating the same 有权
标题翻译：相变随机存取存储器件及其操作方法
公开(公告)号：US07440308B2
公开(公告)日：2008-10-21
申请号：US11515422
申请日：2006-09-05
申请人： Chang Wook Jeong , Su-Youn Lee , Won-Cheol Jeong , Jae-Hyun Park , Su-Jin Ahn , Fai Yeung
发明人： Chang Wook Jeong , Su-Youn Lee , Won-Cheol Jeong , Jae-Hyun Park , Su-Jin Ahn , Fai Yeung
IPC分类号： G11C11/00
CPC分类号： G11C11/5678 , G11C13/0004 , G11C2213/79
摘要： A phase-change random access memory device may include a phase-change pattern, a first electrode structure connected to the phase-change pattern, and a second electrode structure spaced apart from the first electrode structure and connected to the phase-change pattern, wherein at least one of the first electrode structure and the second electrode structure includes a plurality of resistor patterns connected to the phase-change pattern in parallel.
摘要翻译：相变随机存取存储器件可以包括相变图案，连接到相变图案的第一电极结构和与第一电极结构间隔开并连接到相变图案的第二电极结构，其中第一电极结构和第二电极结构中的至少一个包括并联连接到相变图案的多个电阻图案。

40. 发明申请

US20080160643A1 Magnetic Random Access Memory Cells Having Split Subdigit Lines Having Cladding Layers Thereon and Methods of Fabricating the Same 失效
标题翻译：磁性随机存取存储器单元分割具有包层的子数字线及其制作方法
公开(公告)号：US20080160643A1
公开(公告)日：2008-07-03
申请号：US12048082
申请日：2008-03-13
申请人： Jae-Hyun Park , Hyeong-Jun Kim , Won-Cheol Jeong , Chang-Wook Jeong , Hong-sik Jeong , Gi-Tae Jeong
发明人： Jae-Hyun Park , Hyeong-Jun Kim , Won-Cheol Jeong , Chang-Wook Jeong , Hong-sik Jeong , Gi-Tae Jeong
IPC分类号： H01L43/12
CPC分类号： H01L27/228 , B82Y10/00 , H01L43/08 , H01L43/12
摘要： Magnetic RAM cells have split sub-digit lines surrounded by cladding layers and methods of fabricating the same are provided. The magnetic RAM cells include first and second sub-digit lines formed over a semiconductor substrate. Only a bottom surface and an outer sidewall of the first sub-digit line are covered with a first cladding layer pattern. In addition, only a bottom surface and an outer sidewall of the second sub-digit line are covered with a second cladding layer pattern. The outer sidewall of the first sub-digit line is located distal from the second sub-digit line and the outer sidewall of the second sub-digit line is located distal the first sub-digit line. Methods of fabricating the magnetic RAM cells are also provided.
摘要翻译：磁性RAM单元具有由包覆层包围的分割的子数字线，并且提供其制造方法。磁性RAM单元包括在半导体衬底上形成的第一和第二子数字线。只有第一子数字线的底表面和外侧壁被第一覆层图案覆盖。此外，仅第二子数字线的底表面和外侧壁被第二包层图案覆盖。第一子数字线的外侧壁位于远离第二子数字线的位置，第二子数字线的外侧壁位于第一子数字线的远侧。还提供了制造磁性RAM单元的方法。

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