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31. 发明授权

US07060586B2 PCMO thin film with resistance random access memory (RRAM) characteristics 有权
标题翻译：具有电阻随机存取存储器（RRAM）特性的PCMO薄膜
公开(公告)号：US07060586B2
公开(公告)日：2006-06-13
申请号：US10836689
申请日：2004-04-30
申请人： Tingkai Li , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
发明人： Tingkai Li , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21/20 , H01L29/00
CPC分类号： G11C13/0007 , G11C2213/31 , H01L45/04 , H01L45/1233 , H01L45/147
摘要： PrCaMnO (PCMO) thin films with predetermined memory-resistance characteristics and associated formation processes have been provided. In one aspect the method comprises: forming a Pr3+1−xCa2+xMnO thin film composition, where 0.1
摘要翻译：已经提供了具有预定的记忆电阻特性和相关的形成过程的PrCaMnO（PCMO）薄膜。在一个方面，所述方法包括：形成Pr 3+ 1-x 2 Ca 2 O 3 x MnO薄膜组成，其中0.1 _0.78Mn^{4+</SUP>_0.22O^2-_{2.96 组合， Mn和O离子的比例变化如下：O 2 - （2.96）; Mn（3+）+（（1-x）+ 8％）; 和Mn 4+（x-8％）。在另一方面，该方法响应于晶体取向在PCMO膜中产生密度。例如，如果PCMO膜具有（110）取向，则在垂直于（110）取向的平面中产生在每平方英尺5至6.76个Mn原子的范围内的密度。}}

32. 发明授权

US06899858B2 Method of synthesis of hafnium nitrate for HfO2 thin film deposition via ALCVD process 失效
标题翻译：通过ALCVD法合成HfO2薄膜沉积硝酸铪的方法
公开(公告)号：US06899858B2
公开(公告)日：2005-05-31
申请号：US10350641
申请日：2003-01-23
申请人： Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
发明人： Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
IPC分类号： C01G27/00 , C01G27/02 , C23C16/40 , H01L21/316 , C01B21/48
CPC分类号： C01G27/00 , C01G27/02
摘要： A method of preparing a hafnium nitrate thin film includes placing phosphorus pentoxide in a first vessel; connecting the first vessel to a second vessel containing hafnium tetrachloride; cooling the second vessel with liquid nitrogen; dropping fuming nitric acid into the first vessel producing N2O5 gas; allowing the N2O5 gas to enter the second vessel; heating the first vessel until the reaction is substantially complete; disconnecting the two vessels; removing the second vessel from the liquid nitrogen bath; heating the second vessel; refluxing the contents of the second vessel; drying the compound in the second vessel by dynamic pumping; purifying the compound in the second vessel by sublimation to form Hf(NO3)4, and heating the Hf(NO3)4 to produce HfO2 for use in an ALCVD process.
摘要翻译：制备硝酸铪薄膜的方法包括将五氧化二磷放置在第一容器中; 将第一容器连接到含有四氯化铪的第二容器; 用液氮冷却第二个容器; 将发烟硝酸滴入产生N 2 O 5气体的第一容器中; 允许N 2 O 5气体进入第二容器; 加热第一个容器直到反应基本完成; 断开两艘船舶; 从液氮浴中除去第二容器; 加热第二艘船; 回流第二容器的内容物; 通过动态泵送干燥第二容器中的化合物; 通过升华纯化第二容器中的化合物以形成Hf（NO 3 N 3）4，并加热Hf（NO 3 N 3）3 4生产用于ALCVD工艺的HfO 2 2。

33. 发明授权

US06281589B1 System of selectively cleaning copper substrate surfaces, in-situ, to remove copper oxides 有权
标题翻译：选择性地清洗铜基板表面的系统，原位去除铜氧化物
公开(公告)号：US06281589B1
公开(公告)日：2001-08-28
申请号：US09270901
申请日：1999-03-15
申请人： Tue Nguyen , Lawrence J. Charneski , David R. Evans , Sheng Teng Hsu
发明人： Tue Nguyen , Lawrence J. Charneski , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21302
CPC分类号： C23G5/00 , H01L21/02063 , H01L21/02068 , H01L21/31111 , H01L21/31138 , H01L21/32134 , H01L21/76838
摘要： A system and method of selectively etching copper surfaces free of copper oxides in preparation for the deposition of an interconnecting metallic material is provided. The method removes metal oxides with &bgr;-diketones, such as Hhfac. The Hhfac is delivered into the system in vapor form, and reacts almost exclusively to copper oxides. The by-products of the cleaning process are likewise volatile for removal from the system with a vacuum pressure. Since the process is easily adaptable to most IC process systems, it can be conducted in an oxygen-free environment, without the removal of the IC from the process chamber. The in-situ cleaning process permits a minimum amount of copper oxide to reform before the deposition of the overlying interconnection metal. In this manner, a highly conductive electrical interconnection between the copper surface and the interconnecting metal material is formed. An IC having a metal interconnection, in which the underlying copper layer is cleaned of copper oxides, in-situ with Hhfac vapor, is also provided.
摘要翻译：提供了一种选择性地蚀刻不含铜氧化物的铜表面以准备沉积互连金属材料的系统和方法。该方法用β-二酮除去金属氧化物，如Hhfac。 Hhfac以蒸气形式输送到系统中，几乎完全与铜氧化物反应。清洁过程的副产物同样是挥发性的，用于在真空压力下从系统中除去。由于该方法很容易适用于大多数IC工艺系统，所以它可以在无氧环境中进行，而不会从处理室中移除IC。在沉积互连金属之前，原位清洁工艺允许最小量的氧化铜重整。以这种方式，形成铜表面和互连金属材料之间的高导电性电互连。还提供了具有金属互连的IC，其中下面的铜层用Hhfac蒸气原位清除了铜氧化物。

34. 发明授权

US07407858B2 Resistance random access memory devices and method of fabrication 有权
标题翻译：电阻随机存取存储器件及其制造方法
公开(公告)号：US07407858B2
公开(公告)日：2008-08-05
申请号：US11403020
申请日：2006-04-11
申请人： Tingkai Li , Sheng Teng Hsu , David R. Evans
发明人： Tingkai Li , Sheng Teng Hsu , David R. Evans
IPC分类号： H01L21/336 , H01L31/072
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1616 , H01L45/1641
摘要： A method of fabricating a RRAM includes preparing a substrate and forming a bottom electrode ori the substrate. A PCMO layer is deposited on the bottom electrode using MOCVD or liquid MOCVD, followed by a post-annealing process. The deposited PCMO thin film has a crystallized PCMO structure or a nano-size and amorphous PCMO structure. A top electrode is formed on the PCMO layer.
摘要翻译：制造RRAM的方法包括制备衬底并形成底部电极或衬底。使用MOCVD或液体MOCVD将PCMO层沉积在底部电极上，随后进行后退火处理。沉积的PCMO薄膜具有结晶的PCMO结构或纳米尺寸和无定形PCMO结构。顶部电极形成在PCMO层上。

35. 发明授权

US07390725B2 Strained silicon on insulator from film transfer and relaxation by hydrogen implantation 有权
标题翻译：绝缘体上的应变硅通过氢注入从膜转移和弛豫
公开(公告)号：US07390725B2
公开(公告)日：2008-06-24
申请号：US11284326
申请日：2005-11-21
申请人： Jer-shen Maa , Jong-Jan Lee , Douglas J. Tweet , David R. Evans , Allen W. Burmaster , Sheng Teng Hsu
发明人： Jer-shen Maa , Jong-Jan Lee , Douglas J. Tweet , David R. Evans , Allen W. Burmaster , Sheng Teng Hsu
IPC分类号： H01L21/46 , H01L21/30
CPC分类号： H01L21/76254
摘要： Transistors fabricated on SSOI (Strained Silicon On Insulator) substrate, which comprises a strained silicon layer disposed directly on an insulator layer, have enhanced device performance due to the strain-induced band modification of the strained silicon device channel and the limited silicon volume because of the insulator layer. The present invention discloses SSOI substrate fabrication processes comprising various novel approaches. One is the use of a thin relaxed SiGe layer as the strain-induced seed layer to facilitate integration and reduce processing cost. Another is the formation of split implant microcracks deep in the silicon substrate to reduce the number of threading dislocations reaching the strained silicon layer. And lastly is a two step annealing/thinning process for the strained silicon/SiGe multilayer film transfer without blister or flaking formation.
摘要翻译：包含直接设置在绝缘体层上的应变硅层的SSOI（应变绝缘体硅）基板上制造的晶体管由于应变诱导的应变硅器件通道的带隙修改而增加了器件性能，并且由于绝缘体层。本发明公开了包含各种新颖方法的SSOI衬底制造工艺。一个是使用薄的松弛SiGe层作为应变诱导的种子层，以促进整合并降低加工成本。另一个是在硅衬底深部形成分裂的植入物微裂纹，以减少到达应变硅层的穿透位错的数量。最后是对应变硅/ SiGe多层膜转移进行两步退火/变薄处理，无需起泡或剥落形成。

36. 发明申请

US20080096345A1 Nanoelectrochemical cell 失效
标题翻译：纳米电化学电池
公开(公告)号：US20080096345A1
公开(公告)日：2008-04-24
申请号：US11580623
申请日：2006-10-12
申请人： Fengyan Zhang , David R. Evans , Sheng Teng Hsu
发明人： Fengyan Zhang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01G9/00 , H01L21/8242
CPC分类号： H01G9/07 , Y10S977/762 , Y10T29/417
摘要： A method is provided for forming a NanoElectroChemical (NEC) cell. The method provides a bottom electrode with a top surface. Nanowire shells are formed. Each nanowire shell has a nanowire and a sleeve, with the nanowire connected to the bottom electrode top surface. A top electrode is formed overlying the nanowire shells. A main cavity is formed between the top electrode and bottom electrodes, partially displaced by a first plurality of nanowire shells. Electrolyte cavities are formed between the sleeves and nanowires by etching the first sacrificial layer. In one aspect, electrolyte cavities are formed between the bottom electrode top surface and a shell coating layer joining the sleeve bottom openings. Then, the main and electrolyte cavities are filled with either a liquid or gas phase electrolyte. In a different aspect, the first sacrificial layer is a solid phase electrolyte that is not etched away.
摘要翻译：提供了形成纳米电化学（NEC）电池的方法。该方法提供了具有顶部表面的底部电极。形成纳米线贝壳。每个纳米线壳具有纳米线和套管，纳米线连接到底部电极顶表面。顶部电极形成在纳米线壳上。在顶部电极和底部电极之间形成主要腔室，部分地被第一多个纳米线壳体置换。通过蚀刻第一牺牲层，在套筒和纳米线之间形成电解质空腔。在一个方面，在底部电极顶表面和连接套筒底部开口的外壳涂层之间形成电解质腔。然后，主要和电解质空腔填充有液相或气相电解质。在不同的方面，第一牺牲层是不被蚀刻掉的固相电解质。

37. 发明授权

US07235407B2 System and method for forming a bipolar switching PCMO film 有权
标题翻译：用于形成双极开关PCMO膜的系统和方法
公开(公告)号：US07235407B2
公开(公告)日：2007-06-26
申请号：US10855942
申请日：2004-05-27
申请人： Tingkai Li , Lawrence J. Charneski , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
发明人： Tingkai Li , Lawrence J. Charneski , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1616
摘要： A multi-layer PrxCa1-xMnO3 (PCMO) thin film capacitor and associated deposition method are provided for forming a bipolar switching thin film. The method comprises: forming a bottom electrode; depositing a nanocrystalline PCMO layer; depositing a polycrystalline PCMO layer; forming a multi-layer PCMO film with bipolar switching properties; and, forming top electrode overlying the PCMO film. If the polycrystalline layers are deposited overlying the nanocrystalline layers, a high resistance can be written with narrow pulse width, negative voltage pulses. The PCMO film can be reset to a low resistance using a narrow pulse width, positive amplitude pulse. Likewise, if the nanocrystalline layers are deposited overlying the polycrystalline layers, a high resistance can be written with narrow pulse width, positive voltage pulses, and reset to a low resistance using a narrow pulse width, negative amplitude pulse.
摘要翻译：提供了多层Pr 1 x 1 x x MnO 3（PCMO）薄膜电容器和相关的沉积方法，用于形成双极开关薄膜。该方法包括：形成底部电极; 沉积纳米晶体PCMO层; 沉积多晶的PCMO层; 形成具有双极开关特性的多层PCMO膜; 并且形成覆盖PCMO膜的顶部电极。如果多晶层沉积在纳米晶层之上，则可以用窄脉冲宽度，负电压脉冲写入高电阻。 PCMO膜可以使用窄脉冲宽度，正幅度脉冲复位为低电阻。同样，如果纳米晶层沉积在多晶层上，则可以用窄脉冲宽度，正电压脉冲写入高电阻，并使用窄脉冲宽度，负幅度脉冲将其复位为低电阻。

38. 发明授权

US07214583B2 Memory cell with an asymmetric crystalline structure 有权
标题翻译：具有不对称晶体结构的记忆单元
公开(公告)号：US07214583B2
公开(公告)日：2007-05-08
申请号：US11130983
申请日：2005-05-16
申请人： Sheng Teng Hsu , Tingkai Li , David R. Evans , Wei-Wei Zhuang , Wei Pan
发明人： Sheng Teng Hsu , Tingkai Li , David R. Evans , Wei-Wei Zhuang , Wei Pan
IPC分类号： H01L21/8242
CPC分类号： G11C13/0007 , G11C2213/31 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1608 , H01L45/1625
摘要： Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an EPVR second layer adjacent the first layer, with a nano-crystalline or amorphous structure; and, forming a top electrode overlying the first and second EPVR layers. EPVR materials include CMR, high temperature super conductor (HTSC), or perovskite metal oxide materials. In one aspect, the EPVR first layer is deposited with a metalorganic spin coat (MOD) process at a temperature in the range between 550 and 700 degrees C. The EPVR second layer is formed at a temperature less than, or equal to the deposition temperature of the first layer. After a step of removing solvents, the MOD deposited EPVR second layer is formed at a temperature less than, or equal to the 550 degrees C.
摘要翻译：提供了非对称结构的存储单元和制造方法。该方法包括：形成底部电极; 在底部电极上形成具有多晶结构的电脉冲各种电阻（EPVR）第一层; 用纳米结晶或无定形结构形成邻近第一层的EPVR第二层; 并且形成覆盖在第一和第二EPVR层上的顶部电极。 EPVR材料包括CMR，高温超导体（HTSC）或钙钛矿金属氧化物材料。在一个方面，EPVR第一层在550-700℃的温度范围内用金属有机旋涂（MOD）工艺沉积.EPVR第二层是在小于或等于沉积温度的第一层。在除去溶剂的步骤之后，将MOD沉积的EPVR第二层在小于或等于550℃的温度下形成。

39. 发明授权

US07029924B2 Buffered-layer memory cell 失效
标题翻译：缓冲层存储单元
公开(公告)号：US07029924B2
公开(公告)日：2006-04-18
申请号：US10755654
申请日：2004-01-12
申请人： Sheng Teng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David R. Evans , Masayuki Tajiri
发明人： Sheng Teng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David R. Evans , Masayuki Tajiri
IPC分类号： H01L21/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/51 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/147
摘要： A method is provided for forming a buffered-layer memory cell. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) memory film overlying the bottom electrode; forming a memory-stable semiconductor buffer layer, typically a metal oxide, overlying the memory film; and, forming a top electrode overlying the semiconductor buffer layer. In some aspects of the method the semiconductor buffer layer is formed from YBa2Cu3O7-X (YBCO), indium oxide (In2O3), or ruthenium oxide (RuO2), having a thickness in the range of 10 to 200 nanometers (nm). The top and bottom electrodes may be TiN/Ti, Pt/TiN/Ti, In/TiN/Ti, PtRhOx compounds, or PtIrOx compounds. The CMR memory film may be a Pr1-XCaXMnO3 (PCMO) memory film, where x is in the region between 0.1 and 0.6, with a thickness in the range of 10 to 200 nm.
摘要翻译：提供了一种用于形成缓冲层存储单元的方法。该方法包括：形成底部电极; 形成覆盖底部电极的巨大磁阻（CMR）记忆膜; 形成存储器稳定的半导体缓冲层，通常为覆盖存储膜的金属氧化物; 并且形成覆盖半导体缓冲层的顶部电极。在该方法的一些方面，半导体缓冲层由YBa 2 N 3 O 7-X（YBCO），氧化铟（In 2或2 O 3）或氧化钌（RuO 2 N 2），其厚度在10-200纳米（nm）的范围内。顶部和底部电极可以是TiN / Ti，Pt / TiN / Ti，In / TiN / Ti，PtRhOx化合物或PtIrOx化合物。 CMR存储器膜可以是Pr 1-X C x MnO 3（PCMO）存储膜，其中x在0.1之间的区域和0.6，厚度在10至200nm的范围内。

40. 发明授权

US06927120B2 Method for forming an asymmetric crystalline structure memory cell 有权
标题翻译：形成不对称晶体结构记忆体的方法
公开(公告)号：US06927120B2
公开(公告)日：2005-08-09
申请号：US10442749
申请日：2003-05-21
申请人： Sheng Teng Hsu , Tingkal Li , David R. Evans , Wei-Wei Zhuang , Wei Pan
发明人： Sheng Teng Hsu , Tingkal Li , David R. Evans , Wei-Wei Zhuang , Wei Pan
IPC分类号： H01L27/10 , G11C11/15 , G11C13/00 , H01L45/00 , H01L21/8242
CPC分类号： G11C13/0007 , G11C2213/31 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1608 , H01L45/1625
摘要： Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an EPVR second layer adjacent the first layer, with a nano-crystalline or amorphous structure; and, forming a top electrode overlying the first and second EPVR layers. EPVR materials include CMR, high temperature super conductor (HTSC), or perovskite metal oxide materials. In one aspect, the EPVR first layer is deposited with a metalorganic spin coat (MOD) process at a temperature in the range between 550 and 700 degrees C. The EPVR second layer is formed at a temperature less than, or equal to the deposition temperature of the first layer. After a step of removing solvents, the MOD deposited EPVR second layer is formed at a temperature less than, or equal to the 550 degrees C.
摘要翻译：提供了非对称结构的存储单元和制造方法。该方法包括：形成底部电极; 在底部电极上形成具有多晶结构的电脉冲各种电阻（EPVR）第一层; 用纳米结晶或无定形结构形成邻近第一层的EPVR第二层; 并且形成覆盖在第一和第二EPVR层上的顶部电极。 EPVR材料包括CMR，高温超导体（HTSC）或钙钛矿金属氧化物材料。在一个方面，EPVR第一层在550-700℃的温度范围内用金属有机旋涂（MOD）工艺沉积.EPVR第二层是在小于或等于沉积温度的第一层。在除去溶剂的步骤之后，将MOD沉积的EPVR第二层在小于或等于550℃的温度下形成。

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