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31. 发明授权

US07682990B2 Method of manufacturing nonvolatile semiconductor memory device 有权
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US07682990B2
公开(公告)日：2010-03-23
申请号：US11144593
申请日：2005-06-06
申请人： Hirotaka Hamamura , Toshiyuki Mine , Natsuki Yokoyama
发明人： Hirotaka Hamamura , Toshiyuki Mine , Natsuki Yokoyama
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/28282 , H01L29/42344 , H01L29/513 , H01L29/792
摘要： Conventionally, a MONOS type nonvolatile memory is fabricated by subjecting a silicon nitride film to ISSG oxidation to form a top silicon oxide film of ONO structure. If the ISSG oxidation conditions are severe, repeats of programming/erase operation cause increase of interface state density (Dit) and electron trap density. This does not provide a sufficient value of the on current, posing a problem in that the deterioration of charge trapping properties cannot be suppressed.For the solution to the problem, the silicon nitride film is oxidized by means of a high concentration ozone gas to form the top silicon oxide film.
摘要翻译：通常，通过使氮化硅膜进行ISSG氧化来形成ONO结构的顶部氧化硅膜来制造MONOS型非易失性存储器。如果ISSG氧化条件严重，编程/擦除操作的重复会导致界面态密度（Dit）和电子陷阱密度的增加。这不能提供足够的导通电流值，这导致不能抑制电荷俘获特性的劣化的问题。为了解决这个问题，氮化硅膜通过高浓度的臭氧气体被氧化，形成顶部氧化硅膜。

32. 发明申请

US20090134449A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20090134449A1
公开(公告)日：2009-05-28
申请号：US12273308
申请日：2008-11-18
申请人： Tsuyoshi Arigane , Digh Hisamoto , Yasuhiro Shimamoto , Toshiyuki Mine
发明人： Tsuyoshi Arigane , Digh Hisamoto , Yasuhiro Shimamoto , Toshiyuki Mine
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/42328 , G11C16/3418 , H01L27/11521 , H01L27/1203 , H01L29/7883
摘要： Provided is a nonvolatile semiconductor memory device highly integrated and highly reliable. A plurality of memory cells are formed in a plurality of active regions sectioned by a plurality of isolations (silicon oxide films) extending in the Y direction and deeper than a well (p type semiconductor region). In each memory cell, a contact is provided in the well (p type semiconductor region) so as to penetrate through a source diffusion layer (n+ type semiconductor region), and the contact that electrically connects bit lines (metal wirings) and the source diffusion layer (n+ type semiconductor region) is also electrically connected to the well (p type semiconductor region).
摘要翻译：提供了高度集成且高度可靠的非易失性半导体存储器件。多个存储单元形成在由在Y方向上延伸并且比阱（p型半导体区域）更深的多个隔离（氧化硅膜）分割的多个有源区域中。在每个存储单元中，在阱（p型半导体区域）中提供接触以穿透源极扩散层（n +型半导体区域），并且将位线（金属布线）和源极扩散层（n +型半导体区）也与阱（p型半导体区）电连接。

33. 发明申请

US20090085042A1 Display device having thin film semiconductor device and manufacturing method of thin film semiconductor device 有权
标题翻译：具有薄膜半导体器件的显示器件和薄膜半导体器件的制造方法
公开(公告)号：US20090085042A1
公开(公告)日：2009-04-02
申请号：US12219837
申请日：2008-07-29
申请人： Toshiyuki Mine , Mitsuharu Tai , Akio Shima
发明人： Toshiyuki Mine , Mitsuharu Tai , Akio Shima
IPC分类号： H01L21/20 , H01L29/04
CPC分类号： H01L21/268 , H01L21/02529 , H01L21/02532 , H01L21/02667 , H01L21/02675 , H01L21/02686 , H01L27/1285 , H01L29/78642
摘要： A display device having a thin film semiconductor device including a semiconductor thin film having first and second semiconductor regions formed each into a predetermined shape above an insulative substrate, a conductor fabricated into a predetermined shape to the semiconductor thin film and a dielectric film put between the semiconductor thin film and the conductor, in which the semiconductor thin film is a polycrystal thin film with the crystallization ratio thereof exceeding 90% and the difference of unevenness on the surface of the semiconductor thin film does not exceed 10 nm.
摘要翻译：一种具有薄膜半导体器件的显示装置，该薄膜半导体器件包括半导体薄膜，该半导体薄膜具有在绝缘性基板的上方形成为规定形状的第一半导体区域和第二半导体区域，对该半导体薄膜形成为规定形状的导体，半导体薄膜和导体，其中半导体薄膜是结晶比率超过90％的多晶薄膜，并且半导体薄膜的表面上的不均匀度不超过10nm。

34. 发明授权

US07375399B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US07375399B2
公开(公告)日：2008-05-20
申请号：US11156558
申请日：2005-06-21
申请人： Tomoyuki Ishii , Toshiyuki Mine , Toshiaki Sano , Norifumi Kameshiro
发明人： Tomoyuki Ishii , Toshiyuki Mine , Toshiaki Sano , Norifumi Kameshiro
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L27/105 , G11C11/405 , G11C2207/104 , H01L21/823456 , H01L21/823462 , H01L27/1052 , H01L27/11 , H01L27/1116
摘要： The present invention is a semiconductor memory device having a logic block and a memory block on the same chip. In the memory device, unit memory cells each include at least two transistors, one of which is a write transistor for storing an electric charge into and releasing it from an electric charge storage node, and the other is a read transistor whose conductance in a channel region provided between a source and drain of the read transistor is modulated dependently on the amount of electric charge stored into or released from the electric charge storage node by the write transistor. The read transistor has a gate-insulating film thicker than that of a transistor provided in the logic block, and uses the same diffusion layer structure as that of the logic block.
摘要翻译：本发明是具有在同一芯片上的逻辑块和存储器块的半导体存储器件。在存储器件中，单元存储单元每个都包括至少两个晶体管，其中之一是用于存储电荷并将其从电荷存储节点释放的写入晶体管，另一个是在沟道中的电导读取晶体管的源极和漏极之间的区域被调制，取决于由写入晶体管存储或从电荷存储节点释放的电荷的量。读取晶体管具有比设置在逻辑块中的晶体管更厚的栅极绝缘膜，并且使用与逻辑块相同的扩散层结构。

35. 发明申请

US20080073705A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20080073705A1
公开(公告)日：2008-03-27
申请号：US11829248
申请日：2007-07-27
申请人： Digh HISAMOTO , Itaru Yanagi , Yasuhiro Shimamoto , Toshiyuki Mine , Yutaka Okuyama
发明人： Digh HISAMOTO , Itaru Yanagi , Yasuhiro Shimamoto , Toshiyuki Mine , Yutaka Okuyama
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , G11C16/0425 , G11C16/10 , H01L27/115 , H01L27/11568 , H01L29/66833
摘要： A gate dielectric functioning as a charge-trapping layer of a non-volatile memory cell with a structure of an insulator gate field effect transistor is formed by laminating a first insulator formed of a silicon oxide film, a second insulator formed of a silicon nitride film, a third insulator formed of a silicon nitride film containing oxygen, and a fourth insulator formed of a silicon oxide film in this order on a main surface of a semiconductor substrate. Holes are injected into the charge-trapping layer from a gate electrode side. Accordingly, since the operations can be achieved without the penetration of the holes through the interface in contact to the channel and the first insulator, the deterioration in rewriting endurance and the charge-trapping characteristics due to the deterioration of the first insulator does not occur, and highly efficient rewriting (writing and erasing) characteristics and stable charge-trapping characteristics can be achieved.
摘要翻译：作为具有绝缘体栅极场效应晶体管的结构的非易失性存储单元的电荷捕获层的栅极介质通过层叠由氧化硅膜形成的第一绝缘体，由氮化硅膜形成的第二绝缘体由半导体衬底的主表面依次由含有氧的氮化硅膜构成的第三绝缘体和由氧化硅膜形成的第四绝缘体构成。孔从栅电极侧注入电荷捕获层。因此，由于可以在没有孔穿过与沟道和第一绝缘体接触的界面的情况下实现操作，所以不会发生由于第一绝缘体的劣化导致的重写耐久性和电荷捕获特性的劣化，并且可以实现高效的重写（写入和擦除）特性和稳定的电荷捕获特性。

36. 发明申请

US20070134835A1 SWITCH USING MICRO ELECTRO MECHANICAL SYSTEM 审中-公开
标题翻译：使用微电子机械系统开关
公开(公告)号：US20070134835A1
公开(公告)日：2007-06-14
申请号：US11566952
申请日：2006-12-05
申请人： Hiroshi Fukuda , Toshiyuki Mine
发明人： Hiroshi Fukuda , Toshiyuki Mine
IPC分类号： H01L21/00 , H01L29/84
CPC分类号： H01H59/0009 , G02B6/357 , G02B6/358 , G02B6/3584 , H01H2001/0042 , H01H2001/0063
摘要： A MEMS switch is provided with a substrate, a diaphragm which is disposed on the substrate with interposing a cavity therebetween and is elastically deformed by electrostatic force, a switch drive electrode disposed on the substrate, and a switch drive electrode disposed on the diaphragm. Further, a charge accumulation electrode is disposed on the diaphragm between the switch drive electrode and the switch drive electrode. When charge is accumulated in the charge accumulation electrode, electrostatic force is generated between the charge accumulation electrode and the switch drive electrode, thereby deforming the diaphragm. Accordingly, a small-sized bistable MEMS switch whose structure is simple, whose holding state is stable for a long period, and which can be easily mounted together with a semiconductor integrated circuit can be realized.
摘要翻译： MEMS开关设置有基板，隔膜，其设置在基板上，在其间插入空腔并且通过静电力弹性变形，设置在基板上的开关驱动电极和设置在隔膜上的开关驱动电极。此外，电荷累积电极设置在开关驱动电极和开关驱动电极之间的隔膜上。当在电荷累积电极中积累电荷时，在电荷累积电极和开关驱动电极之间产生静电力，从而使隔膜变形。因此，可以实现其结构简单，其保持状态长时间稳定并且可以容易地与半导体集成电路一起安装的小尺寸双稳态MEMS开关。

37. 发明授权

US06982468B2 Semiconductor device and method for manufacturing thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06982468B2
公开(公告)日：2006-01-03
申请号：US10942014
申请日：2004-09-16
申请人： Shimpei Tsujikawa , Toshiyuki Mine , Jiro Yugami , Natsuki Yokoyama , Tsuyoshi Yamauchi
发明人： Shimpei Tsujikawa , Toshiyuki Mine , Jiro Yugami , Natsuki Yokoyama , Tsuyoshi Yamauchi
IPC分类号： H01L29/76
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film
摘要翻译：一种半导体器件及其制造方法，其选择性地形成氮化硅膜，而不会对硅衬底的表面造成损害或污染，从而在一个相同的硅衬底中形成不同类型的栅极电介质，通过在二氧化硅上形成二氧化硅硅衬底的表面，然后去除其一部分，在已经除去二氧化硅的衬底的表面上形成氮化硅膜，同时将氮引入二氧化硅的不是去除或者通过化学气相沉积在硅衬底的表面上沉积二氧化硅，然后去除其一部分，在去除二氧化硅的衬底的表面上形成氮化硅膜，同时将氮气引入未被除去的二氧化硅的表面，依次溶解并且去除引入氮的氧化硅膜以暴露衬底的表面并氧化硅衬底和氮化硅膜的暴露表面

38. 发明申请

US20050272198A1 Method of manufacturing nonvolatile semiconductor memory device 有权
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US20050272198A1
公开(公告)日：2005-12-08
申请号：US11144593
申请日：2005-06-06
申请人： Hirotaka Hamamura , Toshiyuki Mine , Natsuki Yokoyama
发明人： Hirotaka Hamamura , Toshiyuki Mine , Natsuki Yokoyama
IPC分类号： H01L27/10 , H01L21/28 , H01L21/336 , H01L21/8238 , H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/51 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , H01L29/42344 , H01L29/513 , H01L29/792
摘要： Conventionally, a MONOS type nonvolatile memory is fabricated by subjecting a silicon nitride film to ISSG oxidation to form a top silicon oxide film of ONO structure. If the ISSG oxidation conditions are severe, repeats of programming/erase operation cause increase of interface state density (Dit) and electron trap density. This does not provide a sufficient value of the on current, posing a problem in that the deterioration of charge trapping properties cannot be suppressed. For the solution to the problem, the silicon nitride film is oxidized by means of a high concentration ozone gas to form the top silicon oxide film.
摘要翻译：通常，通过使氮化硅膜进行ISSG氧化来形成ONO结构的顶部氧化硅膜来制造MONOS型非易失性存储器。如果ISSG氧化条件严重，编程/擦除操作的重复会导致界面态密度（Dit）和电子陷阱密度的增加。这不能提供足够的导通电流值，这导致不能抑制电荷俘获特性的劣化的问题。为了解决这个问题，氮化硅膜通过高浓度的臭氧气体被氧化，形成顶部氧化硅膜。

39. 发明授权

US09214516B2 Field effect silicon carbide transistor 有权
标题翻译：场效应碳化硅晶体管
公开(公告)号：US09214516B2
公开(公告)日：2015-12-15
申请号：US14240376
申请日：2012-03-30
申请人： Toshiyuki Mine , Yasuhiro Shimamoto , Hirotaka Hamamura
发明人： Toshiyuki Mine , Yasuhiro Shimamoto , Hirotaka Hamamura
IPC分类号： H01L29/16 , H01L21/04 , H01L29/66 , H01L29/78 , H01L29/792
CPC分类号： H01L29/1608 , H01L21/046 , H01L21/049 , H01L29/513 , H01L29/66068 , H01L29/7802 , H01L29/7828 , H01L29/792
摘要： In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.
摘要翻译：在使用SiC衬底的SiC-MOSFET功率器件中，采用具有电荷俘获特性的层叠绝缘膜作为SiC-DiMOSFET的栅极绝缘膜，并且将电荷注入到层叠绝缘膜中，从而抑制门极电压的变化。

40. 发明申请

US20120316445A1 Ultrasonic transducer and ultrasonic diagnostic device using same 有权
标题翻译：超声波换能器和超声波诊断装置使用相同
公开(公告)号：US20120316445A1
公开(公告)日：2012-12-13
申请号：US13577816
申请日：2011-01-25
申请人： Shuntaro Machida , Taiichi Takezaki , Toshiyuki Mine
发明人： Shuntaro Machida , Taiichi Takezaki , Toshiyuki Mine
IPC分类号： H02N1/08 , A61B8/00
CPC分类号： B06B1/0292 , A61B8/00
摘要： In an ultrasonic transducer comprising a first electrode, a first insulating film disposed on the first electrode, a hollow part provided above the first insulating film and disposed between surfaces above and below the hollow part, a second insulating film disposed above the hollow part, and a second electrode disposed on the second insulating film, a first conductive film disposed on the side of the surface below the hollow part and a second conductive film disposed on the side of the surface above the hollow part are provided, the first conductive film and the second conductive film are disposed so that they overlap with a region in which the surfaces above and below the hollow part contact with each other as seen from above when the transducer is driven, and they do not overlap with each other in the region as seen from above. With such a configuration, there are provided a structure suitable for, even when the surface above the hollow part contacts with the surface below the hollow part, suppressing concentration of electric fields and electric currents in the insulating films in the contact region, and suppressing injection of electrical charge into the insulating films and degradation of dielectric strength thereof, and an ultrasonic diagnostic device using it.
摘要翻译：在包括第一电极的超声换能器中，设置在第一电极上的第一绝缘膜，设置在第一绝缘膜之上并设置在中空部分之上和之下的表面之间的中空部分，设置在中空部分上方的第二绝缘膜，以及设置在第二绝缘膜上的第二电极，设置在中空部分下方的表面侧的第一导电膜和设置在中空部分上方表面侧的第二导电膜，第一导电膜和第二导电膜被设置为使得它们与中空部分的上表面和下表面之间的表面彼此重叠的区域与传感器被驱动时从上方观察到，并且它们在区域中彼此不重叠，如从以上。通过这样的结构，即使当中空部件上方的表面与中空部件下方的表面接触时，也能够抑制接触区域中的绝缘膜中的电场和电流的集中，并抑制注入的绝缘膜中的电荷和介电强度的降低，以及使用它的超声波诊断装置。

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