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    • 33. 发明授权
    • Integrated circuits having a multi-layer structure with a seal ring
    • 具有密封环的多层结构的集成电路
    • US07554176B2
    • 2009-06-30
    • US11088969
    • 2005-03-24
    • Hiroshi Naito
    • Hiroshi Naito
    • H01L23/544H01L21/4763
    • H01L21/7684H01L21/76801H01L21/76804H01L21/76819H01L21/78H01L23/564H01L23/585H01L2924/0002H01L2924/00
    • A plurality of IC regions are formed on a semiconductor wafer, which is cut into individual chips incorporating ICs, wherein wiring layers and insulating layers are sequentially formed on a silicon substrate. In order to reduce height differences between ICs and scribing lines, a planar insulating layer is formed to cover the overall surface with respect to ICs, seal rings, and scribing lines. In order to avoid occurrence of breaks and failures in ICs, openings are formed to partially etch insulating layers in a step-like manner so that walls thereof are each slanted by prescribed angles ranging from 20° to 80°. For example, a first opening is formed with respect to a thin-film element section, and a second opening is formed with respect to an external-terminal connection pad.
    • 在半导体晶片上形成多个IC区域,该半导体晶片被切割成具有IC的单个芯片,其中布线层和绝缘层依次形成在硅衬底上。 为了减少IC和划刻线之间的高度差异,形成平面绝缘层以覆盖相对于IC,密封环和划线的整个表面。 为了避免IC中的断裂和故障的发生,形成开口部分地以阶梯状方式蚀刻绝缘层,使得其壁各自倾斜20°至80°的规定角度。 例如,相对于薄膜元件部形成第一开口,并且相对于外部端子连接焊盘形成第二开口。
    • 34. 发明申请
    • Magnetic Sensor and Manufacturing Method Therefor
    • 磁传感器及其制造方法
    • US20080169807A1
    • 2008-07-17
    • US10584666
    • 2006-03-15
    • Hiroshi NaitoHideki SatoYukio WakuiMasayoshi Omura
    • Hiroshi NaitoHideki SatoYukio WakuiMasayoshi Omura
    • G01R33/02H01F7/06
    • H01L27/22B82Y25/00G01R33/09G01R33/093H01L43/12Y10T29/4902Y10T29/49075
    • There is provided a small-size magnetic sensor for detecting the intensity of a magnetic field in three axial directions, in which a plurality of giant magnetoresistive elements are formed on a single semiconductor substrate. A thick film is formed on the semiconductor substrate; giant magnetoresistive elements forming an X-axis sensor and a Y-axis sensor are formed on a planar surface thereof; and giant magnetoresistive elements forming a Z-axis sensor are formed using slopes of channels formed in the thick film. Regarding the channel formation, it is possible to use the reactive ion etching and high-density plasma CVD methods. In addition, an insulating film is formed between the thick film and passivation film and is used as an etching stopper. Each of the slopes of the channels can be constituted of a first slope and a second slope, so that a magneto-sensitive element is formed on the second slope having a larger inclination angle. In order to optimize the slope shape and inclination with respect to each channel, it is possible to form a dummy slope that does not directly relate to the formation of the giant magnetoresistive elements.
    • 提供了一种用于检测三个轴向上的磁场强度的小型磁传感器,其中在单个半导体衬底上形成多个巨磁电阻元件。 在半导体衬底上形成厚膜; 在其平面上形成形成X轴传感器和Y轴传感器的巨磁阻元件; 并且使用形成在厚膜中的通道的斜面形成形成Z轴传感器的巨磁阻元件。 关于通道形成,可以使用反应离子蚀刻和高密度等离子体CVD方法。 此外,在厚膜和钝化膜之间形成绝缘膜,并用作蚀刻停止层。 通道的每个斜面可以由第一斜面和第二斜面构成,使得在具有较大倾斜角的第二斜面上形成磁敏元件。 为了优化相对于每个通道的斜率形状和倾斜度,可以形成与形成巨磁阻元件没有直接关系的虚拟斜率。
    • 36. 发明申请
    • Semiconductor wafer and manufacturing method therefor
    • 半导体晶片及其制造方法
    • US20070120228A1
    • 2007-05-31
    • US11657007
    • 2007-01-24
    • Hiroshi Naito
    • Hiroshi Naito
    • H01L23/544
    • H01L21/7684H01L21/76801H01L21/76804H01L21/76819H01L21/78H01L23/564H01L23/585H01L2924/0002H01L2924/00
    • A plurality of IC regions are formed on a semiconductor wafer, which is cut into individual chips incorporating ICs, wherein wiring layers and insulating layers are sequentially formed on a silicon substrate. In order to reduce height differences between ICs and scribing lines, a planar insulating layer is formed to cover the overall surface with respect to ICs, seal rings, and scribing lines. In order to avoid occurrence of breaks and failures in ICs, openings are formed to partially etch insulating layers in a step-like manner so that walls thereof are each slanted by prescribed angles ranging from 20° to 80°. For example, a first opening is formed with respect to a thin-film element section, and a second opening is formed with respect to an external-terminal connection pad.
    • 在半导体晶片上形成多个IC区域,该半导体晶片被切割成具有IC的单个芯片,其中布线层和绝缘层依次形成在硅衬底上。 为了减少IC和划刻线之间的高度差异,形成平面绝缘层以覆盖相对于IC,密封环和划线的整个表面。 为了避免IC中的断裂和故障的发生,形成开口部分地以阶梯状方式蚀刻绝缘层,使得其壁各自倾斜20°至80°的规定角度。 例如,相对于薄膜元件部形成第一开口,并且相对于外部端子连接焊盘形成第二开口。
    • 38. 发明授权
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US6147003A
    • 2000-11-14
    • US72799
    • 1998-05-05
    • Suguru TabaraHiroshi Naito
    • Suguru TabaraHiroshi Naito
    • H01L21/302H01L21/304H01L21/3065H01L21/768
    • H01L21/31116H01L21/02063H01L21/31111H01L21/31138H01L21/32136H01L21/32137H01L21/76804Y10S438/906
    • A method of manufacturing a semiconductor device includes the steps of: a) forming a wiring layer on a semiconductor substrate, the wiring layer being an Al or Al alloy layer, or a laminated wiring layer including an Al or Al alloy layer and a Ti or Ti alloy layer formed thereon; b) coating a resist layer on the wringing layer and patterning the resist layer to form a wiring resist pattern; c) patterning the wiring layer to form a wiring pattern 3 by using the wiring resist pattern as a mask; d) forming an interlayer insulating film 5 on the semiconductor substrate to cover the wiring pattern; e) coating a resist layer on the interlayer insulating film and patterning the resist layer to form a connection hole resist pattern 6; f) dry-etching the interlayer insulating film with an etching gas containing fluorine to form a connection hole reaching the wiring pattern 3, by using the connection hole resist pattern as a mask; g) after the step f), rinsing the semiconductor substrate in a liquid 10 made of a material selected from a group consisting of water, alcohol, pyridine, and combinations thereof; and h) after the step g), ashing the connection hole resist pattern 6.
    • 一种制造半导体器件的方法包括以下步骤:a)在半导体衬底上形成布线层,所述布线层为Al或Al合金层,或者包括Al或Al合金层和Ti或 Ti合金层; b)在所述拧紧层上涂覆抗蚀剂层,并且对所述抗蚀剂层进行构图以形成布线抗蚀剂图案; c)通过使用所述布线抗蚀剂图案作为掩模来图案化所述布线层以形成布线图案3; d)在半导体衬底上形成层间绝缘膜5以覆盖布线图形; e)在层间绝缘膜上涂覆抗蚀剂层并图案化抗蚀剂层以形成连接孔抗蚀图案6; f)通过使用连接孔抗蚀剂图案作为掩模,用含氟蚀刻气体干蚀刻层间绝缘膜以形成到达布线图案3的连接孔; g)在步骤f)之后,从由水,醇,吡啶及其组合组成的组中选择的材料制成的液体10中冲洗半导体衬底; 和h)在步骤g)之后,灰化连接孔抗蚀图案6。
    • 40. 发明授权
    • Electric power steering system
    • 电动助力转向系统
    • US5027915A
    • 1991-07-02
    • US289737
    • 1988-12-27
    • Shuuetsu SuzukiMichitaka TeradaAkio HashimotoHiroshi Naito
    • Shuuetsu SuzukiMichitaka TeradaAkio HashimotoHiroshi Naito
    • B62D5/04
    • B62D5/0463B62D5/0439B62D5/0478Y10T477/30
    • An electric power steering system includes a steering torque detecting device for detecting a steering torque applied between an input shaft connected to a steering wheel and an output shaft connected to a steering gear in response to an elastic deformation of an elastic member connecting the input shaft with the output shaft, an electric motor whose rotation is controlled by a control signal from a control device in response to a detecting signal from the steering torque detecting device, and a clutch device interposed between the electric motor and the output shaft and controlling an intermittent transmission of the rotation of the electric motor to the output shaft in response to the elastic deformation of the elastic member. Thereby, it is possible to improve the safety performance, the reliability and the steering wheel feeling of an electric power steering system.
    • 电动助力转向系统包括转向转矩检测装置,用于响应于连接输入轴的弹性构件的弹性变形,检测施加在连接到方向盘的输入轴与连接到舵机的输出轴之间的转向扭矩, 输出轴,响应于来自转向转矩检测装置的检测信号的来自控制装置的控制信号的旋转的电动机和插入在电动机和输出轴之间的离合器装置,并且控制间歇变速器 响应于弹性构件的弹性变形,电动机旋转到输出轴。 由此,可以提高电动助力转向系统的安全性能,可靠性和方向盘感觉。