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    • 35. 发明授权
    • Finite state automation text search apparatus having two-level memory
structure
    • 具有两级存储结构的有限状态自动文本搜索装置
    • US5388234A
    • 1995-02-07
    • US77585
    • 1993-06-17
    • Yuji KannoMasao ItoKen TsurubayashiKazuaki KurachiAtsushi Ando
    • Yuji KannoMasao ItoKen TsurubayashiKazuaki KurachiAtsushi Ando
    • G06F7/02G06F17/30G06F11/30
    • G06F17/30985G06F7/02G06F2207/025
    • A finite state automaton (FSA) text search apparatus converts each of successively received binary code numbers, representing successive characters of a text to be searched, into two portions. Two portions are extracted from a state number which is currently being read out from a first table memory, with one portion being combined with one of the input character portions and the combination used to select one of a set of 1st displacement numbers from a second table memory, while a second portion of the current state number and the other portion of the input character number similarly select one of a set of 2nd displacement numbers from a third table memory, and the entire current state number selects one of a set of base numbers from a fourth table memory. The selected 1st and 2nd displacement numbers are combined with the selected base number, and the result used to select the next state number from the first table memory. The overall memory capacity required is minimized, while achieving a high search speed.
    • 有限状态自动机(FSA)文本搜索装置将连续接收的二进制代号中的每一个代表要搜索的文本的连续字符转换成两部分。 从当前正在从第一表存储器读出的状态号提取两部分,其中一部分与输入字符部分之一组合,以及用于从第二表中选择一组第一位移号的组合 存储器,而当前状态号码的第二部分和输入字符号码的另一部分类似地从第三表存储器中选择一组第二位移号码中的一个,并且整个当前状态号码选择一组基数 从第四个表记忆。 所选择的第一和第二位移号与选择的基数组合,并且用于从第一表存储器中选择下一个状态数的结果。 所需的总体内存容量最小化,同时实现了高搜索速度。
    • 36. 发明授权
    • Absolute value comparing apparatus for comparing absolute values of data
at high speed
    • 绝对值比较装置,用于比较高速数据的绝对值
    • US5376915A
    • 1994-12-27
    • US43710
    • 1993-04-08
    • Sumitaka TakeuchiMasao Ito
    • Sumitaka TakeuchiMasao Ito
    • G06F7/02
    • G06F7/026
    • Disclosed is an absolute value comparator for comparing respective absolute values of sequentially applied two data. A decoder circuit sequentially converts the applied data into a plurality of bit signals in accordance with a predetermined rule. After a preceding conversion bit signal is once held in a register circuit, the held bit signal is inverted for each bit by an inversion circuit. Thus, a logic circuit receives a preceding inverted bit signal and a succeeding conversion bit signal and outputs an output signal B indicating the result of comparison. Since a full adder is unnecessary, a comparison between the absolute values of the applied data can be made at a high speed.
    • 公开了一种用于比较顺序应用的两个数据的绝对值的绝对值比较器。 解码器电路根据预定规则顺序地将所施加的数据转换成多个比特信号。 在先前的转换位信号一旦被保持在寄存器电路中之后,所保持的位信号通过反相电路针对每个位反相。 因此,逻辑电路接收先前的反相位信号和后续转换位信号,并输出表示比较结果的输出信号B. 由于不需要全加器,所以可以高速地进行应用数据的绝对值之间的比较。
    • 39. 发明授权
    • Semiconductor device including dummy transistors with reduced off-leakage current
    • 半导体器件包括具有减少的漏电流的虚拟晶体管
    • US08957480B2
    • 2015-02-17
    • US14003225
    • 2011-03-04
    • Kazuaki DeguchiYasuo MorimotoMasao Ito
    • Kazuaki DeguchiYasuo MorimotoMasao Ito
    • H01L29/00H01L27/088H01L21/8234H01L27/02
    • H01L27/088H01L21/823425H01L27/0207H01L29/7846
    • In a semiconductor device, an active region includes: a first impurity region to which a predetermined voltage is applied; second and third impurity regions forming a pair of conductive electrodes of an insulated gate field effect transistor; and at least one impurity region disposed between the first and second impurity regions. A voltage that causes electrical conduction between the second and third impurity regions is applied to a gate electrode disposed between the second and third impurity regions. All gate electrodes disposed between the first and second impurity regions are configured to be electrically connected to the first impurity region constantly. All impurity regions disposed between the first and second impurity regions are electrically isolated from the first and second impurity regions and maintained in a floating state.
    • 在半导体器件中,有源区包括:施加预定电压的第一杂质区; 形成绝缘栅场效应晶体管的一对导电电极的第二和第三杂质区; 以及设置在第一和第二杂质区域之间的至少一个杂质区域。 将引起第二和第三杂质区之间导电的电压施加到设置在第二和第三杂质区之间的栅电极。 设置在第一和第二杂质区域之间的所有栅极电极被配置为恒定地电连接到第一杂质区域。 设置在第一和第二杂质区域之间的所有杂质区域与第一和第二杂质区域电隔离并保持在浮置状态。