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    • 37. 发明授权
    • Data decoder
    • 数据解码器
    • US6111833A
    • 2000-08-29
    • US930162
    • 1997-10-03
    • Toshiyuki NakagawaHiroyuki InoShunji YoshimuraShinichi Kai
    • Toshiyuki NakagawaHiroyuki InoShunji YoshimuraShinichi Kai
    • G11B20/10G11B20/14G11B20/18H03M5/14H04L25/49G11B7/00
    • H04L25/4906G11B20/10009G11B20/1426G11B20/18H03M5/145
    • In a data decoding apparatus of this invention, level of a reproduction RF signal 7a at the time of the binary level judgment of channel bit is temporarily stored into a RF signal level memory section 20. The portions which do not satisfy the conditions of the minimum run length and the maximum run length of the same symbols within the channel bit data train are respectively detected by a (d'-1) detecting section 16 and a (k'+1) detecting section 17. This data decoding apparatus comprises correction bit position detecting sections 18, 19 for outputting correction bit position designation signals on the basis of level of the RF signal at the time of the binary level judgment stored in the RF signal level memory section 20, and a bit data inversion correcting section 15 for inverting logic level of data at bit position designated on the basis of the correction bit position designation signals 18a, 18b, 19a, 19b. In the case where there exists any portion which does not satisfy the conditions of the minimum run length and/or the maximum run length of the same symbols within channel bit data obtained by binarizing a signal which has been read out from the recording medium, correction is implemented to the channel bit data, thereby making it possible to improve the bit error rate, and to ensure skew margin.
    • PCT No.PCT / JP97 / 00336 Sec。 371日期1997年10月3日第 102(e)日期1997年10月3日PCT 1997年2月7日提交PCT公布。 WO97 / 29485 PCT公开号 日期:1997年8月14日在本发明的数据解码装置中,通道位的二进制判定时的再现RF信号7a的电平临时存储到RF信号电平存储部20中。不满足的部分 信道位数据序列中相同符号的最小游程长度和最大游程长度的条件分别由(d'-1)检测部分16和(k'+ 1)检测部分17检测。该数据 解码装置包括校正位位置检测部分18,19,用于根据存储在RF信号电平存储部分20中的二进制电平判断时的RF信号的电平输出校正位位置指定信号,以及位数据反转 校正部分15,用于反转基于校正位位置指定信号18a,18b,19a,19b指定的比特位置的数据的逻辑电平。 在通过对从记录介质读出的信号进行二值化获得的通道位数据中存在不满足最小游程长度的条件和/或相同符号的最大游程长度的部分的情况下, 被实现到通道位数据,从而使得可以提高误码率,并且确保倾斜余量。
    • 38. 发明授权
    • Encoder decoder device not using an A/D converter and method thereof
    • 不使用A / D转换器的编码器解码器装置及其方法
    • US5986592A
    • 1999-11-16
    • US940828
    • 1997-09-30
    • Toshiyuki NakagawaShunji Yoshimura
    • Toshiyuki NakagawaShunji Yoshimura
    • H03M13/00
    • H03M13/00
    • An encoder/decoder device for improving the bit error rate, speedily and at low cost without using an A/D converter circuit. A comparator compares the playback signal loaded from the disk with a specified reference level, places the signal in binary notation and sends the binary information to a memory. When the continuous length showing the quantity of zeroes placed between ones in succession is an error length which is shorter than a specified length 3T designated beforehand, an error length detection circuit detects this as a continuous length. A pattern detector circuit detects patterns in which the continuous length in front of error length 2T is 3T and the continuous length behind 2T is 4T or more, and further detects patterns in which the next continuous length after error length 2T is 3T and the continuous length in front of 2T is 4T or more. A position compensator circuit specifies the bit right after 2T as the correction position when a pattern greater than 3T-2T-4T is detected; and specifies the bit right before 2T when a pattern greater than 4T-2T-3T is detected. A processing circuit inverts the logic of the bits specified for position correction and outputs the result.
    • 一种用于在不使用A / D转换器电路的情况下快速且低成本地改善误码率的编码器/解码器装置。 比较器将从磁盘加载的重放信号与指定的参考电平进行比较,将信号以二进制符号表示,并将二进制信息发送到存储器。 当连续放置的零的数量的连续长度是比预先指定的指定长度3T短的误差长度时,误差长度检测电路将其检测为连续长度。 模式检测电路检测错误长度2T前的连续长度为3T,2T后的连续长度为4T以上的图案,进一步检测误差长度2T后的下一连续长度为3T的图案,连续长度 在2T以前是4T以上。 当检测到大于3T-2T-4T的图案时,位置补偿器电路指定2T之后的位作为校正位置; 并且当检测到大于4T-2T-3T的模式时,指定位于2T之前的位。 处理电路将指定用于位置校正的位的逻辑反相并输出结果。