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31. 发明授权

US07829950B2 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07829950B2
公开(公告)日：2010-11-09
申请号：US12037693
申请日：2008-02-26
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

32. 发明申请

US20100173477A1 Method of Manufacturing Semiconductor Device and Semiconductor Manufacturing Apparatus 有权
标题翻译：制造半导体器件和半导体制造装置的方法
公开(公告)号：US20100173477A1
公开(公告)日：2010-07-08
申请号：US11991908
申请日：2005-09-13
申请人： Tadahiro Ohmi , Akinobu Teramoto , Hiroshi Akahori
发明人： Tadahiro Ohmi , Akinobu Teramoto , Hiroshi Akahori
IPC分类号： H01L21/30 , B05C9/06 , B08B7/04 , B05C9/12 , B05C11/00 , B08B3/00
CPC分类号： H01L21/3003 , B65G2201/0247 , H01L21/31 , H01L29/6659 , H01L29/7833
摘要： A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an H2 gas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.
摘要翻译：发现晶片表面的氢终止劣化的原因是水被吸附在表面上。通过将晶片暴露于含有H 2气体的惰性气体气氛中以抑制由于水引起的氧化反应，可以改善晶片表面上的氢终止。

33. 发明授权

US07732277B2 Semiconductor device and method of fabricating the same 有权
公开(公告)号：US07732277B2
公开(公告)日：2010-06-08
申请号：US11902752
申请日：2007-09-25
申请人： Nobutoshi Aoki , Hiroshi Akahori
发明人： Nobutoshi Aoki , Hiroshi Akahori
IPC分类号： H01L21/336
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/115 , H01L27/11521
摘要： A semiconductor device according to an embodiment of the present invention includes: a semiconductor substrate; an isolation structure formed in a trench, formed in the semiconductor substrate, through a semiconductor oxide film; a floating gate formed on the semiconductor substrate between the isolation structures through an insulating film; a gate oxidation protection film formed on a side surface, on the isolation structure side, of the floating gate so that each of a part of a side surface and a bottom surface of the gate oxidation protection film contacts the insulating film; and a control gate formed on the floating gate through an inter-gate insulating film.

34. 发明授权

US07556975B2 Method for manufacturing backside-illuminated optical sensor 有权
标题翻译：制造背面照明光学传感器的方法
公开(公告)号：US07556975B2
公开(公告)日：2009-07-07
申请号：US10553231
申请日：2004-04-14
申请人： Hiroya Kobayashi , Hiroshi Akahori , Masaharu Muramatsu
发明人： Hiroya Kobayashi , Hiroshi Akahori , Masaharu Muramatsu
IPC分类号： H01L21/02
CPC分类号： H01L27/14618 , H01L27/1464 , H01L27/14683 , H01L27/14812 , H01L2224/45144 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： A CCD portion 3 is formed on a front surface side of a semiconductor substrate 1. A region of a back surface side of semiconductor substrate 1 that corresponds to CCD portion 3 is thinned while leaving peripheral regions 1a of the region, and an accumulation layer 5 is formed on the back surface side of semiconductor substrate 1. An electrical wiring 7, which is electrically connected to CCD portion 3, and an electrode pad 9, which is electrically connected to electrical wiring 7, are then formed on a region 1b of the front surface side of semiconductor substrate 1 that corresponds to a peripheral region 1a, and a supporting substrate 11 is adhered onto the front surface side of semiconductor substrate 1 so as to cover CCD portion 3 while leaving electrode pad 9 exposed. Semiconductor substrate 1 and supporting substrate 11 are then cut at a thinned portion of semiconductor substrate 1 so as to leave peripheral region 1a corresponding to region 1b at which electrical wiring 7 and electrode pad 9 are formed.
摘要翻译： CCD部3形成在半导体基板1的表面侧。半导体基板1的与CCD部3对应的背面侧的区域变薄，同时留下该区域的周边区域1a，并且累积层5 形成在半导体基板1的背面侧上。与CCD部分3电连接的电线7和电连接到电线7的电极焊盘9然后形成在对应于周边区域1a的半导体基板1的前表面侧，并且将支撑基板11粘附到半导体基板1的前表面侧，以便覆盖CCD部分3，同时使电极焊盘9暴露。然后在半导体衬底1的薄化部分切割半导体衬底1和支撑衬底11，以便留下对应于形成电线7和电极焊盘9的区域1b的周边区域1a。

35. 发明申请

US20080296663A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080296663A1
公开(公告)日：2008-12-04
申请号：US12113245
申请日：2008-05-01
申请人： Wakako Takeuchi , Hiroshi Akahori
发明人： Wakako Takeuchi , Hiroshi Akahori
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/792 , H01L27/115 , H01L27/11521 , H01L29/40114 , H01L29/42324
摘要： A semiconductor device according to an embodiment of the present invention includes a first gate insulator, a first gate electrode, a second gate insulator, and a second gate electrode. Regarding the thickness of the second gate insulator, the thickness of the insulator, on a first edge of the first gate electrode in the word-line direction, and the thickness of the insulator, on a second edge of the first gate electrode in the word-line direction, are larger than, the thickness of the insulator, on the upper surface of the first gate electrode, the thickness of the insulator, on the first side of the first gate electrode in the word-line direction, and the thickness of the insulator, on the second side of the first gate electrode in the word-line direction.
摘要翻译：根据本发明实施例的半导体器件包括第一栅极绝缘体，第一栅极电极，第二栅极绝缘体和第二栅极电极。关于第二栅极绝缘体的厚度，在字线方向上的第一栅电极的第一边缘上的绝缘体的厚度和绝缘体的厚度在该字中的第一栅电极的第二边缘上在第一栅电极的上表面上的绝缘体的厚度，绝缘体的厚度，第一栅极的第一侧的字线方向上的厚度，以及绝缘体的厚度绝缘体，位于第一栅电极的第二侧的字线方向上。

36. 发明授权

US07414285B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US07414285B2
公开(公告)日：2008-08-19
申请号：US11870793
申请日：2007-10-11
申请人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
发明人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
IPC分类号： H01L27/108
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.
摘要翻译：非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜，设置在第一绝缘膜上的电荷累积层，设置在电荷累积层上方并含有硅和氮的第二绝缘膜，第三绝缘膜设置在第二绝缘膜上，并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成，其相对介电常数大于氧化硅膜，设置在第三绝缘膜上并含有硅和氮的第四绝缘膜，设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜，第四绝缘膜和控制栅，并含有硅和氧。

37. 发明申请

US20080087937A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US20080087937A1
公开(公告)日：2008-04-17
申请号：US11870793
申请日：2007-10-11
申请人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
发明人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes a first insulating film provided on a surface of a semiconductor substrate, a charge accumulation layer provided on the first insulating film, a second insulating film provided above the charge accumulation layer and contains silicon and nitrogen, a third insulating film provided on the second insulating film, and composed of a single-layer insulating film containing oxygen or a plural-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, relative dielectric constant thereof being larger than it of a silicon oxide film, a fourth insulating film provided on the third insulating film and contains silicon and nitrogen, a control gate provided above the fourth insulating film, and a fifth insulating film provided between the charge accumulation layer and the second insulating film or between the fourth insulating film and the control gate, and contains silicon and oxygen.
摘要翻译：非易失性半导体存储器件包括设置在半导体衬底的表面上的第一绝缘膜，设置在第一绝缘膜上的电荷累积层，设置在电荷累积层上方并含有硅和氮的第二绝缘膜，第三绝缘膜设置在第二绝缘膜上，并且由包含氧的单层绝缘膜或至少其顶层和底层上的膜含有氧的多层堆叠绝缘膜组成，其相对介电常数大于氧化硅膜，设置在第三绝缘膜上并含有硅和氮的第四绝缘膜，设置在第四绝缘膜上方的控制栅极和设置在电荷累积层和第二绝缘膜之间的第五绝缘膜，第四绝缘膜和控制栅，并含有硅和氧。

38. 发明申请

US20070063232A1 Solid-state imaging device 有权
标题翻译：固态成像装置
公开(公告)号：US20070063232A1
公开(公告)日：2007-03-22
申请号：US10554105
申请日：2004-04-22
申请人： Hiroshi Akahori , Tatsuki Kasuya
发明人： Hiroshi Akahori , Tatsuki Kasuya
IPC分类号： H01L31/113
CPC分类号： H01L27/14806 , H04N5/3698 , H04N5/372
摘要： An energy ray sensitive region 11 is divided in its horizontal direction into m columns with the vertical direction as the longitudinal direction, divided in its vertical direction into n rows with the horizontal direction as the longitudinal direction, and is thereby provided with m×n photoelectric conversion portions 13 that are arrayed two-dimensionally. Each of these photoelectric conversion portions 13 generates charges in response to the incidence of energy rays. On the front surface side of energy ray sensitive region 11, a plurality of transfer electrodes 15 are disposed so as to cover energy ray sensitive region 11. The plurality of transfer electrodes 15 are respectively disposed with the horizontal direction as the longitudinal direction and are aligned in the vertical direction. The respective transfer electrodes 15 are electrically connected by voltage dividing resistors 17. Each voltage dividing resistor 17 is disposed in correspondence to each transfer electrode 15, divides a DC output voltage from a DC power supply 19 to generate a DC output potential, and applies this DC output potential to the corresponding transfer electrode 15.
摘要翻译：能量射线敏感区域11在其水平方向上被划分成垂直方向作为纵向方向的m列，在垂直方向上划分成水平方向作为纵向方向的n行，由此设置有m×n个光电转换部分它们二维排列。这些光电转换部13中的每一个响应于能量射线的入射而产生电荷。在能量射线敏感区域11的表面侧，设置多个转印电极15，以覆盖能量射线敏感区域11。多个传送电极15分别以水平方向作为纵向方向设置并且在垂直方向上对准。各个传输电极15由分压电阻器17电连接。每个分压电阻器17对应于每个传输电极15设置，分配来自直流电源19的直流输出电压以产生直流输出电位，并将该直流输出电位施加到相应的转移电极15。

39. 发明授权

US07179746B2 Method of surface treatment for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的表面处理方法
公开(公告)号：US07179746B2
公开(公告)日：2007-02-20
申请号：US10725063
申请日：2003-12-02
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto , Hiroshi Akahori , Keiichi Nii
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto , Hiroshi Akahori , Keiichi Nii
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： H01L21/3185 , H01L21/30604 , H01L21/31654 , H01L21/318 , H01L29/6659
摘要： In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H2O or a low OH density atmosphere, or by strongly terminating the silicon surface by hydrogen or heavy hydrogen. The deposition process of the self-sacrifice oxide film may be carried out by isotropic oxidation.
摘要翻译：在形成在具有大致（110）晶面取向的硅表面上的半导体器件中，硅表面变平，使得表面Ra的算术平均偏差不大于0.15nm，优选为0.09nm，这使得能够制造高迁移率的n-MOS晶体管。通过在脱氧H 2中清洗硅表面，通过在氧自由基气氛中重复自牺牲氧化物膜的沉积工艺和自牺牲氧化物膜的去除工艺来获得这种扁平化的硅表面，或低OH密度气氛，或通过氢或重氢强烈地终止硅表面。自牺牲氧化膜的沉积工艺可以通过各向同性氧化进行。

40. 发明申请

US20050012171A1 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050012171A1
公开(公告)日：2005-01-20
申请号：US10902414
申请日：2004-07-30
申请人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
发明人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
IPC分类号： H01L21/76 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/762 , H01L21/768 , H01L21/8234 , H01L23/522 , H01L29/78 , H01L21/336 , H01L29/00
CPC分类号： H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/76224 , H01L21/823475
摘要： A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.
摘要翻译：本发明的半导体器件包括在半导体衬底上形成的密度为2.2g / cm 3以下的氮化硅膜和在含有TEOS和O 3的环境气氛中形成在氮化硅膜上的氧化硅膜。

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