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1. 发明申请

US20110020995A1 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US20110020995A1
公开(公告)日：2011-01-27
申请号：US12923646
申请日：2010-09-30
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L21/22
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

2. 发明授权

US07821056B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07821056B2
公开(公告)日：2010-10-26
申请号：US11902290
申请日：2007-09-20
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/76
CPC分类号： H01L21/32134 , H01L21/32115 , H01L27/115 , H01L27/11521
摘要： A nonvolatile semiconductor memory device includes an array of nonvolatile memory cell transistors, each of which is configured such that a tunnel insulation film, a floating gate electrode, a floating gate insulation film and a control gate electrode are stacked on a surface of a semiconductor substrate. A mean roughness of an interface between a polysilicon, of which the floating gate electrode is formed, and the floating gate insulation film is 1.5 nm or less.
摘要翻译：非易失性半导体存储器件包括非易失性存储单元晶体管阵列，每个非易失性存储单元晶体管被配置为使得隧道绝缘膜，浮栅电极，浮栅绝缘膜和控制栅电极堆叠在半导体衬底的表面上。形成浮栅的多晶硅与浮栅绝缘膜之间的界面的平均粗糙度为1.5nm以下。

3. 发明授权

US07651914B2 Manufacturing method of a nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件的制造方法
公开(公告)号：US07651914B2
公开(公告)日：2010-01-26
申请号：US12176559
申请日：2008-07-21
申请人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
发明人： Hiroshi Akahori , Wakako Takeuchi , Yoshio Ozawa
IPC分类号： H01L21/336 , H01L21/3205 , H01L21/28
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/513
摘要： A manufacturing method of a nonvolatile semiconductor memory device including: providing a first insulating film and a silicon film on a semiconductor substrate; providing a fifth insulating film containing silicon and oxygen on the silicon film; providing a second insulating film containing silicon and nitrogen on the fifth insulating film; providing a third insulating film on the second insulating film, the third insulating film is composed of a single-layer insulating film containing oxygen or multiple-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, and relative dielectric constant of the single-layer insulating film and the stacked insulating film being larger than relative dielectric constant of a silicon oxide film; providing a fourth insulating film containing silicon and nitrogen on the third insulating film; and providing a control gate above the fourth insulating film.
摘要翻译：一种非易失性半导体存储器件的制造方法，包括：在半导体衬底上提供第一绝缘膜和硅膜; 在硅膜上提供含有硅和氧的第五绝缘膜; 在第五绝缘膜上提供含有硅和氮的第二绝缘膜; 在所述第二绝缘膜上提供第三绝缘膜，所述第三绝缘膜由包含氧或多层堆叠绝缘膜的单层绝缘膜组成，所述单层绝缘膜至少其顶层和底层上的膜含有氧，并且相对单层绝缘膜和叠层绝缘膜的介电常数大于氧化硅膜的相对介电常数; 在所述第三绝缘膜上提供含有硅和氮的第四绝缘膜; 以及在所述第四绝缘膜上方设置控制栅极。

4. 发明授权

US08450787B2 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US08450787B2
公开(公告)日：2013-05-28
申请号：US13277255
申请日：2011-10-20
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/76 , H01L29/792 , H01L23/58
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

5. 发明申请

US20090218615A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090218615A1
公开(公告)日：2009-09-03
申请号：US12396820
申请日：2009-03-03
申请人： Wakako TAKEUCHI , Hiroshi Akahori , Masaki Kondo
发明人： Wakako TAKEUCHI , Hiroshi Akahori , Masaki Kondo
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L27/11573 , H01L21/823462 , H01L27/105 , H01L29/40117 , H01L29/4234 , H01L29/792
摘要： A semiconductor device according to an embodiment of the present invention has a bit line and a word line. The device includes a substrate, a first gate insulation film formed on the substrate, a charge storage layer formed on the first gate insulation film, a second gate insulation film formed on the charge storage layer, and a gate electrode formed on the second gate insulation film, the width between side surfaces of the second gate insulation film in the bit line direction being smaller than the width between side surfaces of the gate electrode in the bit line direction.
摘要翻译：根据本发明的实施例的半导体器件具有位线和字线。该器件包括衬底，形成在衬底上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的电荷存储层，形成在电荷存储层上的第二栅极绝缘膜，以及形成在第二栅极绝缘层上的栅电极在位线方向上，第二栅极绝缘膜的侧表面之间的宽度小于位线方向上的栅电极的侧表面之间的宽度。

6. 发明授权

US08133782B2 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08133782B2
公开(公告)日：2012-03-13
申请号：US13028730
申请日：2011-02-16
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L21/8247
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

7. 发明申请

US20120032253A1 NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非线性半导体存储器及其制造方法
公开(公告)号：US20120032253A1
公开(公告)日：2012-02-09
申请号：US13277255
申请日：2011-10-20
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

8. 发明授权

US08071444B2 Nonvolatile semiconductor memory and method of manufacturing the same 有权
公开(公告)号：US08071444B2
公开(公告)日：2011-12-06
申请号：US12923646
申请日：2010-09-30
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.

9. 发明授权

US07906804B2 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07906804B2
公开(公告)日：2011-03-15
申请号：US11798888
申请日：2007-05-17
申请人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
发明人： Hiroshi Akahori , Wakako Takeuchi , Atsuhiro Sato
IPC分类号： H01L29/78
CPC分类号： H01L27/11521 , H01L21/28273 , H01L27/115 , H01L29/42336
摘要： A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
摘要翻译：存储器件包括：半导体衬底，以行和列形成在衬底上方的存储元件，位线和字线与各个列和行中的存储元件选择性地连接，每个存储元件包括形成在衬底上的第一栅极绝缘体，形成在第一栅极绝缘体上的电荷累积层，形成在电荷累积层上的第二栅极绝缘体和形成在第二栅极绝缘体上的控制电极，其中比率r / d不小于0.5，其中r：a 上角部的曲率半径或电荷蓄积层的表面粗糙度，d：沿着与位线垂直的方向的截面中的第二栅极绝缘体的等效氧化物厚度。

10. 发明授权

US07829950B2 Nonvolatile semiconductor memory and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07829950B2
公开(公告)日：2010-11-09
申请号：US12037693
申请日：2008-02-26
申请人： Hiroshi Akahori , Wakako Takeuchi
发明人： Hiroshi Akahori , Wakako Takeuchi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on the charge accumulating layer, a control gate electrode formed on the second insulating film, and a third insulating film including an Si—N bond that is formed on a bottom surface and side surfaces of the charge accumulating layer.
摘要翻译：非易失性半导体存储器具有半导体衬底，形成在半导体衬底的表面部分上的沟道区上的第一绝缘膜，形成在第一绝缘膜上的电荷累积层，形成在电荷累积层上的第二绝缘膜，形成在第二绝缘膜上的控制栅电极和形成在电荷累积层的底表面和侧表面上的包含Si-N键的第三绝缘膜。

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