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31. 发明授权

US06277681B1 Process to produce ultrathin crystalline silicon nitride on Si(111) for advanced gate dielectrics 有权
标题翻译：在Si（111）上生产用于先进栅极电介质的超薄晶体氮化硅的工艺
公开(公告)号：US06277681B1
公开(公告)日：2001-08-21
申请号：US09270173
申请日：1999-03-16
申请人： Robert M. Wallace , Glen D. Wilk , Yi Wei , Sunil V. Hattangady
发明人： Robert M. Wallace , Glen D. Wilk , Yi Wei , Sunil V. Hattangady
IPC分类号： H01L218234
CPC分类号： H01L29/513 , H01L21/28167 , H01L21/28194 , H01L21/28202 , H01L21/3185 , H01L27/1085 , H01L29/517 , H01L29/518 , H01L29/66181
摘要： A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers. A second dielectric layer compatible with silicon nitride and having a higher dielectric constant than silicon nitride is formed on the first dielectric layer and an electrode layer is formed over the second dielectric layer. A third dielectric layer of silicon nitride having a thickness of about 2 monolayers can be formed between the second dielectric layer and the electrode layer. The second dielectric layer is preferably taken from the class consisting of tantalum pentoxide, titanium dioxide and a perovskite material. Both silicon nitride layers can be formed as in the first embodiment.
摘要翻译：制造半导体器件和器件的方法。根据第一实施例的器件通过提供硅（111）表面来制造，在表面上形成结晶氮化硅的介电层并在氮化硅的介电层上形成电极层。硅（111）表面被清洁并且原子地平坦。如果由晶体氮化硅形成的电介质层，通过将表面放置在大约1×10-7至1×10-5乇的压力下，在大约850℃至大约1000℃的温度下。层是重掺杂硅。根据第二实施例，提供了一种硅（111）表面，在其上形成具有约2个单层厚度的结晶氮化硅的第一介电层。与氮化硅相容并且具有比氮化硅更高的介电常数的第二电介质层形成在第一电介质层上，并且在第二电介质层上形成电极层。可以在第二介电层和电极层之间形成具有约2个单层厚度的氮化硅的第三介电层。第二电介质层优选取自五氧化二钽，二氧化钛和钙钛矿型材料。可以如第一实施例那样形成氮化硅层。

32. 发明授权

US6159829A Memory device using movement of protons 失效
标题翻译：存储器件使用质子运动
公开(公告)号：US6159829A
公开(公告)日：2000-12-12
申请号：US64488
申请日：1998-04-22
申请人： William L. Warren , Karel J. R. Vanheusden , Daniel M. Fleetwood , Roderick A. B. Devine , Leo B. Archer , George A. Brown , Robert M. Wallace
发明人： William L. Warren , Karel J. R. Vanheusden , Daniel M. Fleetwood , Roderick A. B. Devine , Leo B. Archer , George A. Brown , Robert M. Wallace
IPC分类号： G11C13/04 , G11C16/04 , H01L21/28 , H01L29/792 , H01L21/425
CPC分类号： H01L21/263 , G11C13/04 , G11C16/0466 , H01L21/28176 , H01L21/28273 , H01L29/792
摘要： An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.
摘要翻译：利用电介质层内的质子运动的电子写入的存储元件的增强，该电介质层被任一侧上的层围绕，以将质子限制在电介质层内，电极装置连接到周围层，以改变电介质内的质子的空间位置层。该装置优选构造为硅 - 二氧化硅 - 硅层状结构，其中质子在包含氢气的气氛中退火时被引入该结构。通过以突然的冷却结束该退火步骤来增强器件操作。该器件以低功率工作，优选是非易失性的，具有耐辐射性，并且与常规的硅MOS处理兼容，用于与同一硅衬底上的其它微电子元件集成。

33. 发明授权

US6140243A Low temperature process for post-etch defluoridation of metals 失效
标题翻译：金属蚀刻后氟化的低温工艺
公开(公告)号：US6140243A
公开(公告)日：2000-10-31
申请号：US988570
申请日：1997-12-11
申请人： Robert M. Wallace , Peijun Chen , S. Charles Baber , Steven A. Henck
发明人： Robert M. Wallace , Peijun Chen , S. Charles Baber , Steven A. Henck
IPC分类号： H01L21/302 , H01L21/02 , H01L21/027 , H01L21/304 , H01L21/3065 , H01L21/3105 , H01L21/321 , H01L21/3213 , H01L21/768 , H01L21/311
CPC分类号： H01L21/02068 , H01L21/02063 , H01L21/02071 , H01L21/3105 , H01L21/321 , H01L21/32136
摘要： An integrated circuit fabrication process in which residual fluorine contamination on metal surfaces after ashing is removed by exposure to an NH.sub.3 /O.sub.2 plasma.
摘要翻译：集成电路制造工艺，其中通过暴露于NH 3 / O 2等离子体去除灰化后金属表面上的残留氟污染。

34. 发明授权

US5482564A Method of unsticking components of micro-mechanical devices 失效
标题翻译：拆卸微机械部件的方法
公开(公告)号：US5482564A
公开(公告)日：1996-01-09
申请号：US263292
申请日：1994-06-21
申请人： Monte A. Douglas , Robert M. Wallace
发明人： Monte A. Douglas , Robert M. Wallace
IPC分类号： B81B3/00 , B81C1/00 , G02B26/08 , H01H1/00 , B08B3/04 , B08B5/04 , B08B7/00
CPC分类号： B81C1/0096 , B81C1/00968 , G02B26/0841 , H01H1/0036 , B81C2201/117
摘要： A method of unsticking contacting elements (11, 17) of a micro-mechanical device (30). The device is exposed to either a low surface tension liquid with a surfactant (32) or to a supercritical fluid (62) so as to avoid damage to fragile components of the device (30). The exposure conditions are controlled so as to provide optimum results without damage to the device.
摘要翻译：一种解开微机械装置（30）的接触元件（11,17）的方法。该装置暴露于具有表面活性剂（32）或超临界流体（62）的低表面张力液体，以避免损坏装置（30）的易碎部件。控制曝光条件以提供最佳结果而不损坏设备。

35. 发明授权

US5352330A Process for producing nanometer-size structures on surfaces using electron beam induced chemistry through electron stimulated desorption 失效
标题翻译：使用电子束诱导化学通过电子刺激解吸在表面上制备纳米尺寸结构的方法
公开(公告)号：US5352330A
公开(公告)日：1994-10-04
申请号：US954626
申请日：1992-09-30
申请人： Robert M. Wallace
发明人： Robert M. Wallace
IPC分类号： H01L21/027 , C23C8/02 , C23C8/80 , C23C16/04 , C23C16/08 , C23C16/16 , H01L21/20 , H01L21/263 , H01L21/285 , H01L21/302 , H01L21/3065 , H01L21/316 , H01L21/32 , H01L21/00
CPC分类号： B82Y30/00 , C23C16/047 , C23C16/08 , C23C16/16 , C23C8/02 , C23C8/80 , H01L21/02238 , H01L21/02307 , H01L21/263 , H01L21/28512 , H01L21/31662 , H01L21/32 , Y10S117/905 , Y10S977/835 , Y10S977/888 , Y10S977/902
摘要： The process of using electron beam induced stimulated desorption chemistry to produce structures of nanometer order size on surfaces. By passivating a reconstructed surface and selectively removing such passivation with an electron beam through the electron stimulated desorption effect, the adsorption of other atoms and/or molecules is controlled at predetermined regions and/or lines on the surface.
摘要翻译：使用电子束诱导的激发解吸化学在表面产生纳米级尺寸的结构的过程。通过钝化重建表面并通过电子激发解吸效应用电子束选择性去除这种钝化，其它原子和/或分子的吸附被控制在表面上的预定区域和/或线上。

36. 发明授权

US06730977B2 Lower temperature method for forming high quality silicon-nitrogen dielectrics 有权
标题翻译：用于形成高质量硅 - 氮电介质的较低温度方法
公开(公告)号：US06730977B2
公开(公告)日：2004-05-04
申请号：US10452999
申请日：2003-06-03
申请人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
发明人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
IPC分类号： H01L2976
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/3185 , H01L29/511 , H01L29/513 , H01L29/518
摘要： A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.
摘要翻译：公开了一种在半导体衬底上形成热氮化硅的方法。该方法允许形成足够厚的用于FET栅极电介质但具有低热量预算的热氮化硅。

37. 发明授权

US06258637B1 Method for thin film deposition on single-crystal semiconductor substrates 失效
标题翻译：在单晶半导体衬底上薄膜沉积的方法
公开(公告)号：US06258637B1
公开(公告)日：2001-07-10
申请号：US09452922
申请日：1999-12-02
申请人： Glen D. Wilk , Yi Wei , Robert M. Wallace
发明人： Glen D. Wilk , Yi Wei , Robert M. Wallace
IPC分类号： H01L2100
CPC分类号： H01L21/02043 , H01L21/02046 , H01L21/02238 , H01L21/02255 , H01L21/02301 , H01L21/02312 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/31662 , Y10S438/974
摘要： A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C., and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.
摘要翻译：公开了一种制备在单晶硅衬底上形成薄膜的表面的方法。他的方法的一个实施方案包括在衬底的至少一个区域上形成氧化硅层（其可以是天然氧化物），并且在真空中对衬底进行热退火，同时向氧化物表面提供含硅助焊剂，从而除去氧化硅层。优选地，在去除氧化硅层之后立即形成薄膜。含硅助焊剂优选不足以在氧化硅层的顶部上沉积含硅层，并且还足以基本上抑制硅衬底和氧化硅层之间的形成SiO的反应。本发明的方法允许在低于800℃的温度下与底层硅衬底具有非常平滑的界面（小于0.1nm均方根粗糙度）的生长或沉积，并且理想地适用于沉积具有厚度的超薄膜小于约5nm。

38. 发明授权

US6020243A Zirconium and/or hafnium silicon-oxynitride gate dielectric 失效
标题翻译：锆和/或铪硅 - 氧氮化物栅极电介质
公开(公告)号：US6020243A
公开(公告)日：2000-02-01
申请号：US115859
申请日：1998-07-15
申请人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
发明人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
IPC分类号： H01L21/28 , H01L21/314 , H01L21/316 , H01L29/51 , H01L21/283 , H01L21/31 , H01L21/441 , H01L21/469
CPC分类号： H01L21/31691 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L29/513 , H01L29/517 , H01L29/518 , H01L21/3143 , H01L21/31612 , H01L21/31641 , H01L21/31645
摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.
摘要翻译：本文公开了包括高介电常数锆（或铪）硅 - 氧氮化物栅极电介质的场效应半导体器件及其形成方法。该器件包括其中形成有半导体沟道区24的硅衬底20。在该衬底上形成锆硅氧烷栅极电介质层36，然后形成导电栅极38.具有介电常数的氧化硅 - 氧氮化硅栅极电介质层36显着高于二氧化硅的介电常数。然而，锆硅氧烷栅极电介质也可以被设计为具有二氧化硅的优点，例如，高击穿，低界面状态密度和高稳定性。

39. 发明授权

US4567432A Apparatus for testing integrated circuits 失效
标题翻译：集成电路测试装置
公开(公告)号：US4567432A
公开(公告)日：1986-01-28
申请号：US490001
申请日：1983-06-09
申请人： Douglas A. Buol , Dean N. Mize , John W. Pattschull , Robert M. Wallace
发明人： Douglas A. Buol , Dean N. Mize , John W. Pattschull , Robert M. Wallace
IPC分类号： H01L21/66 , G01R1/073 , G01R31/28 , G01R1/06 , G01R31/26
CPC分类号： G01R31/2891
摘要： A system for statically and dynamically testing an integrated circuit die in wafer form at various temperatures includes a multilayer support fixture in which the probes, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar layers detachably connected to one another, the probe and the probe support board being formed of materials having a low temperature coefficient of thermal expansion. A heated/cooled wafer positioning chuck controls the temperature of the wafer thereon during static and dynamic testing.
摘要翻译：用于在各种温度下以晶片形式静态和动态地测试集成电路管芯的系统包括多层支撑夹具，其中探针，静态测试开关电路和动态测试开关电路可拆卸地安装在分开的间隔开的平面层上彼此连接，探针和探针支撑板由具有低温度热膨胀系数的材料形成。加热/冷却的晶片定位卡盘在静态和动态测试期间控制其上的晶片的温度。

40. 发明申请

US20100224851A1 SYNTHESIZING GRAPHENE FROM METAL-CARBON SOLUTIONS USING ION IMPLANTATION 有权
标题翻译：使用离子植入法合成来自金属碳解决方案的石墨
公开(公告)号：US20100224851A1
公开(公告)日：2010-09-09
申请号：US12706116
申请日：2010-02-16
申请人： Luigi Colombo , Robert M. Wallace , Rodney S. Ruoff
发明人： Luigi Colombo , Robert M. Wallace , Rodney S. Ruoff
IPC分类号： H01L29/15 , C04B35/536 , H01L21/20
CPC分类号： H01L21/02612 , H01L21/02527
摘要： A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.
摘要翻译：一种使用碳的离子注入合成石墨烯的方法和半导体器件。使用离子注入将碳注入金属中。在碳分布在金属中之后，对金属进行退火和冷却，以便从金属沉淀碳以在金属表面上形成一层石墨烯。然后将金属/石墨烯表面转移到电介质层，使得石墨烯层被放置在电介质层的顶部上。然后去除金属层。或者，将凹陷区域图案化并蚀刻在位于基底上的电介质层中。金属后来形成在这些凹陷区域。然后使用离子注入将碳注入到金属中。然后可以对金属进行退火和冷却，以便从金属沉淀碳以在金属表面上形成一层石墨烯。

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