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    • 31. 发明申请
    • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    • 制造半导体器件的方法
    • US20110318894A1
    • 2011-12-29
    • US13053511
    • 2011-03-22
    • Hitoshi KobayashiShinya Ikesaka
    • Hitoshi KobayashiShinya Ikesaka
    • H01L21/336
    • H01L29/0865H01L21/2815H01L29/0696H01L29/1095H01L29/407H01L29/41766H01L29/4236H01L29/42368H01L29/42376H01L29/66734
    • According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a first semiconductor region of a second conductivity type on a semiconductor layer of a first conductivity type, forming a mask selectively opening a surface of the first semiconductor region, and forming a trench penetrating through the first semiconductor region to reach the semiconductor layer. The method can include exposing further a part of the surface of the first semiconductor region from the mask. The method can include forming a control electrode in the trench, and forming selectively a second semiconductor region of the first conductivity type on the surface of the first semiconductor region. The method can include removing the mask having the opening. The method can include forming selectively a third conductor region of the second conductivity type on the surface of the first semiconductor region.
    • 根据一个实施例,公开了一种用于制造半导体器件的方法。 该方法可以包括在第一导电类型的半导体层上形成第二导电类型的第一半导体区域,形成选择性地打开第一半导体区域的表面的掩模,以及形成贯穿第一半导体区域的沟槽,以达到 半导体层。 该方法可以包括进一步从掩模暴露第一半导体区域的一部分表面。 该方法可以包括在沟槽中形成控制电极,并且在第一半导体区域的表面上选择性地形成第一导电类型的第二半导体区域。 该方法可以包括去除具有开口的掩模。 该方法可以包括在第一半导体区域的表面上选择性地形成第二导电类型的第三导体区域。
    • 32. 发明授权
    • Locking system, game machine, and device management system
    • 锁定系统,游戏机和设备管理系统
    • US07642896B2
    • 2010-01-05
    • US10517337
    • 2003-08-22
    • Hitoshi Kobayashi
    • Hitoshi Kobayashi
    • G06K19/00
    • G07F17/3202G07C9/00111G07C9/00309G07C2009/00777G07F17/32G07F17/3216
    • An IC tag for monitoring opening/closing operation 86 is attached on the backside of the glass frame 111 at its upper right portion, and on a main body frame 110 opposing to the glass frame 111, an antenna for monitoring 68 is attached. An IC tag for monitoring opening/closing operation 186 is attached on the inside of the right frame of the wooden frame 112, and on the main body frame 111 opposing to the wooden frame 112, an antenna for monitoring 168 is attached. The distance between these antenna and IC tags is respectively set to about 3 mm in a state where the frames on which they are provided are closed. A R/W unit always polls the IC tags via the antennas. When the glass frame 111 or the main body frame 110 is opened and the distance between the antenna and the IC tag exceeds about 5 mm, the communication becomes unavailable and this state is immediately detected. An antenna for key 128 is buried above a keyhole 120. When a key incorporating an IC tag for key therein is inserted in the keyhole 120, the R/W unit reads the ID code of the IC tag. A solenoid for locking operation is turned on only when the read ID code is identical to the registered ID so as to pull a plunger for unlocking the frame.
    • 用于监视打开/关闭操作86的IC标签86附接在玻璃框架111的右上部的背面,并且在与玻璃框架111相对的主体框架110上,安装有用于监视的天线68的天线。 用于监视打开/关闭操作186的IC标签被安装在木框架112的右框架的内侧上,并且在与木框架112相对的主体框架111上,安装有用于监视的天线168。 这些天线和IC标签之间的距离在其设置的框架关闭的状态下分别设定为约3mm。 R / W单元总是通过天线轮询IC标签。 当玻璃框架111或主体框架110打开并且天线和IC标签之间的距离超过5mm时,通信变得不可用,并且立即检测到该状态。 钥匙128的天线被埋在钥孔120的上方。当​​将其中包含钥匙的IC标签的钥匙插入钥匙孔120时,R / W单元读取IC标签的ID码。 只有当读取的ID代码与注册的ID相同时,才能打开用于锁定操作的螺线管,以便拉动用于解锁框架的柱塞。
    • 35. 发明申请
    • PYROGENICALLY PRODUCED SILICON DIOXIDE POWDER
    • 生产二氧化硅粉末
    • US20080145659A1
    • 2008-06-19
    • US12017861
    • 2008-01-22
    • Kai SCHUMACHERNaruyasu IshibashiHitoshi KobayashiPaul Brandl
    • Kai SCHUMACHERNaruyasu IshibashiHitoshi KobayashiPaul Brandl
    • C01B33/12
    • C01B33/183Y10T428/2982
    • Pyrogenically produced silicon dioxide powder in the form of aggregates of primary particles having a BET surface area of 300±25 m2/g, wherein the aggregates display an average surface area of 4800 to 6000 nm2, an average equivalent circle diameter (ECD) of 60 to 80 nm and an average circumference of 580 to 750 nm.It is produced by a pyrogenic process in which silicon tetrachloride and a maximum of up to 40 wt. % of a second silicon component comprising H3SiCl, H2SiCl2, HSiCl3, CH3SiCl3, (CH3)2SiCl2, (CH3)3SiCl and/or (n-C3H7)SiCl3 are mixed with primary air and a combustion gas and burnt into a reaction chamber, secondary air also being introduced into the reaction chamber, and the feed materials being chosen such that an adiabatic flame temperature of 1390 to 1450° C. is obtained.It can be used as a filler.
    • 以BET表面积为300±25m 2 / g的一次粒子的聚集体形式的热解生成的二氧化硅粉末,其中聚集体的平均表面积为4800〜6000nm, 2,平均当量圆直径(ECD)为60〜80nm,平均周长为580〜750nm。 它是通过热解法生产的,其中四氯化硅和最多达40wt。 %的包含H 3 SiCl,H 2 SiCl 2,HSiCl 3,CH,SUB的第二硅组分的% (CH 3)3 SiCl 3,(CH 3 3)2 SiCl 2,(CH 3) 3 N 3 SiCl 3和/或(n C 3 H 7)SiCl 3 3与 初级空气和燃烧气体并燃烧到反应室中,二次空气也被引入反应室,并且进料选择为使得绝热火焰温度为1390至1450℃。 它可以用作填料。
    • 40. 发明申请
    • Nonvolatile memory device and data write method for nonvolatile memory device
    • 非易失性存储器件和非易失性存储器件的数据写入方法
    • US20060023509A1
    • 2006-02-02
    • US11176324
    • 2005-07-08
    • Satoru KodairaHitoshi KobayashiKimihiro Maemura
    • Satoru KodairaHitoshi KobayashiKimihiro Maemura
    • G11C16/04
    • G11C16/0433
    • A nonvolatile memory device, wherein each of memory cells includes one of nonvolatile memory elements and one of wordline switches, wherein each of the wordlines connects in common gate electrodes of the wordline switches of memory cells arranged in the row direction; wherein each of the bitlines connects in common the wordline switches of memory cells arranged in the column direction; and wherein one of the first control gate lines connects in common control gate electrodes of the nonvolatile memory elements of M memory cells in one of memory cell blocks (M is an integer equal to or greater than 2); and wherein, when writing data into a desired memory cell, the wordline switches of the memory cells are turned ON by applying a wordline write voltage to a wordlines corresponding to the desired memory cell, a bitline write voltage is applied to the bitlines connected to the memory cells, and a control gate line write voltage is applied to one of the first control gate lines disposed in the memory cell block.
    • 一种非易失性存储器件,其中每个存储器单元包括非易失性存储器元件和字线开关中的一个,其中每个字线连接在沿行方向布置的存储器单元的字线开关的公共栅电极中; 其中每个位线共同地连接在列方向上布置的存储器单元的字线开关; 并且其中一个第一控制栅极线连接在存储单元块之一中的M个存储单元的非易失性存储元件的公共控制栅极中(M为等于或大于2的整数); 并且其中当将数据写入期望的存储单元时,通过将字线写入电压施加到对应于期望的存储单元的字线来使存储单元的字线切换为ON,位线写入电压被施加到连接到所述存储单元的位线 存储单元和控制栅线写入电压被施加到设置在存储单元块中的第一控制栅极线之一。