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31. 发明授权

US06546018B1 Digital system having a peripheral bus structure with at least one store-and-forward segment 有权
标题翻译：数字系统具有具有至少一个存储和转发段的外围总线结构
公开(公告)号：US06546018B1
公开(公告)日：2003-04-08
申请号：US09309484
申请日：1999-05-10
申请人： John I. Garney , John S. Howard , Venkat Iyer
发明人： John I. Garney , John S. Howard , Venkat Iyer
IPC分类号： H04J1500
CPC分类号： G06F13/385
摘要： A digital system is provided with a bus controller to operate and control a peripheral bus, wherein the bus controller selectively operates at least a first portion of the peripheral bus in a store-and-forward manner. The bus controller facilitates communication with a first bus agent in this first portion by sending a number of request packets destined for the first bus agent to a first hub in the first portion, in an integrated multi-packet form, in bulk, and at a first communication speed. The first hub buffers the request packets, and then forwards the request packets to the first bus agent, on a packet-by-packet basis, and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the first hub also receives communications destined for a second bus agent of this first portion, from the bus controller at the first communication speed, and repeats the communications for the second bus agent without buffering, at also the first communication speed. In another embodiment, the peripheral bus further includes a second portion, including a second hub that receives communications destined for a third bus agent in this second portion, from the bus controller at the second communication speed, and repeats the communications for the third bus agent without buffering, at also the second communication speed.
摘要翻译：数字系统设置有总线控制器以操作和控制外围总线，其中总线控制器以存储和转发的方式选择性地操作外围总线的至少第一部分。总线控制器通过以大量方式以集成的多分组形式向第一部分中的第一集线器发送目的地为第一总线代理的多个请求分组，并且在第一通讯速度。第一集线器缓冲请求分组，然后以逐个分组的方式，以第二通信速度将请求分组转发到第一总线代理。在一个实施例中，第二通信速度比第一通信速度慢。在一个实施例中，第一集线器还以第一通信速度从总线控制器接收目的地为该第一部分的第二总线代理的通信，并且也以第一通信速度重复第二总线代理的通信而不进行缓冲。在另一个实施例中，外围总线还包括第二部分，包括第二集线器，第二集线器以第二通信速度从总线控制器接收发往第二部分中的第三总线代理的通信，并重复第三总线代理的通信没有缓冲，也是第二个通信速度。

32. 发明授权

US06389501B1 I/O peripheral device for use in a store-and-forward segment of a peripheral bus 有权
标题翻译：用于外围总线存储转发段的I / O外围设备
公开(公告)号：US06389501B1
公开(公告)日：2002-05-14
申请号：US09309087
申请日：1999-05-10
申请人： John I. Garney , John S. Howard , Venkat Iyer
发明人： John I. Garney , John S. Howard , Venkat Iyer
IPC分类号： G06F1312
CPC分类号： G06F13/4059
摘要： An I/O peripheral device is equipped with a first collection of circuitry to enable the I/O peripheral device to provide a store-and-forward manner of operation to a segment of a peripheral bus. The first collection of circuitry includes first buffering circuitry to buffer request packets destined for a first bus agent, received from a bus controller in an integrated multi-packet form, in bulk, and at a first communication speed. Furthermore, the first collection includes control circuitry to forward the request packets separately, in a packet-by-packet basis, to the first bus agent, in a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. The I/O peripheral device further includes second buffer circuitry to buffer response packets to a request from the first bus agent provided separately, and each at the slower second communication speed. The first control circuitry also facilitates forwarding of the buffered response packets to the bus controller in bulk at the faster first communication speed. In one embodiment, the I/O peripheral device further includes second control circuitry to repeat communications destined for a second bus agent, received from the bus controller at the first communication speed, for the second bus agent, at also the first communication speed. In one embodiment, the I/O peripheral device is a hub.
摘要翻译： I / O外围设备配备有电路的第一集合，以使得I / O外围设备能够向外围总线的段提供存储转发的操作方式。电路的第一集合包括第一缓冲电路，用于以批量和第一通信速度缓冲以集成多分组形式从总线控制器接收的去往第一总线代理的请求分组。此外，第一集合包括控制电路，其以第二通信速度逐个分组地将请求分组转发到第一总线代理。在一个实施例中，第二通信速度比第一通信速度慢。 I / O外围设备还包括第二缓冲器电路，用于将响应分组缓冲到来自分开提供的第一总线代理的请求，并且每个以较慢的第二通信速度缓冲。第一控制电路还有助于将缓冲的响应分组以更快的第一通信速度批量转发到总线控制器。在一个实施例中，I / O外围设备还包括第二控制电路，用于以第一通信速度，以第一通信速度从总线控制器接收第二总线代理的第二总线代理用于第二总线代理。在一个实施例中，I / O外围设备是集线器。

33. 发明授权

US5046657A Tape automated bonding of bumped tape on bumped die 失效
标题翻译：胶带自动粘贴凸起的胶带
公开(公告)号：US5046657A
公开(公告)日：1991-09-10
申请号：US462857
申请日：1990-01-05
申请人： Venkat Iyer , Jagdish Belani , Hem P. Takiar , Rajenda Pendse
发明人： Venkat Iyer , Jagdish Belani , Hem P. Takiar , Rajenda Pendse
IPC分类号： H01L21/603 , H01L23/485 , H01L23/495
CPC分类号： H01L24/10 , H01L23/49572 , H01L24/13 , H01L24/80 , H01L2224/13 , H01L2224/13099 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14
摘要： A tape automated bonding structure (10) includes a copper flexible tape (12) with a plurality of conductive leads (14) having tips (16) arranged in a generally rectangular pattern corresponding to gold bumped contacts (18) on semiconductor die (20). The tips (16) of the conductive leads (14) are configured as bumps extending from the remainder of each conductive lead (14). The tips (16) of the conductive leads (14) are gang bonded to the bumped contacts (18) on the semiconductor die (20) by positioning the tips (16) in registration over each bumped contact and applying heat and pressure to urge the tips (16) and the bumped contacts together, thus forming a thermocompression bond. The harder copper tips (16) penetrate into the gold bumped contacts. The bumped contacts (18) and the remainder of the tips (16) that has not penetrated into the contacts (18) space the conductive leads (14) above surface (22) of the semiconductor die (20).
摘要翻译：带式自动接合结构（10）包括具有多个导电引线（14）的铜柔性带（12），所述多个导电引线（14）具有以对应于半导体管芯（20）上的金凸起的触点（18）的大致矩形图案布置的尖端（16）。导电引线（14）的尖端（16）被配置为从每个导电引线（14）的其余部分延伸的凸块。导电引线（14）的尖端（16）通过将尖端（16）定位在每个凸起的接触件上并且施加热和压力来促使所述导电引线（14）的尖端（16）与所述半导体管芯（20）上的凸起接触件（18）尖端（16）和凸起的接触在一起，从而形成热压接。较硬的铜尖（16）穿透金触点。凸起的触点（18）和未穿入触头（18）的其余的尖端（16）将导电引线（14）放置在半导体管芯（20）的表面（22）上方。

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