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31. 发明申请

US20100064083A1 COMMUNICATIONS DEVICE WITHOUT PASSIVE PULLUP COMPONENTS 审中-公开
标题翻译：没有被动抽头组件的通信设备
公开(公告)号：US20100064083A1
公开(公告)日：2010-03-11
申请号：US12619545
申请日：2009-11-16
申请人： Philip S. Ng , Jinshu Son
发明人： Philip S. Ng , Jinshu Son
IPC分类号： G06F13/00
CPC分类号： G06F13/4077 , G06F2213/0016
摘要： A dual-wire communications bus circuit, compatible with existing two-wire protocols, includes a first and second part of the communications bus circuit to couple to a communications bus. The bus has a first line for carrying data signals from a master device to a slave device and a second line to carry a clock signal between the devices. To improve data throughout and reduce noise, an active pullup device is located in at least one part of the communications bus circuit, the active pullup device in the first part of the of the communications bus circuit couples to the first line and an optional active pullup device in the second part couples to the second line of the communications bus. Each active pullup device may provide a high logic level on one of the communications bus lines.
摘要翻译：与现有的双线协议兼容的双线通信总线电路包括通信总线电路的第一和第二部分以耦合到通信总线。总线具有用于承载从主设备到从设备的数据信号的第一行，以及用于在设备之间携带时钟信号的第二行。为了改善数据并减少噪声，有源上拉器件位于通信总线电路的至少一部分中，通信总线电路的第一部分中的有源上拉器件耦合到第一条线路，并且可选的有源上拉电路第二部分中的设备耦合到通信总线的第二行。每个有源上拉装置可以在通信总线之一上提供高逻辑电平。

32. 发明授权

US5204838A High speed readout circuit 失效
标题翻译：高速读出电路
公开(公告)号：US5204838A
公开(公告)日：1993-04-20
申请号：US751618
申请日：1991-08-21
申请人： Jinshu Son , Nobuaki Miyakawa
发明人： Jinshu Son , Nobuaki Miyakawa
IPC分类号： G11C7/06 , G11C16/26 , H03K5/02 , H03K5/24
CPC分类号： G11C16/26 , G11C7/06 , G11C7/067 , H03K5/023 , H03K5/249
摘要： The high speed readout circuit has an amplifier unit and an operating point setting unit and reads data from a memory sense line at high speed. The circuit further includes a unit for setting an operating point of the amplifier unit by short-circuiting the input and output terminals of the amplifier in response to a first control signal and precharging the sense line up to the operating point, and a unit for setting the sense line at a voltage slightly deviating the operating point in response to a second control signal by making use of a Miller capacitance and sensing the variations from the preset voltage during a reading process.
摘要翻译：高速读出电路具有放大器单元和工作点设定单元，并以高速从存储感测线读出数据。该电路还包括一个单元，用于根据第一控制信号短路放大器的输入和输出端，并将感测线预充电到工作点来设置放大器单元的工作点，以及一个设置单元通过利用米勒电容并在读取过程中感测来自预设电压的变化，响应于第二控制信号使电压稍微偏离工作点的感测线。

33. 发明授权

US06815992B1 Circuit for testing and fine tuning integrated circuit (switch control circuit) 有权
标题翻译：集成电路测试和微调电路（开关控制电路）
公开(公告)号：US06815992B1
公开(公告)日：2004-11-09
申请号：US10607286
申请日：2003-06-25
申请人： Philip S. Ng , Ken Kun Ye , Jinshu Son
发明人： Philip S. Ng , Ken Kun Ye , Jinshu Son
IPC分类号： H03K3037
CPC分类号： G11C29/021 , G01R31/3004 , G11C5/147 , G11C8/08 , G11C29/02 , G11C29/028 , G11C2029/5004 , H03K3/0375 , H03K3/356008
摘要： A switch controlling circuit for the testing and fine-tuning of integrated circuits comprising of a series of flip-flops chain together in a serial manner. The contents of the flip-flop are shift in from the input of the first flip-flop in the chain. The output of each flip-flop connects to individual switch whereby the states of the flip-flops control the state of the switches.
摘要翻译：一种用于集成电路的测试和微调的开关控制电路，其包括串联连接在一起的一系列触发器。触发器的内容从链中的第一触发器的输入移位。每个触发器的输出连接到单独的开关，由此触发器的状态控制开关的状态。

34. 发明授权

US07868660B2 Serial communications bus with active pullup 有权
标题翻译：具有主动上拉电阻的串行通信总线
公开(公告)号：US07868660B2
公开(公告)日：2011-01-11
申请号：US11379473
申请日：2006-04-20
申请人： Philip S. Ng , Jinshu Son
发明人： Philip S. Ng , Jinshu Son
IPC分类号： H03K19/0175
CPC分类号： H03K19/01721 , H03K19/01742
摘要： A dual-wire communications bus circuit, compatible with existing two-wire bus protocols, includes a first and second part of the communications bus circuit to couple to a communications bus. The bus has a first line for carrying data signals from a master device to one or more slave devices and a second line to carry a clock signal between the devices. A pullup resistor is located in each part of the communications bus circuit; the pullup resistor in the first part couples to the first line of the communications bus and the pullup resistor in the second part couples to the second line of the communications bus. To improve data throughput and reduce noise, an active pullup device, working in conjunction with the pullup resistor, is located in each part of the communications bus circuit, providing a high logic level on at least one of the communications bus lines.
摘要翻译：与现有的双线总线协议兼容的双线通信总线电路包括通信总线电路的第一和第二部分以耦合到通信总线。总线具有用于承载来自主设备的数据信号到一个或多个从设备的第一行，以及用于在设备之间传送时钟信号的第二行。上拉电阻位于通信总线电路的每个部分; 第一部分中的上拉电阻耦合到通信总线的第一行，并且第二部分中的上拉电阻耦合到通信总线的第二行。为了提高数据吞吐量并降低噪声，与通信总线电路的每个部分配置的与上拉电阻一起工作的有源上拉器件位于通信总线电路的每个部分中，在至少一个通信总线上提供高逻辑电平。

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