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    • 32. 发明申请
    • Wake-and-Go Mechanism for a Data Processing System
    • 数据处理系统的唤醒机制
    • US20110173631A1
    • 2011-07-14
    • US12024466
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/46
    • G06F9/52G06F9/542
    • A wake-and-go mechanism is provided for a data processing system. When a thread is waiting for an event, rather than performing a series of get-and-compare sequences, the thread updates a wake-and-go array with a target address associated with the event. The thread then goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The operating system or a background sleeper thread associates these storage addresses with the threads waiting for an even at the target addresses, and may wake the one or more threads waiting for the event.
    • 为数据处理系统提供了一个唤醒机制。 当一个线程正在等待一个事件,而不是执行一系列获取和比较序列,线程将更新一个唤醒数组与一个与事件关联的目标地址。 线程然后进入休眠状态直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 操作系统或后台睡眠线程将这些存储地址与等待目标地址的线程相关联,并且可以唤醒等待事件的一个或多个线程。
    • 33. 发明申请
    • Wake-and-Go Mechanism with Prioritization of Threads
    • 线程优先级唤醒机制
    • US20110173625A1
    • 2011-07-14
    • US12024669
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/46
    • G06F9/4843
    • A hardware private array is a thread state storage that is embedded within the processor or within logic associated with a bus or wake-and-go logic. The hardware private array and/or wake-and-go array may have a limited storage area. Therefore, each thread may have an associated priority. If there is insufficient space in the hardware private array, then the wake-and-go mechanism may compare the priority of the thread to the priorities of the threads already stored in the hardware private array and wake-and-go array. If the thread has a higher priority than at least one thread already stored in the hardware private array and wake-and-go array, then the wake-and-go mechanism may remove a lowest priority thread, meaning the thread is removed from hardware private array and wake-and-go array and converted to a flee model.
    • 硬件私有数组是嵌入在处理器内或与总线或唤醒逻辑相关联的逻辑内的线程状态存储器。 硬件私有阵列和/或唤醒阵列可能具有有限的存储区域。 因此,每个线程可以具有相关联的优先级。 如果硬件私有阵列空间不足,则唤醒机制可将线程的优先级与已存储在硬件专用阵列和唤醒数组中的线程的优先级进行比较。 如果线程的优先级高于已经存储在硬件专用阵列和唤醒数组中的至少一个线程,则唤醒机制可能会删除最低优先级的线程,这意味着该线程从硬件私有 阵列和唤醒阵列并转换为逃离模型。
    • 34. 发明申请
    • Look-Ahead Hardware Wake-and-Go Mechanism
    • 前瞻性硬件唤醒机制
    • US20110173423A1
    • 2011-07-14
    • US12024507
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/30
    • G06F9/3851G06F9/542G06F2209/543
    • A hardware wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism looks ahead in the instruction stream of a thread for programming idioms that indicates that the thread is waiting for an event. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the event for each recognized programming idiom. When the thread reaches a programming idiom, the thread goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an even at the target addresses, and may wake the one or more threads waiting for the event.
    • 为数据处理系统提供硬件唤醒机制。 唤醒机制在针对线程正在等待事件的编程习语的线程的指令流中向前看。 唤醒机制将针对每个识别的编程习语用与事件相关联的目标地址更新一个唤醒数组。 当线程达到编程习惯时,线程进入休眠状态,直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址的线程相关联,并且可以唤醒等待事件的一个或多个线程。
    • 35. 发明申请
    • Hardware Wake-and-Go Mechanism for a Data Processing System
    • 数据处理系统的硬件唤醒机制
    • US20090199030A1
    • 2009-08-06
    • US12024595
    • 2008-02-01
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F12/00
    • G06F9/542G06F9/485G06F2209/544
    • A hardware wake-and-go mechanism is provided for a data processing system. The wake-and-go mechanism recognizes a programming idiom that indicates that a thread is waiting for an event. The wake-and-go mechanism updates a wake-and-go array with a target address associated with the event. The thread then goes to sleep until the event occurs. The wake-and-go array may be a content addressable memory (CAM). When a transaction appears on the symmetric multiprocessing (SMP) fabric that modifies the value at a target address in the CAM, the CAM returns a list of storage addresses at which the target address is stored. The wake-and-go mechanism associates these storage addresses with the threads waiting for an even at the target addresses, and may wake the one or more threads waiting for the event.
    • 为数据处理系统提供硬件唤醒机制。 唤醒机制识别一个编程成语,表示线程正在等待事件。 唤醒机制使用与事件相关联的目标地址来更新唤醒数组。 线程然后进入休眠状态直到事件发生。 唤醒阵列可以是内容可寻址存储器(CAM)。 当对称多处理(SMP)结构出现在CAM中的目标地址上修改值的事务时,CAM返回存储目标地址的存储地址列表。 唤醒机制将这些存储地址与等待目标地址的线程相关联,并且可以唤醒等待事件的一个或多个线程。
    • 36. 发明授权
    • Client partition scheduling and prioritization of service partition work
    • 客户端分区调度和服务分区工作的优先级
    • US09317453B2
    • 2016-04-19
    • US13349071
    • 2012-01-12
    • William J. ArmstrongOrran Y. KriegerMichal OstrowskiRandal C. Swanberg
    • William J. ArmstrongOrran Y. KriegerMichal OstrowskiRandal C. Swanberg
    • G06F9/455G06F12/14
    • G06F12/1475G06F9/45558G06F12/1491G06F2009/45579G06F2212/1056
    • A method in a data processing system is provided for processing a service request of a client partition. The method includes: obtaining by a service partition of the data processing system the service request from the client partition, wherein both the client and service partitions execute above a hypervisor of the data processing system; and processing the service request by the service partition utilizing a processor quantum assigned to the client partition and donated by the client partition to the service partition. The client partition controls scheduling of the service partition by queuing the service request at the client partition until the client partition decides to proceed with execution of the service request by the service partition. In one implementation, the service partition is a partition adjunct of the data processing system, which utilizes donated virtual address space of the client partition.
    • 提供数据处理系统中的方法来处理客户端分区的服务请求。 该方法包括:通过数据处理系统的服务分区获取来自客户端分区的服务请求,其中客户端和服务分区都在数据处理系统的管理程序之上执行; 以及使用分配给所述客户端分区并由所述客户端分区捐赠给所述服务分区的处理器量化由所述服务分区处理所述服务请求。 客户机分区通过在客户端分区排队服务请求来控制服务分区的调度,直到客户端分区决定继续执行服务分区的服务请求。 在一个实现中,服务分区是数据处理系统的分区附件,其利用客户端分区的捐赠的虚拟地址空间。
    • 38. 发明授权
    • Wake-and-go mechanism with dynamic allocation in hardware private array
    • 在硬件私有阵列中动态分配的唤醒机制
    • US08640142B2
    • 2014-01-28
    • US12144011
    • 2008-06-23
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • Ravi K. ArimilliSatya P. SharmaRandal C. Swanberg
    • G06F9/46
    • G06F9/52G06F2209/521
    • A wake-and-go mechanism is provided for a data processing system. When a thread first starts executing, a wake-and-go mechanism automatically allocates space for thread state in a hardware private array and space for a target address and other information, if any, in a wake-and-go array. If the hardware private array comprises a reserved portion of system memory, then the wake-and-go mechanism may request a sufficient portion of memory to store thread state for the thread. When a thread is waiting for an event, rather than performing a series of get-and-compare sequences, the thread updates a wake-and-go array with a target address associated with the event. The thread then goes to sleep until the event occurs. When a thread ends execution and is no longer in the run queue of the processor, the wake-and-go mechanism de-allocates the space for the thread state information for that thread.
    • 为数据处理系统提供了一个唤醒机制。 当线程首次开始执行时,唤醒机制会自动为硬件专用阵列中的线程状态分配空间,并为唤醒进程阵列中的目标地址和其他信息(如果有)分配空间。 如果硬件私有阵列包括系统存储器的保留部分,则唤醒机制可以请求足够的部分存储器来存储线程的线程状态。 当一个线程正在等待一个事件,而不是执行一系列获取和比较序列,线程将更新一个唤醒数组与一个与事件关联的目标地址。 线程然后进入休眠状态直到事件发生。 当线程结束执行并且不再处于处理器的运行队列中时,唤醒机制会为该线程的线程状态信息解除分配空间。