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    • 32. 发明授权
    • Static and dynamic video resizing
    • 静态和动态视频调整大小
    • US06535220B2
    • 2003-03-18
    • US09758535
    • 2001-01-10
    • Michael F. DeeringNathanial D. NaegleMike Lavelle
    • Michael F. DeeringNathanial D. NaegleMike Lavelle
    • G06T1140
    • G06T11/001G06T3/40G06T15/04G06T15/503
    • A graphics system comprises a texture memory, a rendering engine, a sample buffer and a filtering engine. The rendering engine renders received primitives based on a render pixel array whose vertical and horizontal resolutions are dynamically programmable. The rendering engine determines render pixels that geometrically intersect a primitive. For each intersecting render pixel, a texture access may be required (if texture processing is turned on) to determine texture values. The texture values may be used to compute sample values at sample positions interior to the sample render pixel and the primitive. A controlling agent may decrease the vertical and horizontal resolutions of the render pixel array to control frame render time. The filtering engine may programmably generate virtual pixel centers covering the render pixel array. Any change in the render pixel resolutions may require an accommodating change in the virtual pixel array parameters.
    • 图形系统包括纹理存储器,呈现引擎,样本缓冲器和过滤引擎。 渲染引擎基于渲染像素阵列渲染接收到的基元,其垂直和水平分辨率是可动态编程的。 渲染引擎确定与原始几何相交的渲染像素。 对于每个相交渲染像素,可能需要纹理访问(如果打开纹理处理)以确定纹理值。 纹理值可用于计算样本渲染像素和原始图像内样本位置的样本值。 控制剂可以降低渲染像素阵列的垂直和水平分辨率以控制帧渲染时间。 滤波引擎可编程地生成覆盖渲染像素阵列的虚拟像素中心。 渲染像素分辨率的任何改变可能需要在虚拟像素阵列参数中适应变化。
    • 33. 发明授权
    • Geometry compression for regular and irregular mesh structures
    • 规则和不规则网格结构的几何压缩
    • US06525722B1
    • 2003-02-25
    • US09332322
    • 1999-06-14
    • Michael F. Deering
    • Michael F. Deering
    • G06T1700
    • G06T9/001
    • A method for compressing 3D geometry data that is capable of compressing both regularly tiled and irregularly tiled surfaces is disclosed. In one embodiment, the method comprises examining 3D geometry data to detect the presence of regularly tiled surface portions. The 3D geometry data is then compressed by: (1) encoding any regularly tiled surface portion using a first encoding method, and (2) encoding any irregularly tiled surface portions using a second encoding method, wherein the second encoding method is different from the first encoding method. The first encoding method may encode the regularly tiled surface portions as vertex rasters, while the second method may encode the irregularly tiled surface portions by geometry compression using a generalized triangle mesh.
    • 公开了一种用于压缩能够压缩规则的平铺和不规则的平铺表面的3D几何数据的方法。 在一个实施例中,该方法包括检查3D几何数据以检测规则的平铺表面部分的存在。 然后通过以下步骤压缩3D几何数据:(1)使用第一编码方法对任何规则的平铺表面部分进行编码,以及(2)使用第二编码方法对任何不规则的平铺表面部分进行编码,其中第二编码方法与第一编码方法不同 编码方式。 第一编码方法可以将规则的平铺表面部分编码为顶点栅格,而第二种方法可以使用广义三角形网格通过几何压缩来编码不规则的平铺表面部分。
    • 34. 发明授权
    • Graphics system having a super-sampled sample buffer with generation of output pixels using selective adjustment of filtering for implementation of display effects
    • 图形系统具有使用选择性调整滤波以产生显示效果的具有产生输出像素的超采样采样缓冲器
    • US06489956B1
    • 2002-12-03
    • US09413040
    • 1999-10-06
    • Michael F. Deering
    • Michael F. Deering
    • G06T1500
    • G06T5/20G06T11/001G06T11/40G06T15/005G06T15/503
    • A computer graphics system that utilizes a super-sampled sample buffer and a programmable sample-to-pixel calculation unit for refreshing the display, wherein the graphics system may adjust filtering to reduce artifacts or implement display effects. In one embodiment, the graphics system may have a graphics processor, a super-sampled sample buffer, and a sample-to-pixel calculation unit. The graphics processor renders a plurality of samples and stores them into a sample buffer. The sample-to-pixel calculation unit reads the samples from the super-sampled sample buffer and filters or convolves the samples into respective output pixels which are then provided to refresh the display. The sample-to-pixel calculation unit may selectively adjust the filtering of stored samples to reduce artifacts, e.g., is operable to selectively adjust the filtering of stored samples in neighboring frames to reduce artifacts between the neighboring frames. The filter adjustment may be applied where the sample-to-pixel calculation unit generates output pixels at the same rate as the graphics processor rendering samples to the sample buffer, or at a different (e.g., higher) rate than the render rate. The sample-to-pixel calculation unit is operable to adjust filtering of stored samples to implement a display effect, such as panning, zooming, rotation, or moving scenes, among others. The sample-to-pixel calculation unit may also selectively adjust the filtering of stored samples on a fractional-pixel boundary.
    • 一种利用超采样样本缓冲器和可编程样本到像素计算单元来刷新显示器的计算机图形系统,其中图形系统可以调整滤波以减少伪影或实现显示效果。 在一个实施例中,图形系统可以具有图形处理器,超采样采样缓冲器和采样到像素计算单元。 图形处理器呈现多个样本并将其存储到样本缓冲器中。 样本到像素计算单元从超采样采样缓冲器中读取样本,并将样本滤波或卷积到随后提供的各个输出像素中以刷新显示。 样本到像素计算单元可以选择性地调整存储的样本的滤波以减少伪影,例如,可操作以选择性地调整相邻帧中存储的样本的过滤,以减少相邻帧之间的伪影。 滤波器调整可以应用于采样到像素计算单元以与图形处理器将样本渲染到采样缓冲器或以与渲染速率不同(例如更高)的速率相同的速率生成输出像素的情况下应用。 样本到像素计算单元可操作以调整存储的样本的滤波以实现诸如平移,缩放,旋转或移动场景之类的显示效果等。 样本到像素计算单元还可以选择性地调整在分数像素边界上存储的样本的滤波。
    • 35. 发明授权
    • Rapid computation of local eye vectors in a fixed point lighting unit
    • US6141013A
    • 2000-10-31
    • US439034
    • 1999-11-12
    • Scott R. NelsonMichael F. Deering
    • Scott R. NelsonMichael F. Deering
    • G06T15/00G06T15/50G06F15/00
    • G06T15/506G06T15/005G06T15/50
    • A rapid method for calculating a local eye vector in a fixed point lighting unit. For a given triangle primitive which is to be projected into a given viewport in screen space coordinates, the local eye vector corresponds to a given eye position and a first vertex of the given triangle primitive. (A different local eye vector is calculated for each vertex of the given triangle primitive). The method first comprises generating a view vector matrix which corresponds to the given eye position and corner coordinates of the given viewport, where the corner coordinates are expressed in screen space coordinates. The view vector matrix is usable to map screen space coordinates to an eye vector space which corresponds to the given viewport. The method next includes receiving a first set of coordinates (in screen space) which correspond to the first vertex. The first set of coordinates are then scaled to a numeric range which is representable by the fixed point lighting unit. Next, the first set of coordinates are transformed using the view vector matrix, which produces a non-normalized local eye vector within the eye vector space for the given viewport. The non-normalized local eye vector is normalized to form a normalized local eye vector. The normalized local eye vector is then usable to perform subsequent lighting computations such as computation of specular reflection values for infinite light sources, producing more realistic lighting effects than if an infinite eye vector were used. These more realistic lighting effects do not come at decreased performance, however, as the local eye vector may be calculated rapidly using this method.
    • 36. 发明授权
    • Method and apparatus implementing high resolution rendition of
Z-buffered primitives
    • 实现Z缓冲原语的高分辨率再现的方法和装置
    • US6046746A
    • 2000-04-04
    • US673117
    • 1996-07-01
    • Michael F. Deering
    • Michael F. Deering
    • G06T15/40G06F17/10
    • G06T15/405
    • An object's Z-buffered primitives are determined using a floating point Z=wF/W, where wF is the value the W coordinate achieves at the front clipping plane F. This representation produces Z-values ranging from 1 to .apprxeq.0 as W varies from W=wF to W.fwdarw..infin.. Z-values for distances near the back clipping plane advantageously have leading zeros and are more amenable to floating point representation and exhibit less information loss. Primitive vertices are examined and the largest vertex floating point exponent is stored and associated with the entire primitive as that triangle's floating point Z exponent. The stored exponent is subtracted from all the vertices' exponents and the results converted to fixed point, which format advantageously typically has few or no leading zeroes. After normal fixed point set-up and scan conversion operations occur, each pixel's final Z fixed-point value is converted back to floating point, and the relevant stored exponent for the polygon is added back in before distance comparisons are made.
    • 使用浮点Z = wF / W确定对象的Z缓冲原语,其中wF是W坐标在前剪裁平面F处获得的值。该表示产生范围从1到大约为0的Z值,因为W从 W = wF到W-> INFINITY。 靠近后裁剪平面的距离的Z值有利地具有前导零,并且更易于浮点表示并且表现出较少的信息损失。 检查原始顶点,并将最大顶点浮点指数存储并与整个基元相关联,作为该三角形的浮点Z指数。 从所有顶点的指数中减去存储的指数,并将结果转换为固定点,该格式有利地通常具有很少或不具有前导零。 在发生正常的固定点设置和扫描转换操作之后,将每个像素的最终Z定点值转换回浮点,并且在进行距离比较之前将多边形的相关存储指数加回。
    • 37. 发明授权
    • Mesh buffer for decompression of compressed three-dimensional graphics
data
    • 用于压缩三维图形数据解压缩的网格缓冲区
    • US5933153A
    • 1999-08-03
    • US25156
    • 1998-02-18
    • Michael F. DeeringAaron S. Wynn
    • Michael F. DeeringAaron S. Wynn
    • H04N7/26G06T9/00G06T15/00G06T17/20G06F15/00
    • G06T15/00G06T17/20G06T9/001
    • Three-dimensional compressed geometry is decompressed with a unit having an input FIFO receiving compressed data bits and outputting to an input block state machine and an input block, whose outputs are coupled to a barrel shifter unit. Input block output also is input to Huffman tables that output to the state machine. The state machine output also is coupled to a data path controller whose output is coupled to a tag decoder, and to a normal processor receiving output from the barrel shifter unit. The decompressor unit also includes a position/color processor that receives output from the barrel shifter unit. Outputs from the normal processor and position/color processor are multiplexed to a format converter. For instructions in the data stream that generate output to the format converter, the decompression unit generates a tag sent to the tag decoder in parallel with bits for normals that are sent to the format converter. The decompressed stream of triangle data may then be passed to a traditional rendering pipeline, where it can be processed in full floating point accuracy, and thereafter displayed or otherwise used.
    • 用具有输入FIFO接收压缩数据位的单元对三维压缩几何进行解压缩并输出到输入块状态机和输出块,其输出耦合到桶形移位器单元。 输入块输出也被输入到输出到状态机的霍夫曼表。 状态机输出还耦合到其输出耦合到标签解码器的数据路径控制器,以及接收来自桶形移位器单元的输出的正常处理器。 解压缩器单元还包括接收来自桶形移位器单元的输出的位置/颜色处理器。 来自正常处理器和位置/颜色处理器的输出被复用到格式转换器。 为了产生输出到格式转换器的数据流中的指令,解压缩单元产生与发送到格式转换器的法线的位并行发送到标签解码器的标签。 然后,解压缩的三角形数据流可以被传递到传统的渲染管线,其中可以以完全浮点精度处理,然后显示或以其他方式使用。
    • 38. 发明授权
    • Three-dimensional graphics accelerator which implements multiple logical
buses using common data lines for improved bus communication
    • 三维图形加速器,其使用公共数据线实现多个逻辑总线,以改善总线通信
    • US5874969A
    • 1999-02-23
    • US673491
    • 1996-07-01
    • Sean F. StormMichael F. Deering
    • Sean F. StormMichael F. Deering
    • G06T15/00G06T1/20G06F15/80
    • G06T1/20
    • A 3-D graphics accelerator which includes a command block or preprocessor, a plurality of floating point processors or blocks, and one or more draw processors or blocks. The 3-D graphics accelerator includes a plurality of direct data channels or point-to-point buses, collectively referred to as the CF bus, which connect the command preprocessor to each of the plurality of floating point processors. The 3-D graphics accelerator also includes a plurality of direct data channels or point-to-point buses, collectively referred to as the FD bus, which connect the plurality of floating point processors to each of the draw processors. The system of the present invention also implements a bus from the command preprocessor directly to the draw processors, referred to as the CD bus, which uses portions of the above direct data channels. The CD bus shares or "borrows" the data lines from the CF bus a id the FD bus and uses the floating point processors as buffer chips. This allows implementation of a "logical" bus while using existing bus lines.
    • 包括命令块或预处理器,多个浮点处理器或块以及一个或多个绘图处理器或块的3-D图形加速器。 3-D图形加速器包括多个直接数据通道或统称为CF总线的点到点总线,其将命令预处理器连接到多个浮点处理器中的每一个。 3-D图形加速器还包括多个直接数据通道或统称为FD总线的点到点总线,其将多个浮点处理器连接到每个绘图处理器。 本发明的系统还实现从命令预处理器直接到使用上述直接数据信道的部分的称为CD总线的绘制处理器的总线。 CD总线将CF总线的数据线“借”到FD总线,并使用浮点处理器作为缓冲芯片。 这允许在使用现有总线的同时实现“逻辑”总线。