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31. 发明申请

US20120139529A1 READOUT APPARATUS FOR CURRENT TYPE TOUCH PANEL 审中-公开
标题翻译：电流型触控面板的读出装置
公开(公告)号：US20120139529A1
公开(公告)日：2012-06-07
申请号：US13370219
申请日：2012-02-09
申请人： Kai-Lan Chuang , Guo-Ming Lee , Ying-Lieh Chen
发明人： Kai-Lan Chuang , Guo-Ming Lee , Ying-Lieh Chen
IPC分类号： G01R11/04
CPC分类号： G06F3/0416
摘要： A readout apparatus for a current type touch panel is provided. The readout apparatus includes a current-to-voltage converter, a voltage gain unit and an analog-to-digital converter (ADC). The current-to-voltage converter converts a sensing current of the current type touch panel to a sensing voltage. The current-to-voltage converter includes a resistor and a current mirror. The resistor has a first end and a second end. The current mirror has a master current end and a slave current end. An input end of the voltage gain unit is coupled to an output end of the current-to-voltage converter for receiving the sensing voltage. An input end of the ADC is coupled to an output end of the voltage gain unit. An output end of the ADC generates a digital code.
摘要翻译：本发明提供一种用于电流型触摸面板的读出装置。读出装置包括电流 - 电压转换器，电压增益单元和模 - 数转换器（ADC）。电流 - 电压转换器将当前类型的触摸面板的感测电流转换为感测电压。电流 - 电压转换器包括电阻和电流镜。电阻器具有第一端和第二端。电流镜具有主电流端和从电流端。电压增益单元的输入端耦合到电流 - 电压转换器的输出端，用于接收感测电压。 ADC的输入端耦合到电压增益单元的输出端。 ADC的输出端产生数字代码。

32. 发明申请

US20110007066A1 DATA TRANSMITTING METHOD FOR TRANSMITTING DATA BETWEEN TIMING CONTROLLER AND SOURCE DRIVER OF DISPLAY AND DISPLAY USING THE SAME 审中-公开
标题翻译：用于发送定时控制器和显示器的源驱动器之间的数据的数据传输方法
公开(公告)号：US20110007066A1
公开(公告)日：2011-01-13
申请号：US12501211
申请日：2009-07-10
申请人： Chin-Tien Chang , Ying-Lieh Chen
发明人： Chin-Tien Chang , Ying-Lieh Chen
IPC分类号： G09G5/00
CPC分类号： G09G3/3611 , G09G2310/08 , G09G2370/08
摘要： A data transmission method for transmitting data between a timing controller and a source driver of a display and a display using the same are disclosed. The transmission method includes recognizing a start of a blank period of a frame period; sampling de-skew data on a data bus during the blank period based on a data clock; performing a de-skew function by comparing the sampled de-skew data with a predetermined de-skew code and adjusting the data clock; recognizing a start of a data input period of the frame period; and sampling pixel data on the data bus during the data input period based on the adjusted data clock. The display includes a timing controller, a data bus, and a source driver. The source driver is connected to the timing controller via the data bus for performing the data transmission method.
摘要翻译：公开了一种用于在定时控制器和显示器的源驱动器和使用其的显示器之间传送数据的数据传输方法。发送方法包括：识别帧周期的空白期间的开始; 基于数据时钟在空白时段期间在数据总线上采样去偏移数据; 通过将采样的去偏移数据与预定的去偏移码进行比较并调整数据时钟来执行去偏移功能; 识别帧周期的数据输入周期的开始; 并且在数据输入周期期间，基于经调整的数据时钟在数据总线上采样像素数据。显示器包括定时控制器，数据总线和源驱动器。源驱动器经由用于执行数据传输方法的数据总线连接到定时控制器。

33. 发明授权

US07764259B2 Wire-on-array liquid crystal display 有权
标题翻译：线阵列液晶显示器
公开(公告)号：US07764259B2
公开(公告)日：2010-07-27
申请号：US11267289
申请日：2005-11-07
申请人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： G09G3/36
CPC分类号： G09G3/2096 , G09G2310/0275 , G09G2320/0223
摘要： A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.
摘要翻译：提供线阵列（WOA）平板显示器。线对阵（WOA）平板显示器的特征在于柔性印刷电路板（FPC）板和对应的源极驱动电路之间的多个高输入阻抗分量。每个高输入阻抗分量能够接收具有很小输入电流的伽马电压，然后将伽马电压传输到每个源极驱动电路，用于产生具有小带效应的源电压。

34. 发明授权

US07609254B2 Signal driving system for a display 有权
标题翻译：用于显示器的信号驱动系统
公开(公告)号：US07609254B2
公开(公告)日：2009-10-27
申请号：US11055861
申请日：2005-02-11
申请人： Lin-Kai Bu , Ying-Lieh Chen , Tsung-Yu Wu , Hsin-Ta Lee , Bou Herng Hwe , Kun Hsiang Lo , Tzong Yau Ku
发明人： Lin-Kai Bu , Ying-Lieh Chen , Tsung-Yu Wu , Hsin-Ta Lee , Bou Herng Hwe , Kun Hsiang Lo , Tzong Yau Ku
IPC分类号： G09G5/00
CPC分类号： G09G3/3685 , G09G2330/06
摘要： The invention relates to a signal driving system for a display. The signal driving system comprises: a signal controller, a flexible connector and a plurality of driving devices. The signal controller is used to produce a first control signal. The flexible connector is connected to the signal controller, and used to receive the first control signal. One of the driving devices is connected to the flexible connector. The driving devices connect in cascade. Each driving device comprises a data input port, a data output port and a driving signal output port. The data input port receives the first control signal or a second control signal. The data output port outputs the second control signal. According to the first control signal or the second control signal, the driving signal output port transmits a driving signal. The signal driving system of the invention can make the data output port of the driving device transmit the second control signal to the next driving device. Therefore, the signal driving system of the invention can resolve the problem between different control signals of different circuit interfaces. Besides, the signal driving system of the invention has the advantage of processing the first control signal in the signal controller and transmitting the second control signal between the driving devices.
摘要翻译：本发明涉及一种用于显示器的信号驱动系统。信号驱动系统包括：信号控制器，柔性连接器和多个驱动装置。信号控制器用于产生第一控制信号。柔性连接器连接到信号控制器，用于接收第一控制信号。其中一个驱动装置连接到柔性连接器。驱动装置级联连接。每个驱动装置包括数据输入端口，数据输出端口和驱动信号输出端口。数据输入端口接收第一控制信号或第二控制信号。数据输出端口输出第二个控制信号。根据第一控制信号或第二控制信号，驱动信号输出端口发送驱动信号。本发明的信号驱动系统可以使驱动装置的数据输出端口将第二控制信号发送到下一个驱动装置。因此，本发明的信号驱动系统可以解决不同电路接口的不同控制信号之间的问题。此外，本发明的信号驱动系统具有处理信号控制器中的第一控制信号并在驱动装置之间传输第二控制信号的优点。

35. 发明申请

US20090251174A1 OUTPUT BUFFER OF A SOURCE DRIVER APPLIED IN A DISPLAY 有权
标题翻译：显示器中使用的源驱动器的输出缓冲器
公开(公告)号：US20090251174A1
公开(公告)日：2009-10-08
申请号：US12061255
申请日：2008-04-02
申请人： Ying-Lieh Chen , Chin-Tien Chang , Hsu-Yu Hsiao
发明人： Ying-Lieh Chen , Chin-Tien Chang , Hsu-Yu Hsiao
IPC分类号： H03K3/00
CPC分类号： G09G3/3688 , G09G2310/0291 , G09G2330/021
摘要： An output buffer and a controlling method are disclosed. The output buffer comprises an upper buffer and a lower buffer. In the controlling method, at first, a first voltage (V1) and a second voltage (V2) are applied on the upper buffer, and a third voltage (V3) and a fourth voltage (V4) are applied on the lower buffer, wherein V1>V2, V1>V4, V3>V2, and V3>V4. Then, the upper buffer is operated to output data to a plurality of pixels thereby operating the liquid crystals of the pixels over an upper supply range, wherein the upper supply range is from V1 to V2. Thereafter, the lower buffer is operated to output data to the pixels thereby operating the liquid crystals of the pixels over a lower supply range, wherein the lower supply range is from V3 to V4.
摘要翻译：公开了一种输出缓冲器和控制方法。输出缓冲器包括上缓冲器和下缓冲器。在控制方法中，首先，在上缓冲器上施加第一电压（V1）和第二电压（V2），在下缓冲器上施加第三电压（V3）和第四电压（V4），其中 V1> V2，V1> V4，V3> V2，V3> V4。然后，操作上缓冲器以将数据输出到多个像素，从而在上电源范围上操作像素的液晶，其中上电源范围为V1至V2。此后，操作下缓冲器以向像素输出数据，从而在较低的供给范围上操作像素的液晶，其中较低的供给范围为V3至V4。

36. 发明申请

US20090051844A1 Defect repairing method of liquid crystal display and signal transmission method of source driver and timing controller thereof 审中-公开
标题翻译：液晶显示器的缺陷修复方法及其源极驱动器及其时序控制器的信号传输方法
公开(公告)号：US20090051844A1
公开(公告)日：2009-02-26
申请号：US12000397
申请日：2007-12-12
申请人： Chien-Chun Chen , Ying-Lieh Chen , Lin-Kai Bu
发明人： Chien-Chun Chen , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： G02F1/1333
CPC分类号： G09G3/36 , G09G3/006 , G09G3/3611 , G09G2330/08
摘要： A liquid crystal display (LCD) includes a controller, a source driver, first and second data lines and a data transmission path. The controller outputs first and second image data, and the source driver receives and outputs the first and second image data. The source driver includes first and second data channel circuits and a first repair channel circuit. The first and second data channel circuits respectively output first and second sub-pixel data. The first repair channel circuit is coupled to the controller to receive first repairing data. The first and second data lines are respectively coupled to the first and second data channel circuits to receive the first and second sub-pixel data. The data transmission path includes a redundant line, which is for coupling the first repair channel circuit to one of the first and second data lines, and interlaces with the first and second data lines.
摘要翻译：液晶显示器（LCD）包括控制器，源驱动器，第一和第二数据线以及数据传输路径。控制器输出第一和第二图像数据，并且源驱动器接收并输出第一和第二图像数据。源驱动器包括第一和第二数据信道电路和第一修复信道电路。第一和第二数据通道电路分别输出第一和第二子像素数据。第一修复信道电路耦合到控制器以接收第一修复数据。第一和第二数据线分别耦合到第一和第二数据通道电路以接收第一和第二子像素数据。数据传输路径包括冗余线，其用于将第一修复信道电路耦合到第一和第二数据线之一，以及与第一和第二数据线交织。

37. 发明授权

US07327299B2 Digital-to-Analog Converter for a source driver of a liquid crystal display 有权
标题翻译：用于液晶显示器的源驱动器的数模转换器
公开(公告)号：US07327299B2
公开(公告)日：2008-02-05
申请号：US11467174
申请日：2006-08-25
申请人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： H03M1/66
CPC分类号： H03M1/68 , H03M1/76
摘要： A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.
摘要翻译： DAC具有N位R串DAC部分和（M-N）位插值DAC部分。 N位R串DAC部分具有多个电阻和2位N选择器。电阻器串联电连接以提供多个电压电平。 2位N选择器耦合到串联电阻器，并且被布置为根据N位MSB子字选择两个相邻的电压电平。（M-N）位插值DAC部分耦合到N位R串DAC部分，并且被配置为根据（M-N）位LSB子字来插入来自两个相邻电压电平的模拟输出信号。

38. 发明申请

US20070103422A1 Wire-on-array liquid crystal display 有权
标题翻译：线阵列液晶显示器
公开(公告)号：US20070103422A1
公开(公告)日：2007-05-10
申请号：US11267289
申请日：2005-11-07
申请人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： G09G3/36
CPC分类号： G09G3/2096 , G09G2310/0275 , G09G2320/0223
摘要： A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.
摘要翻译：提供线阵列（WOA）平板显示器。线对阵（WOA）平板显示器的特征在于柔性印刷电路板（FPC）板和对应的源极驱动电路之间的多个高输入阻抗分量。每个高输入阻抗分量能够接收具有很小输入电流的伽马电压，然后将伽马电压传输到每个源极驱动电路，用于产生具有小带效应的源电压。

39. 发明申请

US20070001885A1 Digital-to-Analog Converter 有权
标题翻译：数模转换器
公开(公告)号：US20070001885A1
公开(公告)日：2007-01-04
申请号：US11467174
申请日：2006-08-25
申请人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： H03M1/66
CPC分类号： H03M1/68 , H03M1/76
摘要： A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.
摘要翻译： DAC具有N位R串DAC部分和（M-N）位插值DAC部分。 N位R串DAC部分具有多个电阻和2位N选择器。电阻器串联电连接以提供多个电压电平。 2位N选择器耦合到串联电阻器，并且被布置为根据N位MSB子字选择两个相邻的电压电平。（M-N）位插值DAC部分耦合到N位R串DAC部分，并且被配置为根据（M-N）位LSB子字来插入来自两个相邻电压电平的模拟输出信号。

40. 发明申请

US20060273850A1 Operational amplifier circuit with controllable intermediate circuitry set therein 有权
标题翻译：在其中设置可控中间电路的运算放大器电路
公开(公告)号：US20060273850A1
公开(公告)日：2006-12-07
申请号：US11160041
申请日：2005-06-07
申请人： Yu-Jui Chang , Ying-Lieh Chen
发明人： Yu-Jui Chang , Ying-Lieh Chen
IPC分类号： H03F1/14
CPC分类号： H03F1/56
摘要： An operational amplifier circuit includes an operational amplifier, an intermediate circuitry, and a control circuitry. The intermediate circuitry is coupled to a load. The operational amplifier is coupled to the intermediate circuitry and drives the load through the intermediate circuitry according to an input signal. The control circuitry is coupled to the intermediate circuitry and controls the intermediate circuitry to adjust an equivalent loading induced by the intermediate circuitry.
摘要翻译：运算放大器电路包括运算放大器，中间电路和控制电路。中间电路耦合到负载。运算放大器耦合到中间电路，并根据输入信号通过中间电路驱动负载。控制电路耦合到中间电路并且控制中间电路以调整由中间电路引起的等效负载。

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