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1. 发明授权

US07969217B2 Output buffer with slew-rate enhancement output stage 有权
标题翻译：具有转换率增强输出级的输出缓冲器
公开(公告)号：US07969217B2
公开(公告)日：2011-06-28
申请号：US12577857
申请日：2009-10-13
申请人： Hung-Yu Huang , Chin-Tien Chang
发明人： Hung-Yu Huang , Chin-Tien Chang
IPC分类号： H03K5/12
CPC分类号： H03K19/00361
摘要： An embodiment of a slew-rate enhancement output stage is disclosed. A first slew-rate enhancement circuit receives a first control voltage and outputs a first voltage. A second slew-rate enhancement circuit receives a second control voltage and outputs a second voltage. A first PMOS transistor includes a first first terminal coupled to a high voltage source, a first control terminal receiving the first voltage, and a first second terminal coupled to a voltage output terminal. A first NMOS transistor includes a second first terminal coupled to the voltage output terminal, a second control terminal for receiving the second voltage, and a second second terminal coupled to a low voltage source. The first voltage is higher than the first control voltage, and the second voltage is lower than the second control voltage.
摘要翻译：公开了压摆率增强输出级的实施例。第一压摆率增强电路接收第一控制电压并输出第一电压。第二转换速率增强电路接收第二控制电压并输出第二电压。第一PMOS晶体管包括耦合到高电压源的第一第一端子，接收第一电压的第一控制端子和耦合到电压输出端子的第一第二端子。第一NMOS晶体管包括耦合到电压输出端的第二第一端子，用于接收第二电压的第二控制端子和耦合到低电压源的第二第二端子。第一电压高于第一控制电压，第二电压低于第二控制电压。

2. 发明授权

US07903059B2 Lighting emitting display, pixel circuit and driving method thereof 有权
标题翻译：照明发光显示器，像素电路及其驱动方法
公开(公告)号：US07903059B2
公开(公告)日：2011-03-08
申请号：US11717104
申请日：2007-03-13
申请人： Yu-Wen Chiou , Chin-Tien Chang , Hong-Ru Guo
发明人： Yu-Wen Chiou , Chin-Tien Chang , Hong-Ru Guo
IPC分类号： G09G3/32
CPC分类号： G09G3/325 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/043
摘要： A lighting emitting display, a pixel circuit and a driving method thereof. The pixel circuit includes a driving transistor, a capacitor and a LED. The capacitor receives a first supply voltage and is coupled to a gate of the driving transistor. A cathode of the LED receives a second supply voltage. During a pre-charge period, the gate and the drain of the driving transistor are coupled to an anode of the LED, the source of the driving transistor is coupled to a charging voltage. The source of the driving transistor receives a data signal and the drain and gate of the driving transistor are coupled to each other during a programming period. The source of the driving transistor is coupled to receive the first supply voltage and the drain of the driving transistor is coupled to the anode of the LED during a display period.
摘要翻译：发光显示器，像素电路及其驱动方法。像素电路包括驱动晶体管，电容器和LED。电容器接收第一电源电压并且耦合到驱动晶体管的栅极。 LED的阴极接收第二电源电压。在预充电期间，驱动晶体管的栅极和漏极耦合到LED的阳极，驱动晶体管的源极耦合到充电电压。驱动晶体管的源极接收数据信号，并且驱动晶体管的漏极和栅极在编程周期期间彼此耦合。驱动晶体管的源极耦合以接收第一电源电压，并且驱动晶体管的漏极在显示周期期间耦合到LED的阳极。

3. 发明申请

US20110007066A1 DATA TRANSMITTING METHOD FOR TRANSMITTING DATA BETWEEN TIMING CONTROLLER AND SOURCE DRIVER OF DISPLAY AND DISPLAY USING THE SAME 审中-公开
标题翻译：用于发送定时控制器和显示器的源驱动器之间的数据的数据传输方法
公开(公告)号：US20110007066A1
公开(公告)日：2011-01-13
申请号：US12501211
申请日：2009-07-10
申请人： Chin-Tien Chang , Ying-Lieh Chen
发明人： Chin-Tien Chang , Ying-Lieh Chen
IPC分类号： G09G5/00
CPC分类号： G09G3/3611 , G09G2310/08 , G09G2370/08
摘要： A data transmission method for transmitting data between a timing controller and a source driver of a display and a display using the same are disclosed. The transmission method includes recognizing a start of a blank period of a frame period; sampling de-skew data on a data bus during the blank period based on a data clock; performing a de-skew function by comparing the sampled de-skew data with a predetermined de-skew code and adjusting the data clock; recognizing a start of a data input period of the frame period; and sampling pixel data on the data bus during the data input period based on the adjusted data clock. The display includes a timing controller, a data bus, and a source driver. The source driver is connected to the timing controller via the data bus for performing the data transmission method.
摘要翻译：公开了一种用于在定时控制器和显示器的源驱动器和使用其的显示器之间传送数据的数据传输方法。发送方法包括：识别帧周期的空白期间的开始; 基于数据时钟在空白时段期间在数据总线上采样去偏移数据; 通过将采样的去偏移数据与预定的去偏移码进行比较并调整数据时钟来执行去偏移功能; 识别帧周期的数据输入周期的开始; 并且在数据输入周期期间，基于经调整的数据时钟在数据总线上采样像素数据。显示器包括定时控制器，数据总线和源驱动器。源驱动器经由用于执行数据传输方法的数据总线连接到定时控制器。

4. 发明申请

US20100321370A1 Display system and source driver thereof 审中-公开
标题翻译：显示系统及其源驱动程序
公开(公告)号：US20100321370A1
公开(公告)日：2010-12-23
申请号：US12457740
申请日：2009-06-19
申请人： Meng-Tse Weng , Chuan-Che Lee , Chin-Tien Chang
发明人： Meng-Tse Weng , Chuan-Che Lee , Chin-Tien Chang
IPC分类号： G06F3/038 , G09G3/36
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2300/0443 , G09G2310/027 , G09G2320/0276 , G09G2320/028
摘要： A source driver includes a gamma voltage generator, in which the gamma voltage generator includes a first gamma resistor string and a second gamma resistor string. The first gamma resistor string receives a first gamma reference voltage and generates a plurality of first gamma voltages. The second gamma resistor string receives a second gamma reference voltage and generates a plurality of second gamma voltages, in which the second gamma voltages have different voltage values from the first gamma voltages. The switch circuit selects the first gamma voltages or the second gamma voltages as output gamma voltages according to a timing control signal. The digital to analog converter selects one of the output gamma voltages as a driving voltage corresponding to a received digital pixel data for driving a first pixel region or a second pixel region of the sub-pixel.
摘要翻译：源极驱动器包括伽马电压发生器，其中伽马电压发生器包括第一伽马电阻串和第二伽马电阻串。第一伽马电阻串接收第一伽马参考电压并产生多个第一伽玛电压。第二伽马电阻串接收第二伽马参考电压并产生多个第二伽马电压，其中第二伽马电压具有与第一伽马电压不同的电压值。开关电路根据定时控制信号选择第一伽马电压或第二伽马电压作为输出伽马电压。数模转换器选择输出伽马电压之一作为对应于用于驱动子像素的第一像素区域或第二像素区域的接收数字像素数据的驱动电压。

5. 发明申请

US20100321361A1 Source driver 审中-公开
标题翻译：源驱动程序
公开(公告)号：US20100321361A1
公开(公告)日：2010-12-23
申请号：US12457741
申请日：2009-06-19
申请人： Meng-Tse Weng , Chuan-Che Lee , Chin-Tien Chang , Chien-Ru Chen
发明人： Meng-Tse Weng , Chuan-Che Lee , Chin-Tien Chang , Chien-Ru Chen
IPC分类号： G09G5/00
CPC分类号： G09G3/3607 , G09G3/3688
摘要： A source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a gamma resistor string, a second resistor, a plurality of first switches and a second switch. The first resistors are electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage, in which the first resistors have first ends and second ends for providing gamma voltages. The second resistor has a first end electrically connected to the gamma resistor string and a second end receiving a third gamma reference voltage. The first switches are uniformly conducted to the first ends or the second ends of the first resistors according to a timing control signal for passing the gamma voltages.
摘要翻译：源驱动器包括伽马电压发生器和数模转换器。伽马电压发生器产生多个伽马电压，其中伽马电压发生器包括伽马电阻串，第二电阻，多个第一开关和第二开关。第一电阻器串联电连接以分割第一伽马参考电压和第二伽马参考电压，其中第一电阻器具有用于提供伽马电压的第一端和第二端。第二电阻器具有电连接到伽马电阻器串的第一端和接收第三伽马参考电压的第二端。根据用于通过伽马电压的定时控制信号，第一开关被均匀地传导到第一电阻器的第一端或第二端。

6. 发明申请

US20100182307A1 OUTPUT BUFFERING CIRCUIT, AMPLIFIER DEVICE, AND DISPLAY DEVICE WITH REDUCED POWER CONSUMPTION 有权
标题翻译：具有降低功耗的输出缓冲电路，放大器装置和显示装置
公开(公告)号：US20100182307A1
公开(公告)日：2010-07-22
申请号：US12357020
申请日：2009-01-21
申请人： Chin-Tien Chang , Ching-Chung Lee
发明人： Chin-Tien Chang , Ching-Chung Lee
IPC分类号： G09G5/00
CPC分类号： G09G3/3688 , G09G2310/0291 , G09G2330/021
摘要： An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.
摘要翻译：用于显示器的驱动器装置的输出缓冲电路包括：第一放大器电路，具有耦合在上电源和下电源之间的第一输入级和耦合在上电源和第一中间电路之间的第一输出级电源大于较低电源，以及第二放大器电路，其具有耦合在上电源和下电源之间的第二输入级，以及耦合在低于第二中间电源的第二中间电源之间的第二输出级上电源和较低电源。

7. 发明申请

US20100045319A1 WAFER AND TEST METHOD THEREOF 有权
标题翻译：其方法及其测试方法
公开(公告)号：US20100045319A1
公开(公告)日：2010-02-25
申请号：US12609365
申请日：2009-10-30
申请人： Tzong-Yau Ku , Chien-Ru Chen , Chin-Tien Chang , Ying-Lieh Chen , Lin-Kai Bu
发明人： Tzong-Yau Ku , Chien-Ru Chen , Chin-Tien Chang , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： G01R1/06 , G01R31/02 , G01R31/26
CPC分类号： G01R31/2851 , G01R31/2831 , G01R31/2884
摘要： A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
摘要翻译：提供晶片及其测试方法。本发明利用第一组探针在第一芯片上执行高电压应力（HVS）测试，并且利用第二组探针在第二芯片上进行功能测试，其中高压应力测试的周期重叠功能测试的一段时间，从而大大降低了晶片的测试时间。

8. 发明申请

US20090251174A1 OUTPUT BUFFER OF A SOURCE DRIVER APPLIED IN A DISPLAY 有权
标题翻译：显示器中使用的源驱动器的输出缓冲器
公开(公告)号：US20090251174A1
公开(公告)日：2009-10-08
申请号：US12061255
申请日：2008-04-02
申请人： Ying-Lieh Chen , Chin-Tien Chang , Hsu-Yu Hsiao
发明人： Ying-Lieh Chen , Chin-Tien Chang , Hsu-Yu Hsiao
IPC分类号： H03K3/00
CPC分类号： G09G3/3688 , G09G2310/0291 , G09G2330/021
摘要： An output buffer and a controlling method are disclosed. The output buffer comprises an upper buffer and a lower buffer. In the controlling method, at first, a first voltage (V1) and a second voltage (V2) are applied on the upper buffer, and a third voltage (V3) and a fourth voltage (V4) are applied on the lower buffer, wherein V1>V2, V1>V4, V3>V2, and V3>V4. Then, the upper buffer is operated to output data to a plurality of pixels thereby operating the liquid crystals of the pixels over an upper supply range, wherein the upper supply range is from V1 to V2. Thereafter, the lower buffer is operated to output data to the pixels thereby operating the liquid crystals of the pixels over a lower supply range, wherein the lower supply range is from V3 to V4.
摘要翻译：公开了一种输出缓冲器和控制方法。输出缓冲器包括上缓冲器和下缓冲器。在控制方法中，首先，在上缓冲器上施加第一电压（V1）和第二电压（V2），在下缓冲器上施加第三电压（V3）和第四电压（V4），其中 V1> V2，V1> V4，V3> V2，V3> V4。然后，操作上缓冲器以将数据输出到多个像素，从而在上电源范围上操作像素的液晶，其中上电源范围为V1至V2。此后，操作下缓冲器以向像素输出数据，从而在较低的供给范围上操作像素的液晶，其中较低的供给范围为V3至V4。

9. 发明申请

US20080278090A1 Reset Circuit for Power-On and Power-Off 有权
标题翻译：上电和关机复位电路
公开(公告)号：US20080278090A1
公开(公告)日：2008-11-13
申请号：US11835268
申请日：2007-08-07
申请人： Ying Lieh Chen , Kai Lan Chuang , Tsung Yu Wu , Chien Ru Chen , Chin Tien Chang , Chuan Che Lee , Wen Teng Fan
发明人： Ying Lieh Chen , Kai Lan Chuang , Tsung Yu Wu , Chien Ru Chen , Chin Tien Chang , Chuan Che Lee , Wen Teng Fan
IPC分类号： H05B37/02 , H03L7/00
CPC分类号： G06F1/24 , H03K17/22
摘要： A circuit for resetting a display having at least one driver outputting a driving voltage through an output channel to a corresponding data line of a panel comprises a first switch and a second switch. The first switch is actuated by a control pulse to transfer a reset voltage to the data line of the panel. The second switch is actuated by the control pulse to electrically isolate the output channel of the driver from the data line of the panel, wherein the control pulse is asserted during transient periods resulting from power-on and power-off of the display.
摘要翻译：用于将具有至少一个驱动器的显示器复位的电路通过输出通道输出到面板的相应数据线，包括第一开关和第二开关。第一开关由控制脉冲启动，以将复位电压传送到面板的数据线。第二开关由控制脉冲启动，以将驱动器的输出通道与面板的数据线电隔离，其中控制脉冲在由显示器的通电和断电引起的瞬态期间被断言。

10. 发明申请

US20070273434A1 RECEIVER START-UP COMPENSATION CIRCUIT 有权
标题翻译：接收器启动补偿电路
公开(公告)号：US20070273434A1
公开(公告)日：2007-11-29
申请号：US11420771
申请日：2006-05-29
申请人： Chin-Tien Chang , Chien-Ru Chen , Ying-Lieh CHEN
发明人： Chin-Tien Chang , Chien-Ru Chen , Ying-Lieh CHEN
IPC分类号： G05F1/10
CPC分类号： G05F3/262
摘要： An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.
摘要翻译：一种集成电路包括用于在输出端提供电流的电流镜电路，耦合到电流镜电路的输出端的掉电开关，用于根据在电流镜电路中接收的信号控制由电流镜电路产生的电流的存取掉电开关的控制端，以及耦合到电流镜电路的偏置端的补偿单元和用于稳定电流镜电路的偏置端的电压的掉电开关。

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