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31. 发明申请

US20060017505A1 Current source circuit and differential amplifier 有权
公开(公告)号：US20060017505A1
公开(公告)日：2006-01-26
申请号：US11181891
申请日：2005-07-15
申请人： Masaomi Kamakura , Takahiro Miki
发明人： Masaomi Kamakura , Takahiro Miki
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45644
摘要： A current source block and a negative resistance generation block are connected in parallel. The negative resistance generation block generates a negative resistance in response to the minute variations of an output voltage. Thus the output resistance of a current source circuit is given by the combined resistance of the negative resistance and the resistance of a resistor in the current source block connected in parallel. The resistance of the resistor in the current source block and the negative resistance are controlled to be substantially the same to thereby increase the output resistance of the current source circuit. The current source circuit serves to increase an output resistance when viewed from an differential output terminal. As a result, use of this current source circuit realizes a differential amplifier providing a high gain.

32. 发明授权

US06826393B1 Mixer circuit having component for frequency conversion 失效
标题翻译：混频器电路具有用于频率转换的组件
公开(公告)号：US06826393B1
公开(公告)日：2004-11-30
申请号：US09547920
申请日：2000-04-11
申请人： Hiroshi Komurasaki , Hisayasu Sato , Takahiro Miki
发明人： Hiroshi Komurasaki , Hisayasu Sato , Takahiro Miki
IPC分类号： H04B128
CPC分类号： H03D7/1433 , H03D7/1425 , H03D7/1458 , H03D7/1491 , H03D2200/0025 , H03D2200/0043
摘要： A mixer circuit according to the present invention includes a first differential transistor pair of two transistors, a second differential transistor pair of two transistors, an impedance element connected to the first differential transistor pair, an impedance element connected to the second differential transistor pair, an inductor connected to nodes A, B, a current source connected to node A, a current source connected to node B, and a capacitor. A mixer circuit with high conversion gain and small distortion can be obtained.
摘要翻译：根据本发明的混频器电路包括两个晶体管的第一差分晶体管对，两个晶体管的第二差分晶体管对，连接到第一差分晶体管对的阻抗元件，连接到第二差分晶体管对的阻抗元件，电感器连接到节点A，B，连接到节点A的电流源，连接到节点B的电流源和电容器。可以获得具有高转换增益和小失真的混频器电路。

33. 发明授权

US6100760A Variable gain amplifier 失效
标题翻译：可变增益放大器
公开(公告)号：US6100760A
公开(公告)日：2000-08-08
申请号：US90240
申请日：1998-06-04
申请人： Takaya Maruyama , Hisayasu Satoh , Takahiro Miki
发明人： Takaya Maruyama , Hisayasu Satoh , Takahiro Miki
IPC分类号： H03G3/10 , H03G1/00 , H03F3/45
CPC分类号： H03G1/0023
摘要： Current controllers (C1 and C2) are connected to a power source (Vcc) in common through a load (L). Inputs of the current controllers (C1 and C2) are connected to outputs of current amplifier parts (A1 and A2) respectively, and the current amplifier parts (A1 and A2) are connected to a ground level (GND) through constant current sources (CS1 and CS2) respectively. The current amplifier part (A1) has a high gain, and the current amplifier part (A2) has a low gain. Thus, a variable gain amplifier whose input range does not abruptly change with respect to a control voltage is obtained, and a variable gain amplifier widening its input range is provided.
摘要翻译：电流控制器（C1和C2）通过负载（L）共同连接到电源（Vcc）。电流控制器（C1和C2）的输入分别连接到电流放大器部件（A1和A2）的输出端，并且电流放大器部件（A1和A2）通过恒定电流源（CS1）连接到地电平（GND）和CS2）。电流放大器部分（A1）具有高增益，并且电流放大器部分（A2）具有低增益。因此，获得其输入范围相对于控制电压没有突然变化的可变增益放大器，并且提供扩大其输入范围的可变增益放大器。

34. 发明授权

US5854569A Current source for rapid switching and reduced oscillatory transients 失效
标题翻译：用于快速切换和减少振荡瞬变的电流源
公开(公告)号：US5854569A
公开(公告)日：1998-12-29
申请号：US890027
申请日：1997-07-31
申请人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
发明人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H01L27/04 , G05F3/24 , H01L21/822 , H03K17/16 , H03K17/687 , G05F3/02
CPC分类号： G05F3/242 , H03K2217/0018
摘要： A current source and a semiconductor integrated circuit device for suppressing fluctuations occured in an output current of current sources composed MOS transistors for switching. A back gate voltage of MOS transistors M1, M3 for switching connected in series to a constant current generator 9 is supplied through a power source line 5d independent of a power source line 4d which supplies a driving voltage. The stabilization of the back gate voltage leads the operation of the MOS transistors M1, M3 to be stabilized, thereby suppressing the fluctuations occured in the output currents I.sub.out and I.sub.out current sources.
摘要翻译：电流源和半导体集成电路器件，用于抑制组合用于切换的MOS晶体管的电流源的输出电流发生的波动。用于与恒定电流发生器9串联连接的开关用的MOS晶体管M1，M3的背栅电压通过电源线5d供给，而电源线5d独立于提供驱动电压的电源线4d。背栅极电压的稳定导致MOS晶体管M1，M3的操作稳定，从而抑制输出电流Iout和+ E，ovs Iout + EE电流源中发生的波动。

35. 发明授权

US5657018A Bar graph decoder outputting thermometer code 失效
标题翻译：条形图解码器输出温度计代码
公开(公告)号：US5657018A
公开(公告)日：1997-08-12
申请号：US538485
申请日：1995-10-03
申请人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
发明人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H03M1/76 , H03M7/00 , H03M7/08 , H03M7/16 , H03M5/00
CPC分类号： H03M7/165
摘要： A bar graph decoder includes input terminals to which 5-bit digital data is input, a logic circuit for outputting a thermometer code changing continuously at a constant ratio in response to the input data, and output terminals connected to the logic circuit for outputting switch select signals according to the digital input. The logic circuit is configured only of 2-input OR circuits and 2-input AND circuits. As a result, a bar graph decoder having a simple configuration and a reduced number of elements can be provided.
摘要翻译：条形图解码器包括输入5位数字数据的输入端子，用于输出响应于输入数据以恒定比例连续变化的温度计代码的逻辑电路，以及连接到用于输出开关选择的逻辑电路的输出端子信号根据数字输入。逻辑电路仅由2输入OR电路和2输入AND电路组成。结果，可以提供具有简单配置和数量减少的元件的条形图解码器。

36. 发明授权

US5469047A Transistor circuit 失效
标题翻译：晶体管电路
公开(公告)号：US5469047A
公开(公告)日：1995-11-21
申请号：US311433
申请日：1994-09-26
申请人： Toshio Kumamoto , Takahiro Miki , Hiroyuki Kouno
发明人： Toshio Kumamoto , Takahiro Miki , Hiroyuki Kouno
IPC分类号： G05F3/16 , G05F3/20
CPC分类号： G05F3/20
摘要： In order to obtain a constant current circuit which has an excellent constant current property and requires no plural bias circuits, a base of an NPN bipolar transistor (5) and a gate of an N-channel MOS transistor (6) are connected to a first terminal (1) in common. A collector of the transistor (5) is connected to a second terminal (2) and a source of a transistor (6) is connected to a third terminal respectively, while a voltage source (59) is connected between the first and third terminals. An emitter of the transistor (5) is connected with a drain of the transistor (6). Identical bias voltages are supplied to the base and the gate, while a gate-to-drain voltage of the transistor (6) is equal to a base-to-emitter voltage of the transistor (5). Thus, the transistor (6) operates in a pentode region, to serve as a constant current load for the transistor (5).
摘要翻译：为了获得具有优异的恒定电流特性并且不需要多个偏置电路的恒流电路，NPN双极晶体管（5）的基极和N沟道MOS晶体管（6）的栅极连接到第一终端（1）共同点。晶体管（5）的集电极连接到第二端子（2），并且晶体管（6）的源极分别连接到第三端子，而电压源（59）连接在第一和第三端子之间。晶体管（5）的发射极与晶体管（6）的漏极连接。相同的偏置电压被提供给基极和栅极，而晶体管（6）的栅极 - 漏极电压等于晶体管（5）的基极 - 发射极电压。因此，晶体管（6）工作在五极管区域，用作晶体管（5）的恒定电流负载。

37. 发明授权

US5341037A Sample hold circuit, buffer circuit and sample hold apparatus using these circuits 失效
标题翻译：使用这些电路的采样保持电路，缓冲电路和采样保持装置
公开(公告)号：US5341037A
公开(公告)日：1994-08-23
申请号：US886904
申请日：1992-05-22
申请人： Takahiro Miki , Toshio Kumamoto
发明人： Takahiro Miki , Toshio Kumamoto
IPC分类号： G11C27/02 , H03K5/159
CPC分类号： G11C27/026 , G11C27/024
摘要： Positive and negative output ends of a differential circuit in a sample hold circuit are connected to capacitors through switch circuits. Further, collectors of two input transistors of a buffer circuit connected to the sample hold circuit are driven by a collector driving differential circuit, so as to make the collector.multidot.base voltages of two input transistors same to each other. Consequently, a stable sample hold circuit having an arbitrary gain can be provided. In addition, drifts of outputs from two capacitors in the sample hold circuit can be made equal to each other by the buffer circuit.
摘要翻译：采样保持电路中的差分电路的正和负输出端通过开关电路连接到电容器。此外，连接到采样保持电路的缓冲电路的两个输入晶体管的集电极由集电极驱动差分电路驱动，以使两个输入晶体管的集电极基极彼此相同。因此，可以提供具有任意增益的稳定的采样保持电路。此外，可以通过缓冲电路将采样保持电路中的两个电容器的输出漂移相互相等。

38. 发明授权

US5313207A Differential subtracter improved for higher accuracy and A/D converter including the same 失效
标题翻译：对于较高精度的差分减法器和包括相同的A / D转换器
公开(公告)号：US5313207A
公开(公告)日：1994-05-17
申请号：US71497
申请日：1993-06-04
申请人： Hiroyuki Kouno , Takahiro Miki , Toshio Kumamoto
发明人： Hiroyuki Kouno , Takahiro Miki , Toshio Kumamoto
IPC分类号： H03F3/45 , G06G7/14 , H03F3/72 , H03M1/14 , H03M1/34 , H03M1/36 , H03M1/12
CPC分类号： H03M1/164 , G06G7/14 , H03F3/72
摘要： An improved differential subtracter 3a and an improved D/A converter 7a are used in a two-step parallel A/D converter 100. The D/A converter is responsive to complementary signals S1-S2 and B1-Bn indicative of results of conversion of higher bits to draw subtraction currents Is1 and Is2 through emitter electrodes of npn transistors Q1 and Q2. Since a difference between emitter currents I.sub.E1 and I.sub.E2 is small, base-emitter voltages V.sub.BE1 and V.sub.BE2 are substantially equal to each other. As a result, the A/D converter can execute the subtraction at high speed with high accuracy.
摘要翻译：改进的差分减法器3a和改进的D / A转换器7a用于两级并行A / D转换器100.D / A转换器响应于指示转换结果的互补信号S1-S2和B1-Bn 较高位以通过npn晶体管Q1和Q2的发射极来减去电流Is1和Is2。由于发射极电流IE1和IE2之间的差异小，所以基极 - 发射极电压VBE1和VBE2基本相等。因此，A / D转换器可以高精度地执行减法。

39. 发明授权

US07495510B2 Current source circuit and differential amplifier 失效
标题翻译：电流源电路和差分放大器
公开(公告)号：US07495510B2
公开(公告)日：2009-02-24
申请号：US11907171
申请日：2007-10-10
申请人： Masaomi Kamakura , Takahiro Miki
发明人： Masaomi Kamakura , Takahiro Miki
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45644
摘要： A current source block and a negative resistance generation block are connected in parallel. The negative resistance generation block generates a negative resistance in response to the minute variations of an output voltage. Thus the output resistance of a current source circuit is given by the combined resistance of the negative resistance and the resistance of a resistor in the current source block connected in parallel. The resistance of the resistor in the current source block and the negative resistance are controlled to be substantially the same to thereby increase the output resistance of the current source circuit. The current source circuit serves to increase an output resistance when viewed from an differential output terminal. As a result, use of this current source circuit realizes a differential amplifier providing a high gain.
摘要翻译：电流源块和负电阻生成块并联连接。负电阻产生块响应于输出电压的微小变化而产生负电阻。因此，电流源电路的输出电阻由负电阻的组合电阻和并联连接的电流源模块中的电阻器的电阻给出。电流源电阻中的电阻和负电阻的电阻被控制为基本相同，从而增加电流源电路的输出电阻。电流源电路用于当从差分输出端子观察时增加输出电阻。结果，使用该电流源电路实现提供高增益的差分放大器。

40. 发明授权

US07437926B2 Air flow rate measuring device 有权
标题翻译：空气流量测量装置
公开(公告)号：US07437926B2
公开(公告)日：2008-10-21
申请号：US11758292
申请日：2007-06-05
申请人： Masayuki Kozawa , Makoto Iida , Akio Yasukawa , Mari Hikota , Takahiro Miki
发明人： Masayuki Kozawa , Makoto Iida , Akio Yasukawa , Mari Hikota , Takahiro Miki
IPC分类号： G01F1/68
CPC分类号： G01F1/6842 , G01F15/00 , G01F15/18
摘要： An air flow rate measuring device is provided in which a pressure loss across a grid therein due to the load which is generated when a hose band is tightened is reduced and deterioration of its measurement accuracy due to the grid deformation is prevented. The grid is configured to have a grid portion which absorbs deformation at the outer periphery thereof, and another grid portion which does not absorb deformation at the inner periphery thereof. In order to make the grid portions independent of each other, the grid is provided with a frame, and the mesh grid inside of the frame which maintains a rectifying effect, prevents the deterioration of the measurement accuracy, and does not absorb deformation, and the grid outside of the frame absorbs deformation.
摘要翻译：提供了一种空气流量测量装置，其中由于在软管带被紧固时产生的负载而在其内的电网的压力损失减少，并且防止了由于电网变形引起的其测量精度的劣化。格栅被构造为具有能够吸收其外周的变形的栅格部，以及在其内周不吸收变形的另一格栅部。为了使栅格部分彼此独立，栅格设置有框架，并且框架内部的网格保持整流效果，防止测量精度的劣化，并且不会吸收变形，并且框架外部的网格吸收变形。

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