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31. 发明申请

US20070252150A1 LIGHT EMITTING DEVICE 有权
标题翻译：发光装置
公开(公告)号：US20070252150A1
公开(公告)日：2007-11-01
申请号：US11773172
申请日：2007-07-03
申请人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
发明人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
IPC分类号： H01L29/10
CPC分类号： H01L27/3265 , H01L27/124 , H01L27/1255 , H01L27/3246 , H01L27/3258 , H01L27/3262 , H01L27/3276 , H01L29/78633
摘要： A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
摘要翻译：提供一种可以防止由于泄漏或其它原因引起的栅极电压变化并且同时可以防止开口率降低的发光器件。电容器存储器由连接布线，绝缘膜和电容布线形成。连接布线形成在栅电极和像素的TFT的有源层上，并与有源层连接。绝缘膜形成在连接布线上。电容布线形成在绝缘膜上。这种结构使得电容器存储与TFT重叠，从而在保持开口率降低的同时增加电容器存储的容量。因此，可以避免由于泄漏或其他原因导致的栅极电压的变化，以防止OLED的亮度变化和模拟驱动中屏幕的闪烁。

32. 发明授权

US07184017B2 D/A conversion circuit and semiconductor device 有权
标题翻译： D / A转换电路和半导体器件
公开(公告)号：US07184017B2
公开(公告)日：2007-02-27
申请号：US11128333
申请日：2005-05-13
申请人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
发明人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
IPC分类号： G09G3/36
CPC分类号： H01L27/1214 , G09G3/20 , G09G3/2011 , G09G3/3677 , G09G3/3688 , G09G2310/0218 , G09G2310/027 , G09G2310/0297 , H01L21/84 , H01L29/04 , H03K17/6872 , H03K17/693 , H03M1/682 , H03M1/765
摘要： A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.
摘要翻译：提供具有小面积的D / A转换电路。在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

33. 发明授权

US06911926B2 D/A conversion circuit and semiconductor device 失效
标题翻译： D / A转换电路和半导体器件
公开(公告)号：US06911926B2
公开(公告)日：2005-06-28
申请号：US10810573
申请日：2004-03-29
申请人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
发明人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
IPC分类号： G09G3/36 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04 , H03K17/687 , H03K17/693 , H03M1/66 , H03M1/68 , H03M1/76 , H03M1/00
CPC分类号： H01L27/1214 , G09G3/20 , G09G3/2011 , G09G3/3677 , G09G3/3688 , G09G2310/0218 , G09G2310/027 , G09G2310/0297 , H01L21/84 , H01L29/04 , H03K17/6872 , H03K17/693 , H03M1/682 , H03M1/765
摘要： A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.
摘要翻译：提供具有小面积的D / A转换电路。在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

34. 发明申请

US20050092984A1 Light emitting device 有权
标题翻译：发光装置
公开(公告)号：US20050092984A1
公开(公告)日：2005-05-05
申请号：US10986931
申请日：2004-11-15
申请人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
发明人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L27/13 , H01L27/32 , H01L29/08
CPC分类号： H01L27/3265 , H01L27/124 , H01L27/1255 , H01L27/3246 , H01L27/3258 , H01L27/3262 , H01L27/3276 , H01L29/78633
摘要： A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
摘要翻译：提供一种可以防止由于泄漏或其它原因引起的栅极电压变化并且同时可以防止开口率降低的发光器件。电容器存储器由连接布线，绝缘膜和电容布线形成。连接布线形成在栅电极和像素的TFT的有源层上，并与有源层连接。绝缘膜形成在连接布线上。电容布线形成在绝缘膜上。这种结构使得电容器存储与TFT重叠，从而在保持开口率降低的同时增加电容器存储的容量。因此，可以避免由于泄漏或其他原因导致的栅极电压的变化，以防止OLED的亮度变化和模拟驱动中屏幕的闪烁。

35. 发明授权

US06825496B2 Light emitting device 有权
标题翻译：发光装置
公开(公告)号：US06825496B2
公开(公告)日：2004-11-30
申请号：US10050597
申请日：2002-01-15
申请人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
发明人： Shunpei Yamazaki , Jun Koyama , Tatsuya Arao , Munehiro Azami
IPC分类号： H01L2904
CPC分类号： H01L27/3265 , H01L27/124 , H01L27/1255 , H01L27/3246 , H01L27/3258 , H01L27/3262 , H01L27/3276 , H01L29/78633
摘要： A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture ratio from lowering. A capacitor storage is formed from a connection wiring line, an insulating film, and a capacitance wiring line. The connection wiring line is formed over a gate electrode and an active layer of a TFT of a pixel, and is connected to the active layer. The insulating film is formed on the connection wiring line. The capacitance wiring line is formed on the insulating film. This structure enables the capacitor storage to overlap the TFT, thereby increasing the capacity of the capacitor storage while keeping the aperture ratio from lowering. Accordingly, a change in gate voltage due to leakage or other causes can be avoided to prevent a change in luminance of an OLED and flickering of screen in analog driving.
摘要翻译：提供一种可以防止由于泄漏或其它原因引起的栅极电压变化并且同时可以防止开口率降低的发光器件。电容器存储器由连接布线，绝缘膜和电容布线形成。连接布线形成在栅电极和像素的TFT的有源层上，并与有源层连接。绝缘膜形成在连接布线上。电容布线形成在绝缘膜上。这种结构使得电容器存储与TFT重叠，从而在保持开口率降低的同时增加电容器存储的容量。因此，可以避免由于泄漏或其他原因导致的栅极电压的变化，以防止OLED的亮度变化和模拟驱动中屏幕的闪烁。

36. 发明授权

US06441758B1 D/A conversion circuit and semiconductor device 失效
标题翻译： D / A转换电路和半导体器件
公开(公告)号：US06441758B1
公开(公告)日：2002-08-27
申请号：US09197766
申请日：1998-11-23
申请人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
发明人： Jun Koyama , Mitsuaki Osame , Yukio Tanaka , Munehiro Azami , Naoko Yano , Shou Nagao
IPC分类号： H03M100
CPC分类号： H01L27/1214 , G09G3/20 , G09G3/2011 , G09G3/3677 , G09G3/3688 , G09G2310/0218 , G09G2310/027 , G09G2310/0297 , H01L21/84 , H01L29/04 , H03K17/6872 , H03K17/693 , H03M1/682 , H03M1/765
摘要： A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.
摘要翻译：提供具有小面积的D / A转换电路。在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

37. 发明授权

US08570065B2 Programmable LSI 有权
标题翻译：可编程LSI
公开(公告)号：US08570065B2
公开(公告)日：2013-10-29
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
发明人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
IPC分类号： H03K19/177 , G11C11/24
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

38. 发明授权

US07375668B2 Digital driver and display device 失效
标题翻译：数字驱动器和显示设备
公开(公告)号：US07375668B2
公开(公告)日：2008-05-20
申请号：US11717026
申请日：2007-03-13
申请人： Jun Koyama , Yutaka Shionoiri
发明人： Jun Koyama , Yutaka Shionoiri
IPC分类号： H03M1/66
CPC分类号： G09G3/3688 , G09G3/20 , G09G2310/027 , G09G2310/08 , G09G2320/0252 , G11C19/00 , G11C19/28 , H03M9/00
摘要： A digital driver for display devices which can prevent the delay of digital data and the extended transition time of the digital data, and thus can make good display, and a display device including the above-mentioned digital driver are disclosed. The digital driver according to the present invention is constituted in such a manner that, by successively inputting digital data to a shift register, the digital data are shifted in the shift register, and the resulting output is sent out to latch circuits. Since the digital data are directly inputted to the shift register, the distance over which the data lines are laid around can be shortened, the increase in load due to the laying-around of the data lines which has so far been a problem can be prevented, and the delay of the digital data and the extended transition time of the digital data can be prevented.
摘要翻译：一种用于显示装置的数字驱动器，其可以防止数字数据的延迟和数字数据的延长的转换时间，并且因此可以进行良好的显示，并且公开了包括上述数字驱动器的显示装置。根据本发明的数字驱动器以这样的方式构成，即通过将数字数据连续地输入到移位寄存器，数字数据在移位寄存器中移位，并将所得到的输出发送到锁存电路。由于数字数据被直接输入到移位寄存器，所以可以缩短数据线的铺设距离，可以防止由于到目前为止存在问题的数据线的铺设而引起的负载的增加，并且可以防止数字数据的延迟和数字数据的扩展转换时间。

39. 发明授权

US06469686B1 Display device 失效
标题翻译：显示设备
公开(公告)号：US06469686B1
公开(公告)日：2002-10-22
申请号：US09084739
申请日：1998-05-27
申请人： Jun Koyama , Yutaka Shionoiri
发明人： Jun Koyama , Yutaka Shionoiri
IPC分类号： G09G326
CPC分类号： G09G3/3674 , G02F1/13454 , G09G3/3648 , G09G3/3685 , G09G5/005 , G09G2310/0232 , G09G2310/08
摘要： In a display device of the active matrix type, for displaying images based on different signals write control circuits as provided in a source side driver circuit and a gate line side driver circuit are operable to selectively supply output signals of shift registers to a source line and a gate line. Whereby, it becomes possible to render the non-display section of an image clearer or visually distinguishable, which in turn leads to capability of successful execution of images with excellent quality.
摘要翻译：在有源矩阵型的显示装置中，为了基于不同信号显示图像，如源极驱动电路和栅极线侧驱动电路中所提供的写入控制电路可操作以选择性地将移位寄存器的输出信号提供给源极线，一条门线。由此，可以使图像的非显示部分更清晰或视觉上可区分，这反过来导致成功执行具有优良品质的图像的能力。

40. 发明授权

US06292183B1 Display device and drive circuit therefor 失效
标题翻译：显示装置及其驱动电路
公开(公告)号：US06292183B1
公开(公告)日：2001-09-18
申请号：US09115841
申请日：1998-07-15
申请人： Shunpei Yamazaki , Jun Koyama , Yutaka Shionoiri
发明人： Shunpei Yamazaki , Jun Koyama , Yutaka Shionoiri
IPC分类号： G09G500
CPC分类号： H01L27/12 , G09G3/3688 , G09G2310/0289
摘要： In an active matrix liquid crystal display device, the driver of a gate signal line is provided with a low-supply-voltage drive section and a high-supply-voltage drive section. A level shifter circuit in the high-supply-voltage drive section is made up of two CMOS circuits, to which a supply voltage Vdd2 (high-voltage power supply) is applied. Also, to two n-channel TFWs Tr3 and Tr7 in the level shifter circuit is applied a bias voltage Vdd1 (low-voltage power supply) which is a supply voltage different from the above supply voltage. This structure can prevent a high load from being exerted on only one n-channel TFT, thereby being capable of making the withstand voltage high.
摘要翻译：在有源矩阵液晶显示装置中，栅极信号线的驱动器设置有低电压驱动部和高电压驱动部。高电源电压驱动部分中的电平移动器电路由施加电源电压Vdd2（高电压电源）的两个CMOS电路组成。此外，对于电平移位器电路中的两个n沟道TFW Tr3和Tr7，施加与上述电源电压不同的电源电压的偏置电压Vdd1（低压电源）。这种结构可以防止高负载仅施加在一个n沟道TFT上，从而能够使耐压高。

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