专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US4907775A Container holder 失效
标题翻译：集装箱架
公开(公告)号：US4907775A
公开(公告)日：1990-03-13
申请号：US312086
申请日：1989-02-17
申请人： Brian S. Lorence , Richard A. Phelps
发明人： Brian S. Lorence , Richard A. Phelps
IPC分类号： A47C7/62 , B60N3/10
CPC分类号： B60N3/102
摘要： A container holder (2) for use with a support (4) including a frame (8) slidable within a housing (6) movable between a vertical, storage position, and a horizontal, operational position. The housing (6) is a box-like configuration having a slot (18) formed at one end. The frame (8) includes an integral member (26) having an opening (28) to accommodate beverage containers such as cans and cups. When in the storage position, the frame (8) is retained within the housing (6) in a vertical position. As the frame (8) moves to its operational position, it is guided through the slot (18) and pivots to a horizontal, operational position, generally perpendicular to its vertical, storage position. This operation enables the container holder (2) to be conveniently stored in a narrow space. 9
摘要翻译：一种用于与支撑件（4）一起使用的容器保持器（2），其包括可在垂直，存储位置和水平操作位置之间移动的壳体（6）内滑动的框架（8）。壳体（6）是在一端形成有槽（18）的盒状构造。框架（8）包括具有开口（28）的整体构件（26），以容纳诸如罐和杯子的饮料容器。当处于存储位置时，框架（8）在垂直位置处被保持在壳体（6）内。当框架（8）移动到其操作位置时，其被引导通过狭槽（18）并且枢转到水平的操作位置，大体上垂直于其垂直的存储位置。该操作使得容器保持器（2）能够方便地存储在狭窄的空间中。

32. 发明授权

US4686741A Padded automotive casket handle 失效
标题翻译：垫圈汽车棺材手柄
公开(公告)号：US4686741A
公开(公告)日：1987-08-18
申请号：US834005
申请日：1986-02-27
申请人： Ronald D. Moore , James D. Kavanaugh , Richard A. Phelps , Michael C. Howard
发明人： Ronald D. Moore , James D. Kavanaugh , Richard A. Phelps , Michael C. Howard
IPC分类号： B60N3/02 , E05B1/00 , E05B5/00 , E05B65/20 , E05B5/02
CPC分类号： B60N3/02 , E05B5/00 , E05B1/0015 , E05B85/10 , Y10S16/18 , Y10T16/50 , Y10T16/515
摘要： An automotive casket handle includes a generally U-shaped frame, pivotally mounted to a support surface, and inside and outside cushion members secured to recesses in the frame. Each cushion member includes a structural strip, typically of steel, a cover, typically of preformed vinyl, and a foam strip positioned between the structural strip and the cover. The edges of the cover are captured between the structural strip and the frame. Thus, the exposed surface of the cover is smooth and seamless with rounded edges. One cushion member is secured to the frame by bendable tabs extending from the structural strip, passing through tab openings in the frame and then bent against the frame. The other cushion member is connected to the frame by the engagement of studs, extending from the structural strip, into push lock fasteners mounted to the frame.
摘要翻译：汽车棺材手柄包括大致U形的框架，枢转地安装到支撑表面，以及固定到框架中的凹部的内部和外部缓冲构件。每个缓冲构件包括通常为钢的结构带，通常为预成型的乙烯基的盖，以及位于结构带和盖之间的泡沫条。盖的边缘被捕获在结构条和框架之间。因此，盖的暴露表面是平滑无缝的，具有圆形边缘。一个缓冲构件通过从结构带延伸的可弯曲翼片固定到框架上，穿过框架中的突片开口，然后相对于框架弯曲。另一个缓冲构件通过从结构带延伸的螺栓与安装到框架的推动锁紧件的接合而连接到框架。

33. 发明授权

US08748285B2 Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate 有权
标题翻译：绝缘体上半导体衬底顶硅层中的高气体注入区
公开(公告)号：US08748285B2
公开(公告)日：2014-06-10
申请号：US13280681
申请日：2011-11-28
申请人： Alan B. Botula , William F. Clark, Jr. , Richard A. Phelps , BethAnn Rainey , Yun Shi , James A. Slinkman
发明人： Alan B. Botula , William F. Clark, Jr. , Richard A. Phelps , BethAnn Rainey , Yun Shi , James A. Slinkman
IPC分类号： H01L21/76
CPC分类号： H01L21/84 , H01L27/1203
摘要： A semiconductor structure includes a semiconductor-on-insulator substrate, the semiconductor-on-insulator substrate comprising a handle wafer, a buried oxide (BOX) layer on top of the handle wafer, and a top silicon layer on top of the BOX layer; and an implantation region located in the top silicon layer, the implantation region comprising a noble gas.
摘要翻译：半导体结构包括绝缘体上半导体衬底，绝缘体上半导体衬底包括处理晶片，处理晶片顶部的掩埋氧化物（BOX）层和位于BOX层顶部的顶部硅层; 以及位于顶部硅层中的注入区域，该注入区域包括惰性气体。

34. 发明授权

US08598660B2 Stress enhanced LDMOS transistor to minimize on-resistance and maintain high breakdown voltage 有权
公开(公告)号：US08598660B2
公开(公告)日：2013-12-03
申请号：US13150612
申请日：2011-06-01
申请人： Renata Camillo-Castillo , Erik Mattias Dahlstrom , Robert J. Gauthier, Jr. , Ephrem G. Gebreselasie , Richard A. Phelps , Jed Hickory Rankin , Yun Shi
发明人： Renata Camillo-Castillo , Erik Mattias Dahlstrom , Robert J. Gauthier, Jr. , Ephrem G. Gebreselasie , Richard A. Phelps , Jed Hickory Rankin , Yun Shi
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66492 , H01L29/0653 , H01L29/1045 , H01L29/66659 , H01L29/66689 , H01L29/7816 , H01L29/7835 , H01L29/7843
摘要： A lateral diffused metal-oxide-semiconductor field effect transistor (LDMOS transistor) employs a stress layer that enhances carrier mobility (i.e., on-current) while also maintaining a high breakdown voltage for the device. High breakdown voltage is maintained, because an increase in doping concentration of the drift region is minimized. A well region and a drift region are formed in the substrate adjacent to one another. A first shallow trench isolation (STI) region is formed on and adjacent to the well region, and a second STI region is formed on and adjacent to the drift region. A stress layer is deposited over the LDMOS transistor and in the second STI region, which propagates compressive or tensile stress into the drift region, depending on the polarity of the stress layer. A portion of the stress layer can be removed over the gate to change the polarity of stress in the inversion region below the gate.

35. 发明申请

US20130175656A1 ISOLATED ZENER DIODE 有权
标题翻译：隔离ZENER二极管
公开(公告)号：US20130175656A1
公开(公告)日：2013-07-11
申请号：US13345881
申请日：2012-01-09
申请人： Frederick G. Anderson , Natalie B. Feilchenfeld , David L. Harmon , Richard A. Phelps , Yun Shi , Michael J. Zierak
发明人： Frederick G. Anderson , Natalie B. Feilchenfeld , David L. Harmon , Richard A. Phelps , Yun Shi , Michael J. Zierak
IPC分类号： H01L29/06 , H01L21/76
CPC分类号： H01L29/866 , H01L21/76 , H01L21/76283 , H01L27/0255 , H01L29/66106
摘要： Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (Vb) as a function of the position of a cathode contact region relative to the interface between adjacent cathode and anode well regions. Specifically, cathode and anode contact regions are positioned adjacent to corresponding cathode and anode well regions and are further separated by an isolation region. However, while the anode contact region is contained entirely within the anode well region, one end of the cathode contact region extends laterally into the anode well region. The length of this end can be predetermined in order to selectively adjust the Vb of the diode (e.g., increasing the length reduces Vb of the diode and vice versa). Also disclosed are an integrated circuit, incorporating multiple instances of the diode with different reverse-bias breakdown voltages, a method of forming the diode and a design structure for the diode.
摘要翻译：公开了一种齐纳二极管，其具有作为阴极接触区域相对于相邻阴极和阳极阱区域之间的界面的位置的函数的可缩放反向偏压击穿电压（Vb）。具体地，阴极和阳极接触区域被定位成与相应的阴极和阳极阱区域相邻，并进一步被隔离区域分离。然而，当阳极接触区域完全包含在阳极阱区域内时，阴极接触区域的一端横向延伸到阳极阱区域中。为了选择性地调节二极管的Vb（例如，增加长度减小二极管的Vb，反之亦然），可以预定该端的长度。还公开了一种集成电路，其结合具有不同反向偏压击穿电压的二极管的多个实例，形成二极管的方法和二极管的设计结构。

36. 发明申请

US20130005157A1 SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FREQUENCY HARMONIC SUPRESSING REGION 有权
标题翻译：半导体绝缘体基板和包括多个无线电频率谐波抑制区域的结构
公开(公告)号：US20130005157A1
公开(公告)日：2013-01-03
申请号：US13608314
申请日：2012-09-10
申请人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
发明人： Joseph R. Greco , Kevin Munger , Richard A. Phelps , Jennifer C. Robbins , William Savaria , James A. Slinkman , Randy L. Wolf
IPC分类号： H01L21/265
CPC分类号： H01L21/7624 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.
摘要翻译：绝缘体上半导体衬底和相关半导体结构以及绝缘体上半导体衬底和相关半导体结构的制造方法提供了一种位于并形成在基底半导体内的多阶射频谐波抑制区域在绝缘体上半导体衬底内的掩埋介质层与基底半导体衬底的界面下方的位置处的衬底。多级射频谐波抑制区域可以包括离子注入原子，例如但不限于稀有气体原子，以在对射频设备供电时提供抑制的多阶射频谐波，例如但不限于无线电位于和形成在半导体结构内的表面半导体层内和之上的高频互补金属氧化物半导体器件（或替代地，无源器件）。

37. 发明申请

US20120326766A1 Silicon Controlled Rectifier with Stress-Enhanced Adjustable Trigger Voltage 有权
标题翻译：具有应力增强可调触发电压的硅控整流器
公开(公告)号：US20120326766A1
公开(公告)日：2012-12-27
申请号：US13168232
申请日：2011-06-24
申请人： Renata Camillo-Castillo , Erik M. Dahlstrom , Robert J. Gauthier, JR. , Ephrem G. Gebreselasie , Richard A. Phelps , Yun Shi , Andreas D. Stricker
发明人： Renata Camillo-Castillo , Erik M. Dahlstrom , Robert J. Gauthier, JR. , Ephrem G. Gebreselasie , Richard A. Phelps , Yun Shi , Andreas D. Stricker
IPC分类号： H03K17/72 , H01L29/74 , G06F17/50 , H01L21/311
CPC分类号： H01L29/7315 , G06F17/5063 , H01L27/0262 , H01L29/66393 , H01L29/7436
摘要： Device structures, fabrication methods, operating methods, and design structures for a silicon controlled rectifier. The method includes applying a mechanical stress to a region of a silicon controlled rectifier (SCR) at a level sufficient to modulate a trigger current of the SCR. The device and design structures include a SCR with an anode, a cathode, a first region, and a second region of opposite conductivity type to the first region. The first and second regions of the SCR are disposed in a current-carrying path between the anode and cathode of the SCR. A layer is positioned on a top surface of a semiconductor substrate relative to the first region and configured to cause a mechanical stress in the first region of the SCR at a level sufficient to modulate a trigger current of the SCR.
摘要翻译：可控硅整流器的器件结构，制造方法，操作方法和设计结构。该方法包括以足以调节SCR的触发电流的水平对可控硅整流器（SCR）的区域施加机械应力。装置和设计结构包括具有阳极的SCR，阴极，第一区域和与第一区域相反的导电类型的第二区域。 SCR的第一和第二区域设置在SCR的阳极和阴极之间的通电路径中。层相对于第一区域定位在半导体衬底的顶表面上，并且被配置为在SCR的第一区域中产生一个足以调制SCR的触发电流的电平的机械应力。

38. 发明申请

US20120306014A1 STRESS ENHANCED LDMOS TRANSISTOR TO MINIMIZE ON-RESISTANCE AND MAINTAIN HIGH BREAKDOWN VOLTAGE 有权
标题翻译：应力增强LDMOS晶体管，以最小化接通电阻并保持高电压
公开(公告)号：US20120306014A1
公开(公告)日：2012-12-06
申请号：US13150612
申请日：2011-06-01
申请人： Renata Camillo-Castillo , Erik Mattias Dahlstrom , Robert J. Gauthier, JR. , Ephrem G. Gebreselasie , Richard A. Phelps , Jed Hickory Rankin , Yun Shi
发明人： Renata Camillo-Castillo , Erik Mattias Dahlstrom , Robert J. Gauthier, JR. , Ephrem G. Gebreselasie , Richard A. Phelps , Jed Hickory Rankin , Yun Shi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66492 , H01L29/0653 , H01L29/1045 , H01L29/66659 , H01L29/66689 , H01L29/7816 , H01L29/7835 , H01L29/7843
摘要： A lateral diffused metal-oxide-semiconductor field effect transistor (LDMOS transistor) employs a stress layer that enhances carrier mobility (i.e., on-current) while also maintaining a high breakdown voltage for the device. High breakdown voltage is maintained, because an increase in doping concentration of the drift region is minimized. A well region and a drift region are formed in the substrate adjacent to one another. A first shallow trench isolation (STI) region is formed on and adjacent to the well region, and a second STI region is formed on and adjacent to the drift region. A stress layer is deposited over the LDMOS transistor and in the second STI region, which propagates compressive or tensile stress into the drift region, depending on the polarity of the stress layer. A portion of the stress layer can be removed over the gate to change the polarity of stress in the inversion region below the gate.
摘要翻译：横向扩散金属氧化物半导体场效应晶体管（LDMOS晶体管）采用增强载流子迁移率（即导通电流）的应力层，同时还保持器件的高击穿电压。由于漂移区域的掺杂浓度的增加被最小化，因此保持高的击穿电压。在相邻的衬底中形成阱区和漂移区。第一浅沟槽隔离（STI）区域形成在阱区域上并与阱区域相邻，并且第二STI区域形成在漂移区域上并与漂移区域相邻。应力层沉积在LDMOS晶体管和第二STI区域中，第二STI区域根据应力层的极性将压缩或拉伸应力传播到漂移区域。应力层的一部分可以在栅极上去除以改变栅极下方的反转区域中的应力极性。

39. 发明申请

US20120292669A1 FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING SAME 有权
标题翻译：场效应晶体管结构及其形成方法
公开(公告)号：US20120292669A1
公开(公告)日：2012-11-22
申请号：US13108305
申请日：2011-05-16
申请人： Panglijen Candra , Richard A. Phelps , Robert M. Rassel , Yun Shi
发明人： Panglijen Candra , Richard A. Phelps , Robert M. Rassel , Yun Shi
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/808 , H01L29/0649 , H01L29/1075 , H01L29/66901
摘要： The disclosure relates generally to junction gate field effect transistor (JFET) structures and methods of forming the same. The JFET structure includes a p-type substrate having a p-region therein; an n-channel thereunder; and n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region.
摘要翻译：本公开总体上涉及结栅场效应晶体管（JFET）结构及其形成方法。 JFET结构包括其中具有p区的p型衬底; 一条n通道; 在n沟道内的n掺杂的增强区域，每个n掺杂的增强区域与p区域分离。

40. 发明授权

US08169007B2 Asymmetric junction field effect transistor 有权
标题翻译：非对称结场效应晶体管
公开(公告)号：US08169007B2
公开(公告)日：2012-05-01
申请号：US13037485
申请日：2011-03-01
申请人： Frederick G. Anderson , David S. Collins , Richard A. Phelps , Robert M. Rassel , Michael J. Zierak
发明人： Frederick G. Anderson , David S. Collins , Richard A. Phelps , Robert M. Rassel , Michael J. Zierak
IPC分类号： H01L29/00 , H01L29/76
CPC分类号： H01L29/1058 , H01L29/0653 , H01L29/0692 , H01L29/0843 , H01L29/1608 , H01L29/161 , H01L29/20 , H01L29/22 , H01L29/66901 , H01L29/808
摘要： A junction field effect transistor (JFET) in a semiconductor substrate includes a source region, a drain region, a channel region, an upper gate region, and a lower gate region. The lower gate region is electrically connected to the upper gate region. The upper and lower gate regions control the current flow through the channel region. By performing an ion implantation step that extends the thickness of the source region to a depth greater than the thickness of the drain region, an asymmetric JFET is formed. The extension of depth of the source region relative to the depth of the drain region reduces the length for minority charge carriers to travel through the channel region, reduces the on-resistance of the JFET, and increases the on-current of the JFET, thereby enhancing the overall performance of the JFET without decreasing the allowable Vds or dramatically increasing Voff/Vpinch.
摘要翻译：半导体衬底中的结型场效应晶体管（JFET）包括源极区，漏极区，沟道区，上部栅极区域和下部栅极区域。下栅极区域电连接到上栅极区域。上下栅极区域控制通过沟道区域的电流。通过执行将源极区域的厚度延伸到大于漏极区域的厚度的深度的离子注入步骤，形成非对称JFET。源极区域相对于漏极区域的深度的深度的扩展减小了少数电荷载流子穿过沟道区域的长度，减小了JFET的导通电阻，并增加了JFET的导通电流，由此提高JFET的整体性能，而不会降低容许的Vds或显着增加Voff / Vpinch。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式