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    • 34. 发明申请
    • ESD protection device
    • ESD保护装置
    • US20050207078A1
    • 2005-09-22
    • US11081705
    • 2005-03-17
    • Hsueh-Kun LiaoTao Cheng
    • Hsueh-Kun LiaoTao Cheng
    • H01L27/02H02H9/00
    • H01L27/0266
    • For maintaining the regular operating current in an inner circuit under electrostatic discharge (ESD) event, the present invention provides an ESD protection device to control an ESD path switch in the turned-on condition by employing a MOS device and a latch-detected turned-on circuit. The MOS device has a self-aligned silicidation (Salicide) therein. The present invention is used to stabilize operation efficiency and reduce the area of an ESD protection device without a silicide block disposed therein for enhancing the ESD protection capability.
    • 为了在静电放电(ESD)事件下保持内部电路中的正常工作电流,本发明提供一种ESD保护装置,通过采用MOS器件和锁存检测的转向开关来控制导通状态下的ESD路径开关, 上电路。 MOS器件中具有自对准硅化物(Salicide)。 本发明用于稳定运行效率并减小ESD保护装置的面积,而不会在其中设置硅化物块以提高ESD保护能力。
    • 35. 发明申请
    • Protection circuit for electro static discharge
    • 静电放电保护电路
    • US20050013073A1
    • 2005-01-20
    • US10838272
    • 2004-05-05
    • Tao ChengHsueh-Kun Liao
    • Tao ChengHsueh-Kun Liao
    • H01L23/60H01L27/02H02H9/00
    • H01L27/0285H01L27/0255H01L2924/0002H01L2924/00
    • An electro static discharge (ESD) protection circuit employing a field-effect transistor (FET) having no silicide block disposed thereon. It is connected with an internal circuit so as to prevent the internal circuit from the influence of an ESD event, wherein the internal circuit has at least a signal input end. The ESD protection circuit includes: an ESD clamp circuit for providing an ESD grounding path as an ESD occurs; and at least a pair of p-n junction diodes. The p-n junction diodes are stacked so that one of the p-n junction diodes has a n-type end coupled to the signal input end and the other one has a p-type end coupled to the signal input end as well. The ESD clamp circuit has at least a FET, whose drain has no silicide block disposed thereon.
    • 采用不设置硅化物块的场效应晶体管(FET)的静电放电(ESD)保护电路。 与内部电路连接,以防止内部电路受到ESD事件的影响,其中内部电路至少具有信号输入端。 ESD保护电路包括:用于提供ESD接地路径作为ESD发生的ESD钳位电路; 和至少一对p-n结二极管。 p-n结二极管被堆叠,使得p-n结二极管中的一个具有耦合到信号输入端的n型端,另一端具有耦合到信号输入端的p型端。 ESD钳位电路至少具有FET,其漏极没有设置在其上的硅化物块。
    • 36. 发明授权
    • Use of a capping layer to reduce particle evolution during sputter pre-clean procedures
    • 在溅射预清洁过程中使用覆盖层来减少颗粒的发生
    • US06531382B1
    • 2003-03-11
    • US10140662
    • 2002-05-08
    • Tao ChengWen-Hsin HuangJiun-Pyng YouLin-June WuShih-Tzung ChangMing-Jei LeeChun-Chang ChenYu-Ku LinTong-Hua KuanYing-Lang Wang
    • Tao ChengWen-Hsin HuangJiun-Pyng YouLin-June WuShih-Tzung ChangMing-Jei LeeChun-Chang ChenYu-Ku LinTong-Hua KuanYing-Lang Wang
    • H01L213205
    • H01L21/76802H01L21/76838
    • A process for preparing a surface of a lower level metal structure, exposed at the bottom of a sub-micron diameter opening, to allow a low resistance interface to be obtained when overlaid with an upper level metal structure, has been developed. A disposable, capping insulator layer is first deposited on the composite insulator layer in which the sub-micron diameter opening will be defined in, to protect underlying components of the composite insulator from a subsequent metal pre-metal procedure. After anisotropically defining the sub-micron diameter opening in the capping insulator, and composite insulator layers, and after removal of the defining photoresist shape, an argon sputtering procedure is used to remove native oxide from the surface of the lower level metal structure. In addition to native oxide removal the argon sputtering procedure, featuring a negative DC bias applied to the substrate, also removes the capping insulator layer from the top surface of the composite insulator layer. An in situ metal deposition then allows a clean interface to result between the overlying metal layer, and the underlying plasma treated, metal surface.
    • 已经开发了制备在亚微米直径开口的底部露出的下层金属结构的表面以允许在与上层金属结构重叠时获得低电阻界面的方法。 首先将一次性封盖绝缘体层沉积在复合绝缘体层上,在该复合绝缘层上将限定亚微米直径的开口,以保护复合绝缘子的下面的部件免于后续的金属预金属工艺。 在各向异性地限定封盖绝缘体中的亚微米直径开口和复合绝缘体层之后,并且在去除限定的光致抗蚀剂形状之后,使用氩溅射方法从下层金属结构的表面去除自然氧化物。 除了自然氧化物除去之外,具有施加到衬底的负DC偏压的氩溅射工艺也从复合绝缘体层的顶表面去除封盖绝缘体层。 原位金属沉积然后允许在上覆的金属层和下面的等离子体处理的金属表面之间产生干净的界面。
    • 38. 发明授权
    • Generating synonyms based on query log data
    • 根据查询日志数据生成同义词
    • US09092517B2
    • 2015-07-28
    • US12235635
    • 2008-09-23
    • Stelios PaparizosTao ChengHady W. Lauw
    • Stelios PaparizosTao ChengHady W. Lauw
    • G06F17/30
    • G06F17/30737
    • An approach is described for generating synonyms to supplement at least one information item, such as, in one case, a set of related items. The approach can involve an expansion phase, a clean-up phase, and a reduction phase. In the expansion phase, the approach identifies, for each related item, a set of initial synonym candidates. In the clean-up phase, the approach removes noise from the set of initial synonym candidates (if such noise exists), to provide a set of filtered synonym candidate items. In the reduction phase, the approach ranks and applies a threshold (or thresholds) to the set of filtered synonym candidate items, to generate, for each information item, a set of selected synonyms. The approach uses query log data at various points in its operation. The selected synonyms can be used to improve the effectiveness of user searches.
    • 描述了用于生成同义词以补充至少一个信息项(例如,一种情况下)一组相关项目的方法。 该方法可以涉及扩张阶段,清理阶段和减少阶段。 在扩展阶段,该方法为每个相关项目确定一组初始同义词候选。 在清理阶段,该方法从一组初始同义词候选中消除噪声(如果存在这种噪声),以提供一组过滤的同义词候选项。 在缩减阶段,该方法排列并将阈值(或阈值)应用于经过筛选的同义词候选项集合,以针对每个信息项生成一组所选择的同义词。 该方法在其操作的各个点使用查询日志数据。 所选择的同义词可用于提高用户搜索的有效性。