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    • 34. 发明授权
    • Analytical system or kit for phosphatase
    • 磷酸酶分析系统或试剂盒
    • US5529906A
    • 1996-06-25
    • US154354
    • 1993-11-18
    • Akiko ShimizuAkihiro ShinzakiTadao SuzukiMiwa Watanabe
    • Akiko ShimizuAkihiro ShinzakiTadao SuzukiMiwa Watanabe
    • C12Q1/42G01N33/535G01N33/53
    • C12Q1/42C12Q2326/96Y10S435/81Y10S435/975
    • A system or kit for analysis of phosphatase comprising a reagent I containing NADP or NADPH as a main component, and a reagent II containing components for color-development signal amplification utilizing NAD-NADH interconversion, wherein at least one of the hydrogen donors participating in the NAD-NADH interconversion is included in reagent I, but not in reagent II, which eliminates the necessity that the reagent II is further separated into two parts. This enables the preparation of reagent II as a mixture which can be readily used and which can be preserved for a long period of time without "reagent blank" occurring. Additionally, the present kit eliminates the necessity of mixing reagents I and II immediately before actual use and thus permits periodical analysis of samples with a reagent having the same components for long time periods with reliable and uniform sensitivity.
    • 一种用于分析磷酸酶的系统或试剂盒,其包含含有NADP或NADPH作为主要成分的试剂I和含有利用NAD-NADH相互转化的显色信号扩增成分的试剂II,其中至少一个氢供体参与 NAD-NADH相互转化包括在试剂I中,但不包括在试剂II中,这不需要将试剂II进一步分成两部分。 这使得可以制备试剂II作为混合物,其可以容易地使用并且可以长时间保存而没有发生“试剂空白”。 另外,本试剂盒消除了在实际使用之前混合试剂I和II的必要性,因此允许用具有相同组分的试剂在长时间段内具有可靠和均匀的灵敏度的定期分析。
    • 37. 发明授权
    • Analogue to digital converter
    • 模数转换器
    • US4649372A
    • 1987-03-10
    • US556710
    • 1983-11-25
    • Miki AbeTadao Suzuki
    • Miki AbeTadao Suzuki
    • H03M1/52H03M1/00H03K13/02
    • H03M1/1225H03M1/162H03M1/52
    • An analogue to digital converter comprises first and second switches (21:26) for sampling alternately first and second analogue signals, respectively, first and second integrators (22:27) which are supplied with the first and second analogue signals sampled alternately by the first and second switches (21:26), respectively, and produce output voltages varying in response to the first and second analogue signals supplied thereto, a constant current source section (32) operative to supply with a constant current to the first integrator (22) when the first switch (21) is in the OFF state and to the second integrator (27) when the second switch (26) is in the OFF state, and a digital signal generating section (34, 35) which is supplied alternately with comparison outputs obtained by comparing the output voltages of the first and second integrators derived therefrom when the constant current is supplied thereto with a predetermined voltage, respectively, and produces a digital signal corresponding to a duration defined by an instant at which the constant current source section commences supplying the constant current to either the first or second integrator and an instant at which the output voltage of either the first or second integrator, to which the constant current is supplied, reaches the level of the predetermined voltage.
    • PCT No.PCT / JP83 / 00090 Sec。 371日期:1983年11月25日 102(e)1983年11月25日日期PCT提交1983年3月25日PCT公布。 公开号WO83 / 03501 日期:1983年10月13日。模数转换器包括用于分别对第一和第二模拟信号进行采样的第一和第二开关(21:26),第一和第二积分器(22:27)被提供有第一和第二 分别由第一和第二开关(21:26)交替采样的模拟信号,并且产生响应于提供给其的第一和第二模拟信号而变化的输出电压;恒定电流源部分(32),用于提供恒定电流 当第二开关(26)处于关闭状态时,当第一开关(21)处于断开状态时,到第一积分器(22)和第二积分器(27),以及数字信号产生部分 ),其分别通过比较输出而获得的比较输出,所述比较输出通过比较从其中提供恒定电流时得到的第一和第二积分器的输出电压到达预定电压,并产生二 对应于由恒定电流源部分开始向第一或第二积分器提供恒定电流的瞬间所定义的持续时间和第一或第二积分器的输出电压的瞬时信号,恒定电流 被提供,达到预定电压的电平。
    • 38. 发明授权
    • Digital gain control apparatus
    • 数字增益控制装置
    • US4363001A
    • 1982-12-07
    • US171454
    • 1980-07-23
    • Tadao SuzukiTadao Yoshida
    • Tadao SuzukiTadao Yoshida
    • H03G3/02H03G1/02H03G3/00H03G5/04H03G9/14
    • H03G5/04H03G1/02H03G3/00H03G3/001
    • A digital gain control apparatus includes a digital control signal generator producing a plurality of serial-binary coded signals, a clock pulse signal and a strobe signal. A shift register is supplied with the plurality of serial-binary coded signals and the clock pulse signal from the digital control signal generator. A latch circuit is connected to the output of the shift register and is supplied with the strobe signal from the digital control signal generator to convert the plurality of serial-binary coded signals into a plurality of parallel-binary coded signals. A decoder is connected to the output of the latch circuit to produce a plurality of control signals from the plurality of parallel-binary coded signals. A function selector circuit and a volume adjusting circuit for the selected functions is also provided, each being controlled by the plurality of control signals. The shift register, latch circuit and volume adjusting circuit are formed in one chip-integrated circuit. In one embodiment, a bass and treble tone control circuit is provided which is controlled by the output of the decoder.
    • 数字增益控制装置包括产生多个串行二进制编码信号的数字控制信号发生器,时钟脉冲信号和选通信号。 移位寄存器被提供有来自数字控制信号发生器的多个串行二进制编码信号和时钟脉冲信号。 锁存电路连接到移位寄存器的输出端,并从数字控制信号发生器提供选通信号,将多个串行二进制编码信号转换成多个并行二进制编码信号。 解码器连接到锁存电路的输出,以产生来自多个并行二进制编码信号的多个控制信号。 还提供了用于所选功能的功能选择器电路和音量调节电路,每个功能选择器电路和音量调节电路由多个控制信号控制。 移位寄存器,锁存电路和音量调节电路形成在一个芯片集成电路中。 在一个实施例中,提供了由解码器的输出控制的低音和高音音调控制电路。
    • 40. 发明授权
    • Unbalanced DC voltage detecting circuit
    • 不平衡直流电压检测电路
    • US4184187A
    • 1980-01-15
    • US926030
    • 1978-07-19
    • Tadao Suzuki
    • Tadao Suzuki
    • H03F1/00H03F1/42H03F1/52H03F3/30H04R3/00H02H3/20
    • H03F3/30H03F1/52
    • An unbalanced DC voltage detecting circuit which includes first and second switching transistors with one connected to the output terminal of a power amplifier through a low pass filter and the other connected to the output terminal through a DC level shifting device and the low pass filter with the outputs of the first and second transistors connected to a third switching transistor which controls current to a relay such that when said third transistor is turned off, the relay is deenergized to open a circuit to a load. The first and second transistors are controlled by unbalanced DC voltage which exceeds predetermined levels.A second embodiment includes temperature control to prevent overheating.
    • 一种不平衡直流电压检测电路,其包括第一和第二开关晶体管,其一个通过低通滤波器连接到功率放大器的输出端子,另一个通过直流电平移位装置连接到输出端子,低通滤波器具有 连接到第三开关晶体管的第一和第二晶体管的输出,该第三开关晶体管将电流控制到继电器,使得当所述第三晶体管截止时,继电器被断电以将电路打开到负载。 第一和第二晶体管由超过预定电平的不平衡直流电压控制。 第二实施例包括防止过热的温度控制。