专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US07692451B2 Open-drain output circuit 有权
标题翻译：开漏输出电路
公开(公告)号：US07692451B2
公开(公告)日：2010-04-06
申请号：US11710941
申请日：2007-02-27
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： H03K19/094
CPC分类号： H03K19/0185
摘要： A pulse generation section generates a pulse which is at H-level for the predetermined period of time from the timing of the input signal DATA changing to L-level. A main output section outputs a signal of L-level with transistors P1, N1, and N2 turned ON, while the pulse generation section outputs a pulse. When the pulse falls, the transistors P1 and N1 are turned OFF, and a potential of an output node is held at L-level by resistors of a L-level holding section.
摘要翻译：脉冲发生部从输入信号DATA变更为L电平的时刻起，在规定时间内生成处于H电平的脉冲。主输出部分在晶体管P1，N1和N2导通时输出L电平的信号，而脉冲产生部分输出脉冲。当脉冲下降时，晶体管P1和N1截止，输出节点的电位由L电平保持部分的电阻器保持在L电平。

32. 发明授权

US07580307B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US07580307B2
公开(公告)日：2009-08-25
申请号：US11773152
申请日：2007-07-03
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C2211/4061
摘要： An apparatus a counter, storage units for storing count values interrupted by a row address whose refresh period is subject to change; comparator circuits for comparing the counter outputs and the contents of the storage units to each other as to whether or not the counter outputs coincide with the contents of the storage units; a holding circuit for setting an output hit signal to an active state when a coincidence signal is output from the comparator circuits and for resetting the hit signal to an inactive state in the next following clock cycle; a circuit performing control for not propagating a refresh clock signal to the counter when the hit signal is in an active state and for propagating the refresh clock signal to the counter when the hit signal is in an inactive state; a circuit for replacing an output of the counter by a row address which changes part of the counter output when the hit signal is in an activate state to replace the counter output with the row address whose refresh period is subject to change to output the row address whose refresh period is subject to change as a refresh address.
摘要翻译：一种计数器装置，用于存储由刷新周期变化的行地址中断的计数值的存储单元; 比较电路，用于将计数器输出和存储单元的内容彼此比较，以便计数器输出是否与存储单元的内容一致; 保持电路，用于当从比较器电路输出一致信号时将输出命中信号设置为有效状态，并在下一个后续时钟周期将命中信号复位为无效状态; 执行控制，用于当所述命中信号处于活动状态时不向所述计数器传播刷新时钟信号，并且当所述命中信号处于非活动状态时将所述刷新时钟信号传播到所述计数器; 一个电路，用于当命中信号处于激活状态时改变计数器输出的一部分的行地址替换计数器的输出，以用刷新周期改变的行地址替换计数器输出以输出行地址刷新周期可能会随刷新地址而变化。

33. 发明授权

US07502710B2 Temperature detection circuit 失效
标题翻译：温度检测电路
公开(公告)号：US07502710B2
公开(公告)日：2009-03-10
申请号：US11709191
申请日：2007-02-22
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G01K11/00 , G01K7/00
CPC分类号： G01K3/005 , G01K7/01
摘要： First and second reference-potential generator units output first and second reference potentials V1 and V7, respectively, which correspond to first and second specific temperatures to be detected. An intermediate-potentials generator unit divides the potential difference between the reference potential V1 and the reference potential V7 to output intermediate potentials through nodes N2 to N6. A temperature-dependant-potential generator unit outputs the forward voltage drop of a diode which varies depending on the ambient temperature. A comparator compares one of the potentials of nodes N1 to N7 selected by a selector against the potential output by the temperature-dependant-potential generator unit and outputs the result of the comparison indicating the range of the ambient temperature.
摘要翻译：第一和第二参考电位发生器单元分别输出与要检测的第一和第二特定温度相对应的第一和第二参考电位V1和V7。中间电位发生器单元将参考电位V1和参考电位V7之间的电位差除以通过节点N2至N6输出中间电位。温度依赖电位发生器单元输出二极管的正向压降，这取决于环境温度而变化。比较器将由选择器选择的节点N1至N7的电位中的一个与温度依赖电位发生器单元的电位输出进行比较，并输出表示环境温度范围的比较结果。

34. 发明申请

US20080265956A1 Semiconductor device having input circuits activated by clocks having different phases 有权
公开(公告)号：US20080265956A1
公开(公告)日：2008-10-30
申请号：US12213817
申请日：2008-06-25
申请人： Toru Ishikawa , Kunihiko Katou
发明人： Toru Ishikawa , Kunihiko Katou
IPC分类号： H03L7/00
CPC分类号： G11C7/1078 , G11C7/1087
摘要： Input circuits connected to an external input terminal PAD via resistor elements are activated in response to the level transition of the clock signals supplied thereto for accepting input signals. In order to input signals applied to the external input terminal PAD clock signals having different phases are supplied to the respective input circuits. The cycle time of each one input circuit can be made longer by sequentially assigning the serial data supplied to the external input terminals in response to the clock signals having different clock signals. Since the input circuits are isolated from each other by means of the resistor elements, the influence of the kick back signal which occurs at first stage of each the input circuit upon the other input circuit can be made very small.

35. 发明申请

US20060198207A1 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US20060198207A1
公开(公告)日：2006-09-07
申请号：US11365857
申请日：2006-03-02
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G11C7/10
CPC分类号： G11C11/406 , G11C2211/4061
摘要： Disclosed is an apparatus a counter, storage units for storing count values interrupted by a row address whose refresh period is subject to change; comparator circuits for comparing the counter outputs and the contents of the storage units to each other as to whether or not the counter outputs coincide with the contents of the storage units; a holding circuit for setting an output hit signal to an active state when a coincidence signal is output from the comparator circuits and for resetting the hit signal to an inactive state in the next following clock cycle; a circuit performing control for not propagating a refresh clock signal to the counter when the hit signal is in an active state and for propagating the refresh clock signal to the counter when the hit signal is in an inactive state; a circuit for replacing an output of the counter by a row address which changes part of the counter output when the hit signal is in an activate state to replace the counter output with the row address whose refresh period is subject to change to output the row address whose refresh period is subject to change as a refresh address.
摘要翻译：公开了一种计数器的装置，用于存储由刷新周期变化的行地址中断的计数值的存储单元; 比较电路，用于将计数器输出和存储单元的内容彼此比较，以便计数器输出是否与存储单元的内容一致; 保持电路，用于当从比较器电路输出一致信号时将输出命中信号设置为有效状态，并在下一个后续时钟周期将命中信号复位为无效状态; 执行控制，用于当所述命中信号处于活动状态时不向所述计数器传播刷新时钟信号，并且当所述命中信号处于非活动状态时将所述刷新时钟信号传播到所述计数器; 一个电路，用于当命中信号处于激活状态时改变计数器输出的一部分的行地址替换计数器的输出，以用刷新周期改变的行地址替换计数器输出以输出行地址刷新周期可能会随刷新地址而变化。

36. 发明申请

US20060125541A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20060125541A1
公开(公告)日：2006-06-15
申请号：US11296287
申请日：2005-12-08
申请人： Toru Ishikawa , Kunihiko Katou
发明人： Toru Ishikawa , Kunihiko Katou
IPC分类号： G06F1/04
CPC分类号： G11C7/1078 , G11C7/1087
摘要： To stably operate a semiconductor device comprising a plurality of input circuits which are connected to one external input terminal. Input circuits 10, 11, 12, 13 connected to an external input terminal PAD via resistor elements R1, R2, R3, R4, respectively, are activated in response to the level transition of the clock signals CK10, CK11, CK12, CK13 supplied thereto for accepting input signals. In order to input signals applied to the external input terminal PAD clock signals having different phases are supplied to the respective input circuits. The cycle time of each one input circuit can be made longer by sequentially assigning the serial data supplied to the external input terminals in response to the clock signals having different clock signals. Since the input circuits are isolated from each other by means of the resistor elements R1, R2, R3, R4, the influence of the kick back signal which occurs at first stage of each the input circuit upon the other input circuit can be made very small.
摘要翻译：为了稳定地操作包括连接到一个外部输入端子的多个输入电路的半导体器件。分别经由电阻元件R 1，R 2，R 3，R 4连接到外部输入端子PAD的输入电路10,11,12,13响应于时钟信号CK10，CK11的电平转换而被激活，CK12，CK13，供接收输入信号。为了输入施加到外部输入端子的信号，将具有不同相位的时钟信号提供给各个输入电路。通过响应于具有不同时钟信号的时钟信号顺序分配提供给外部输入端的串行数据，可以使每个输入电路的周期时间更长。由于输入电路通过电阻元件R 1，R 2，R 3，R 4彼此隔离，所以在每个输入电路的第一级发生的反冲信号对另一输入电路的影响可以做得很小

37. 发明申请

US20050109311A1 Fuel injection method of internal combustion engine, fuel injection valve of the same, and internal combustion engine 失效
标题翻译：内燃机燃油喷射方式，燃油喷射阀及内燃机
公开(公告)号：US20050109311A1
公开(公告)日：2005-05-26
申请号：US10962753
申请日：2004-10-13
申请人： Motoyuki Abe , Noriyuki Maekawa , Takuya Shiraishi , Hiroshi Fujii , Mamoru Fujieda , Toru Ishikawa , Yoshiyuki Tanabe
发明人： Motoyuki Abe , Noriyuki Maekawa , Takuya Shiraishi , Hiroshi Fujii , Mamoru Fujieda , Toru Ishikawa , Yoshiyuki Tanabe
IPC分类号： F02B23/10 , F02B3/02 , F02M61/14 , F02M61/16 , F02M61/18 , F02M69/04
CPC分类号： F02M61/1806 , F02M61/14 , F02M61/162 , F02M69/045
摘要： In order to provide a fuel injection method of an internal combustion engine having higher combustion stability which can direct a part of concentrated fuel spray toward an ignition plug according to a fuel injection atmosphere, a fuel injection valve thereof, and an internal combustion engine, the present invention provides a fuel injection method of an internal combustion engine for injecting fuel so as to generate a part of high spray concentration and a part of low spray concentration on the cross section of spray by giving swirling force to fuel from an injection hole at the front end of a fuel injection valve, comprising the step of setting a reference indicating the position of a axis of the fuel injection valve indicating the injection direction of the part of high spray concentration in the rotational direction when fuel is injected into an atmosphere under the atmospheric pressure.
摘要翻译：为了提供具有较高燃烧稳定性的内燃机的燃料喷射方法，其能够根据燃料喷射气体，其燃料喷射阀和内燃机将一部分浓缩燃料喷射引向火花塞，本发明提供了一种用于喷射燃料的内燃机的燃料喷射方法，以便在喷雾截面上产生一部分高喷雾浓度和一部分低喷雾浓度，该喷射浓度和一部分喷雾浓度通过从喷射孔中的喷射孔向燃料施加旋动力燃料喷射阀的前端包括以下步骤：当燃料喷射到下面的气氛中时，将指示燃料喷射阀的轴的位置的参考指示指示喷射高浓度部分的喷射方向的部分在旋转方向上的步骤气压。

38. 发明申请

US20050098651A1 Fuel injection valve with restriction wall, and internal combustion engine equipped therewith 有权
标题翻译：具有限制壁的燃油喷射阀和配备有内燃机的内燃机
公开(公告)号：US20050098651A1
公开(公告)日：2005-05-12
申请号：US11022787
申请日：2004-12-28
申请人： Motoyuki Abe , Yoshio Okamoto , Yuzo Kadomukai , Makoto Yamakado , Ayumu Miyajima , Hiromasa Kubo , Toru Ishikawa , Yasuo Namaizawa
发明人： Motoyuki Abe , Yoshio Okamoto , Yuzo Kadomukai , Makoto Yamakado , Ayumu Miyajima , Hiromasa Kubo , Toru Ishikawa , Yasuo Namaizawa
IPC分类号： F02M51/06 , F02M51/08 , F02M61/16 , F02M61/18 , F02M69/46 , F02M47/02 , F02M39/00 , F02M59/00 , F02M61/00
CPC分类号： F02M61/162 , F02M51/0671 , F02M61/1806 , Y10S239/90
摘要： Using a swirl type fuel injection valve, a concentrated spray area and a thin spray area are formed, the positions thereof are adjusted, and the spray is made to conform to the geometric shape of the engine and mounting position of the fuel injection valve, so as to reduce the fuel consumption and control the unburnt components in exhaust gas. The fuel injection valve is so constructed that a step is formed on the injection hole opening of the fuel injection valve, so as to provide two or more edge transition portions at the injection hole opening, resulting from the step, and the line connecting the edge transition portions forms an oblique angle relative to the wall formed by the step perpendicular to the injection hole center axis and the angled wall.
摘要翻译：使用旋流式燃料喷射阀，形成浓缩喷射区域和薄喷雾区域，调节其位置，并使喷雾符合发动机的几何形状和燃料喷射阀的安装位置，因此以减少燃料消耗并控制废气中的未燃组分。燃料喷射阀构造成在燃料喷射阀的喷射孔开口上形成台阶，从而在喷射孔开口处形成两个或更多个边缘过渡部分，并且连接边缘过渡部分相对于由垂直于喷射孔中心轴线和倾斜壁的台阶形成的壁形成倾斜角。

39. 发明授权

US06392951B2 Semiconductor storage device 有权
标题翻译：半导体存储设备
公开(公告)号：US06392951B2
公开(公告)日：2002-05-21
申请号：US09813684
申请日：2001-03-20
申请人： Shiro Fujima , Toru Ishikawa
发明人： Shiro Fujima , Toru Ishikawa
IPC分类号： G11C800
CPC分类号： G11C5/147 , G11C7/06 , G11C8/12
摘要： A semiconductor storage device (100) is disclosed that includes sense amplifier rows (SA0 to SA16) that receive a common sense amplifier drive voltage VINTA supplied by a internal voltage driver (5) having a high current source mode. According to one embodiment, the semiconductor storage device (100) may include banks of memory cells (B0 to B15), row decoders (DC0 to DC15), bank enable generation circuits (EC0 to EC15), sense amplifier rows (SA0 to SA16), sense amplifier drivers (DRA0 to DRA16), sense amplifier control circuits (SCA0 to SCA16), and internal voltage drivers (5 and 6). Internal voltage driver (5) can include a high current source or high voltage source mode, which can be received by a sense amplifier row (SA0 to SA16) during predetermined initial sense period. Other sense amplifier rows (SA0 to SA16) having already sensed data can be isolated from internal voltage driver (5) during the high current source or high voltage source mode.
摘要翻译：公开了一种半导体存储装置（100），其包括接收由具有高电流源模式的内部电压驱动器（5）提供的公共感测放大器驱动电压VINTA的读出放大器行（SA0至SA16）。根据一个实施例，半导体存储装置（100）可以包括存储单元组（B0至B15），行解码器（DC0至DC15），组使能生成电路（EC0至EC15），读出放大器行（SA0至SA16），读出放大器驱动器（DRA0至DRA16），读出放大器控制电路（SCA0至SCA16）和内部电压驱动器（5和6）。内部电压驱动器（5）可以包括高电流源或高电压源模式，其可以在预定的初始感测周期期间由读出放大器行（SA0至SA16）接收。已经感测到的数据的其他读出放大器行（SA0至SA16）可以在高电流源或高电压源模式期间与内部电压驱动器（5）隔离。

40. 发明授权

US5463592A Dynamic random access memory device having word line intermittently driven to active level 失效
标题翻译：具有间断地驱动到活动电平的字线的动态随机存取存储器件
公开(公告)号：US5463592A
公开(公告)日：1995-10-31
申请号：US98796
申请日：1993-07-29
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G11C11/401 , G11C11/407 , G11C11/4076 , G11C11/408 , G11C8/00 , G11C7/00
CPC分类号： G11C11/4076 , G11C11/4085
摘要： A word line driver incorporated in a dynamic/random access memory device drives a word line over a power voltage level with a first pulse signal until development of potential differences indicative of data bits on bit line pairs and with a second pulse signal before restoring the data bits into memory cells, and the word line is maintained in a low voltage level between the first and second pulse signals so as to save electric power consumption.
摘要翻译：结合在动态/随机存取存储器件中的字线驱动器通过第一脉冲信号在电源电压电平上驱动字线，直到在恢复数据之前产生指示位线对上的数据位和第二脉冲信号的电位差位到存储单元中，并且字线在第一和第二脉冲信号之间保持在低电压电平，以便节省电力消耗。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式