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31. 发明申请

US20080256422A1 Apparatus for Providing Error Correction Capability to Longitudinal Position Data 有权
公开(公告)号：US20080256422A1
公开(公告)日：2008-10-16
申请号：US12141960
申请日：2008-06-19
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
IPC分类号： H03M13/13 , G06F11/10
CPC分类号： G11B20/1201 , G11B20/18 , G11B20/1866 , G11B20/20 , G11B2020/1282 , G11B2020/1284 , G11B2220/90
摘要： A method and apparatus for providing error correction capability to longitudinal position data are disclosed. Initially, data are encoded via a set of even LPOS words and a set of odd LPOS words. The encoded data are then decoded by generating a set of syndrome bits for each of the LPOS words. A determination is then made as to whether or not there is an error within one of the LPOS words based on its corresponding syndrome bits.

32. 发明授权

US06222879B1 Self contained equalization method and apparatus 有权
标题翻译：自包含均衡方法和装置
公开(公告)号：US06222879B1
公开(公告)日：2001-04-24
申请号：US09144165
申请日：1998-08-31
申请人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , John J. Stephenson
发明人： Roy D. Cideciyan , Jonathan D. Coker , Evangelos S. Eleftheriou , Richard L. Galbraith , John J. Stephenson
IPC分类号： H04B1500
CPC分类号： H04L25/03038 , G11B20/10009 , G11B20/10037 , G11B20/10055 , H04L2025/03477 , H04L2025/03617
摘要： A method and apparatus for automating the convergence of tap weights in an equalizer for a data channel is disclosed. The automated equalization method is contained within the channel and obtains a temporary copy of each of a plurality of current tap weights from a current tap weight memory, determines a direction for modifying the temporary copy of each of the plurality of current tap weights, constrains the modifications to the temporary copy of each of the plurality of current tap weights to produce adjusted tap weights and at the end of a read operation, stores the adjusted tap weights to the current tap weight memory for use during a next read operation. The sign—sign LMS products for each of the plurality of current tap weights is calculated, the sign—sign LMS products for each of the plurality of current tap weights is summed to produce a count and the count for each of the plurality of current tap weights is compared to a threshold produce a desired tap direction indicator for each of the plurality of current tap weights. The desired tap direction comprises a positive value if the count is more positive than the threshold and a negative value is if the count is more negative than the threshold. The summing further includes incrementing the count by +1 if the sign product is positive and by −1 if the sign product is negative. The constraining further includes moving odd/even taps in pairs having opposite signs so that the sum of the odd/even taps is unchanged.
摘要翻译：公开了一种用于使用于数据信道的均衡器中的抽头权重的收敛自动化的方法和装置。自动均衡方法包含在信道内，并从当前抽头权重存储器中获得多个当前抽头权重中的每一个的临时副本，确定用于修改多个当前抽头权重中的每一个的临时拷贝的方向，约束对多个当前抽头权重中的每一个的临时拷贝的修改以产生调整的抽头权重，并且在读取操作结束时，将调整的抽头权重存储到当前抽头权重存储器中以在下一次读取操作期间使用。计算多个当前抽头权重中的每一个的符号LMS乘积，将用于多个当前抽头权重中的每一个的符号LMS乘积相加以产生计数，并且对于多个当前抽头中的每个当前抽头将权重与阈值进行比较，为多个当前抽头权重中的每一个生成期望的抽头方向指示符。如果计数比阈值更正，则期望的抽头方向包括正值，并且如果计数比阈值更负的则为负值。如果符号积为正，则求和进一步包括将+1加1，如果符号乘积为负。约束还包括成对地移动具有相反符号的奇数/偶数抽头，使得奇数/偶数抽头的总和不变。

33. 发明授权

US09170933B2 Wear-level of cells/pages/sub-pages/blocks of a memory 有权
标题翻译：存储器的单元/页/子页/块的磨损级别
公开(公告)号：US09170933B2
公开(公告)日：2015-10-27
申请号：US13700545
申请日：2011-06-06
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis , Roman Pletka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis , Roman Pletka
IPC分类号： G06F9/312 , G06F12/02 , G11C16/34
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/3495
摘要： A method for wear-leveling cells, pages, sub-pages or blocks of a memory such as a flash memory includes receiving (S10) a chunk of data to be written on the cell, page, sub-page or block of the memory; counting (S40), in the received chunk of data, a number of times a given type of binary data ‘0’ or ‘1’ is to be written; and distributing (S50) the writing of the received chunk of data among cells, pages, sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘1’ counted in the chunk of data to be written.
摘要翻译：一种用于对诸如闪速存储器的存储器的单元，页，子页或块进行磨损均衡的方法包括：接收（S10）要写入存储器的单元，页，子页或块的数据块; 在接收到的数据块中计数（S40）多少次给定类型的二进制数据“0”或“1”被写入; 并且分配（S50）在所述存储器的单元，页面，子页面或块之间写入所接收的数据块，以便相对于给定类型的二进制数据“0”的数量对存储器进行磨损级别 “1”计入要写入的数据块中。

34. 发明授权

US08495471B2 Solid-state storage system with parallel access of multiple flash/PCM devices 有权
标题翻译：具有并行访问多个闪存/ PCM设备的固态存储系统
公开(公告)号：US08495471B2
公开(公告)日：2013-07-23
申请号：US12627364
申请日：2009-11-30
申请人： Theodore A. Antonakopoulos , Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
发明人： Theodore A. Antonakopoulos , Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
IPC分类号： G11C29/00
CPC分类号： G06F11/1028 , G11C29/765
摘要： Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.
摘要翻译：提供了通过使用容错架构以及用于随机/突发错误校正的一个纠错码（ECC）机制来解决固态驱动器（SSD）中的故障存储集成电路（IC）的问题的系统和方法，以及 L折叠交织机制。当一个或多个集成电路出现故障并且允许从故障集成电路恢复先前存储的数据并且允许在其他操作集成电路中校正随机/突发错误时，本文描述的系统和方法保持SSD的可操作性。这些系统和方法用作为备用集成电路处理的全功能/可操作集成电路来代替故障集成电路。此外，这些系统和方法在最大可实现的读/写数据速率方面提高了I / O性能。

35. 发明申请

US20130166827A1 WEAR-LEVEL OF CELLS/PAGES/SUB-PAGES/BLOCKS OF A MEMORY 有权
标题翻译：细胞/页/子页面/记忆体的层数
公开(公告)号：US20130166827A1
公开(公告)日：2013-06-27
申请号：US13700545
申请日：2011-06-06
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis , Roman Pletka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis , Roman Pletka
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/3495
摘要： The invention is directed to a method for wear-leveling cells or pages or sub-pages or blocks of a memory such as a flash memory, the method comprising:—receiving (S10) a chunk of data to be written on a cell or page or sub-page or block of the memory;—counting (S40) in the received chunk of data the number of times a given type of binary data ‘0’ or ‘I’ is to be written; and—distributing (S50) the writing of the received chunk of data amongst cells or pages or sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘I’ counted in the chunk of data to be written.
摘要翻译：本发明涉及一种用于对诸如闪速存储器的存储器的单元格或页面或子页面或块进行磨损均衡的方法，所述方法包括： - 接收（S10）要写入单元或页面的数据块或存储器的子页面或块; - 在接收的数据块中记录给定类型的二进制数据“0”或“I”的次数（S40）; （S50）在存储器的单元格或页面或子页面或块之间写入所接收的数据块，以便相对于给定类型的二进制数据“0”的数量对存储器进行磨损级别或者“我”在要写入的数据块中计数。

36. 发明授权

US07813070B2 Error correction capability for longitudinal position data in a tape storage system 有权
标题翻译：磁带存储系统中纵向位置数据的纠错能力
公开(公告)号：US07813070B2
公开(公告)日：2010-10-12
申请号：US12033440
申请日：2008-02-19
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Paul J. Seger
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Paul J. Seger
IPC分类号： G11B5/09
CPC分类号： G11B20/1201 , G11B5/584 , G11B20/14 , G11B20/1833 , G11B2020/1281 , G11B2020/1284 , G11B2020/1287 , G11B2020/1484 , G11B2220/90 , G11B2220/93 , G11B2220/95
摘要： A longitudinal position (LPOS) word L(n) is encoded with error correction capability. The LPOS word includes a plurality of LPOS symbols L0(n) through Lk(n) calculated as L ⁡ ( n ) = ∑ i = 0 5 ⁢ L i ⁡ ( n ) ⁢ 14 i and representing a longitudinal position of a magnetic tape relative to a tape head in a tape storage system. A word type is determined in response to at least one of the plurality of LPOS symbols and, in response to the determined word type, at least one formatted symbol F(n) is generated from the plurality of LPOS symbols L(n). At least one parity symbol P(n) is generated from the formatted symbol F(n). The formatted and parity symbols are communicated to a servo channel of the tape storage system to be recorded onto a servo track of the magnetic tape. Adding redundancy to LPOS words provides the capability of correcting multiple bit errors without increasing the LPOS word length.
摘要翻译：纵向位置（LPOS）字L（n）被编码具有纠错能力。 LPOS字包括计算为L⁡（n）=Σi = 0 5 L i⁡（n）14 i的多个LPOS符号L0（n）至Lk（n），并表示磁带的纵向位置相对于磁带存储系统中的磁带头。响应于多个LPOS符号中的至少一个确定字类型，并且响应于所确定的字类型，从多个LPOS符号L（n）生成至少一个格式化符号F（n）。从格式化符号F（n）生成至少一个奇偶校验符号P（n）。格式化和奇偶校验符号被传送到磁带存储系统的伺服通道以被记录在磁带的伺服轨道上。向LPOS字添加冗余可提供校正多位错误而不增加LPOS字长度的能力。

37. 发明申请

US20090089645A1 DATA STORAGE SYSTEMS 审中-公开
标题翻译：数据存储系统
公开(公告)号：US20090089645A1
公开(公告)日：2009-04-02
申请号：US12058151
申请日：2008-03-28
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
IPC分类号： H03M13/00
CPC分类号： G11B20/1833
摘要： Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. The post processor regenerates the first error corrected bit stream in dependence on the pinning data received from the error correction decoder.
摘要翻译：用于在数据存储系统中解码数据的方法和装置。在操作中，检测器根据从数据存储系统的存储子系统接收的数据块产生输出位流。连接到检测器的后处理器根据输出比特流和数据块生成第一纠错比特流。连接到后处理器的纠错解码器根据第一纠错比特流产生第二纠错比特流，并且还根据第二纠错比特流产生校验和。在校验和指示第二纠错比特流中的错误并且校正的第二错误的情况下，反馈路径从错误校正解码器向后处理器提供钉扎指示第二纠错比特流中的正确比特的位置的数据位流包括至少一个正确的交错。后处理器根据从纠错解码器接收到的钉扎数据重新生成第一纠错比特流。

38. 发明授权

US07395482B2 Data storage systems 有权
标题翻译：数据存储系统
公开(公告)号：US07395482B2
公开(公告)日：2008-07-01
申请号：US10739966
申请日：2003-12-18
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： H03M13/00
CPC分类号： G11B20/1833
摘要： A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called precoding to the modulation encoded bit stream. However, this precoding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before precoding is applied by the precoder. The decoder subsystem operates in the inverse manner.
摘要翻译：数据存储系统包括编码器子系统，包括纠错码编码器，调制编码器和预编码器，以及类似地包括检测器，逆预编码器，调制解码器和纠错码解码器的解码器子系统。误差校正编码器对输入用户比特流应用纠错码，并且调制编码器将所谓的调制或约束编码应用于纠错编码比特流。预编码器将所谓的预编码应用于调制编码比特流。然而，该预编码仅应用于位流的选定部分。还可以存在一个置换步骤，其中在由预编码器施加预编码之前，该位序列在调制编码器之后被置换。解码器子系统以相反的方式运行。

39. 发明授权

US07193802B2 Apparatus for providing dynamic equalizer optimization 失效
标题翻译：用于提供动态均衡器优化的装置
公开(公告)号：US07193802B2
公开(公告)日：2007-03-20
申请号：US10809230
申请日：2004-03-25
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning , Michael J. Ross , David J. Stanek
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning , Michael J. Ross , David J. Stanek
IPC分类号： G11B5/09 , G11B5/035 , H03K5/139
CPC分类号： G11B5/035
摘要： An apparatus for providing dynamic equalizer optimization is disclosed. The present invention solves the above-described problems by providing equalizer coefficient updates that converge towards the same solution as the direct method without having to first write a known pattern to the disk or requiring any prior knowledge of the data already written on the disk. The adaptive cosine function may be used to modify only a DFIR tap set, only the j and k parameters of a cosine equalizer or to modify both the tap set for a DFIR filter and the j and k parameters of the cosine equalizer. Another algorithm, such as the LMS algorithm, may be used to modify parameters not modified by the cosine algorithm.
摘要翻译：公开了一种用于提供动态均衡器优化的装置。本发明通过提供均衡器系数更新来解决上述问题，所述均衡器系数更新收敛于与直接方法相同的解决方案，而不必首先将已知模式写入盘或需要任何已经写入盘中的数据的任何知识。自适应余弦函数可用于仅修改DFIR抽头集，仅修改余弦均衡器的j和k参数，或者修改DFIR滤波器的抽头集合和余弦均衡器的j和k参数。可以使用诸如LMS算法的另一种算法来修改未被余弦算法修改的参数。

40. 发明授权

US07071851B1 Techniques for implementing non-uniform constraints in modulation encoded data 失效
标题翻译：在调制编码数据中实现非均匀约束的技术
公开(公告)号：US07071851B1
公开(公告)日：2006-07-04
申请号：US11048597
申请日：2005-01-31
申请人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
发明人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426
摘要： Non-uniform modulation encoding techniques are provided to prevent data from containing bit patterns that are prone to errors during read back. Modulation encoding is performed on a data stream to remove error prone bit patterns. Unconstrained data, such as error check parity, that is inserted into the modulated data stream may contain error prone bit patterns. Stricter modulation constraints are enforced on bits that are next to the unconstrained data, than on the remaining bits. By enforcing stricter modulation constraints on these bits, an entire data bit stream can have a desired modulation constraint.
摘要翻译：提供非均匀调制编码技术以防止数据包含在回读期间容易出错的位模式。对数据流执行调制编码以消除容易出错的位模式。插入调制数据流的无约束数据（如错误校验奇偶校验）可能包含易错位模式。对于与无约束数据相邻的位，对其余位执行更严格的调制约束。通过对这些位执行更严格的调制约束，整个数据比特流可以具有期望的调制限制。

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