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31. 发明授权

US09557369B2 Integrated time dependent dielectric breakdown reliability testing 有权
标题翻译：集成时间依赖介质击穿可靠性测试
公开(公告)号：US09557369B2
公开(公告)日：2017-01-31
申请号：US13530782
申请日：2012-06-22
申请人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
发明人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
IPC分类号： G01R31/28 , G01R31/311
CPC分类号： G01R31/2855 , G01R31/281 , G01R31/2817 , G01R31/2858 , G01R31/2879 , G01R31/311
摘要： Methods for reliability testing include applying a stress voltage to a device under test (DUT); measuring a leakage current across the DUT; triggering measurement of optical emissions from the DUT based on the timing of the measurement of the leakage current; and correlating measurements of the leakage current with measurements of the optical emissions to determine a time and location of a defect occurrence within the DUT by locating instances of increased noise in the leakage current that correspond in time with instances of increased optical emissions.
摘要翻译：可靠性测试方法包括对被测设备（DUT）施加应力电压; 测量穿过DUT的漏电流; 基于泄漏电流测量的定时，触发DUT测量光发射; 并且将泄漏电流的测量与光发射的测量值相关联，以通过将泄漏电流中增加的噪声的实例定位在与增加的光发射的情况相对应的时间内来确定DUT内的缺陷发生的时间和位置。

32. 发明授权

US09448277B2 Integrated time dependent dielectric breakdown reliability testing 有权
标题翻译：集成时间依赖介质击穿可靠性测试
公开(公告)号：US09448277B2
公开(公告)日：2016-09-20
申请号：US13544080
申请日：2012-07-09
申请人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
发明人： Jifeng Chen , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
IPC分类号： G01R31/28 , G01R31/311
CPC分类号： G01R31/2855 , G01R31/281 , G01R31/2817 , G01R31/2858 , G01R31/2879 , G01R31/311
摘要： Systems for reliability testing include a picometer configured to measure a leakage current across a device under test (DUT); a camera configured to measure optical emissions from the DUT based on a timing of the measurement of the leakage current; and a test system configured to apply a stress voltage to the DUT and to correlate the leakage current with the optical emissions using a processor to determine a time and location of a defect occurrence within the DUT by locating instances of increased noise in the leakage current that correspond in time with instances of increased optical emissions.
摘要翻译：用于可靠性测试的系统包括配置成测量被测器件（DUT）上的漏电流的波长计; 配置为基于所述泄漏电流的测量的定时来测量来自所述DUT的光发射的照相机; 以及被配置为向DUT施加应力电压并且使用处理器将泄漏电流与光发射相关联的测试系统，以通过定位泄漏电流中增加的噪声的实例来确定DUT内的缺陷发生的时间和位置，在时间上对应于增加的光发射的情况。

33. 发明申请

US20140042442A1 RELIABLE PHYSICAL UNCLONABLE FUNCTION FOR DEVICE AUTHENTICATION 有权
标题翻译：用于设备认证的可靠的物理不可靠功能
公开(公告)号：US20140042442A1
公开(公告)日：2014-02-13
申请号：US13572245
申请日：2012-08-10
申请人： JOHN BRULEY , Vijay Narayanan , Dirk Pfeiffer , Jean-Oliver Plouchart , Peilin Song
发明人： JOHN BRULEY , Vijay Narayanan , Dirk Pfeiffer , Jean-Oliver Plouchart , Peilin Song
IPC分类号： H01L23/58 , H01L21/66
CPC分类号： H01L23/57 , G06F7/588 , G06F21/73 , G09C1/00 , H01L22/34 , H01L2924/0002 , H04L9/0866 , H01L2924/00
摘要： The present disclosure relates to a secure device having a physical unclonable function and methods of manufacturing such a secure device. The device includes a substrate and at least one high-k/metal gate device formed on the substrate. The at least one high-k/metal gate device represents the physical unclonable function. In some cases, the at least one high-k/metal gate device may be subjected a variability enhancement. In some cases, the secure device may include a measurement circuit for measuring a property of the at least one high-k/metal gate device.
摘要翻译：本公开涉及具有物理不可克隆功能的安全装置和制造这种安全装置的方法。该器件包括衬底和形成在衬底上的至少一个高k /金属栅极器件。至少一个高k /金属栅极器件表示物理不可克隆功能。在一些情况下，可以对至少一个高k /金属栅极器件进行可变性增强。在一些情况下，安全装置可以包括用于测量至少一个高k /金属门装置的特性的测量电路。

34. 发明授权

US08635582B2 Navigating analytical tools using layout software 有权
标题翻译：使用布局软件浏览分析工具
公开(公告)号：US08635582B2
公开(公告)日：2014-01-21
申请号：US13611776
申请日：2012-09-12
申请人： Franco Stellari , Peilin Song
发明人： Franco Stellari , Peilin Song
IPC分类号： G06F17/50 , G06F9/44 , G09G5/00
CPC分类号： G06F17/5081 , G06F17/5022 , G06F17/5036
摘要： A background process installs a system hook for message interception of integrated circuit chip layout display software. A call message is intercepted through the system hook, and current layout coordinates are read from the integrated circuit chip layout display software. A representation of the current layout coordinates is entered into tool control software configured to control a physical tool for analyzing integrated circuits, and the physical tool is controlled with the tool control software. In an “inverse” approach, a background process is used to install at least one system hook for message interception of tool control software configured to control a physical tool for analyzing integrated circuits, and a call message is intercepted through the system hook. Current coordinates are read from the tool control software. A representation of the current coordinates is entered into integrated circuit chip layout display software, and at least a portion of an integrated circuit layout is displayed.
摘要翻译：背景过程安装了用于消息拦截集成电路芯片布局显示软件的系统挂钩。通过系统挂钩截取通话消息，从集成电路芯片布局显示软件中读取当前布局坐标。将当前布局坐标的表示输入到被配置为控制用于分析集成电路的物理工具的工具控制软件中，并且物理工具由工具控制软件控制。在“反向”方法中，使用后台进程来安装至少一个用于消息拦截的系统钩子，用于控制用于分析集成电路的物理工具的工具控制软件，并且通过系统钩子拦截呼叫消息。从刀具控制软件读取当前坐标。将当前坐标的表示输入到集成电路芯片布局显示软件中，并且显示集成电路布局的至少一部分。

35. 发明申请

US20130345997A1 INTEGRATED TIME DEPENDENT DIELECTRIC BREAKDOWN RELIABILITY TESTING 有权
标题翻译：集成时间依赖电介质断开可靠性测试
公开(公告)号：US20130345997A1
公开(公告)日：2013-12-26
申请号：US13530782
申请日：2012-06-22
申请人： JIFENG CHEN , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
发明人： JIFENG CHEN , Dirk Pfeiffer , Thomas M. Shaw , Peilin Song , Franco Stellari
IPC分类号： G01R31/12 , G06F19/00
CPC分类号： G01R31/2855 , G01R31/281 , G01R31/2817 , G01R31/2858 , G01R31/2879 , G01R31/311
摘要： Methods for reliability testing include applying a stress voltage to a device under test (DUT); measuring a leakage current across the DUT; triggering measurement of optical emissions from the DUT based on the timing of the measurement of the leakage current; and correlating measurements of the leakage current with measurements of the optical emissions to determine a time and location of a defect occurrence within the DUT by locating instances of increased noise in the leakage current that correspond in time with instances of increased optical emissions.
摘要翻译：可靠性测试方法包括对被测设备（DUT）施加应力电压; 测量穿过DUT的漏电流; 基于泄漏电流测量的定时，触发DUT测量光发射; 并且将泄漏电流的测量与光发射的测量值相关联，以通过将泄漏电流中增加的噪声的实例定位在与增加的光发射的情况相对应的时间内来确定DUT内的缺陷发生的时间和位置。

36. 发明授权

US08412993B2 Self-adjusting critical path timing of multi-core VLSI chip 有权
标题翻译：多核VLSI芯片的自调节关键路径时序
公开(公告)号：US08412993B2
公开(公告)日：2013-04-02
申请号：US12788987
申请日：2010-05-27
申请人： Peilin Song , Franco Stellari
发明人： Peilin Song , Franco Stellari
IPC分类号： G01R31/28
CPC分类号： G01R31/31726 , G01R31/3187 , G06F1/10 , G06F11/2242
摘要： A method for adjusting timing of multiple cores within an integrated circuit includes selecting a reference core and a target core from among a plurality of cores of an integrated circuit. Self-test circuitry of the integrated circuit is used to generate a response signature for each of the reference core and the target core. The response signature of the reference core is compared with the response signature of the target core. A local clock buffer of the target core is adjusted until the response signature of the target core matches the response signature of the reference core.
摘要翻译：一种用于调整集成电路内的多个核心的定时的方法包括从集成电路的多个核心中选择参考核心和目标核心。集成电路的自检电路用于为每个参考核心和目标核心产生响应特征。将参考核心的响应签名与目标核心的响应签名进行比较。调整目标核心的本地时钟缓冲器，直到目标核心的响应签名与参考核心的响应签名相匹配。

37. 发明授权

US08331726B2 Creating emission images of integrated circuits 失效
标题翻译：创建集成电路的发射图像
公开(公告)号：US08331726B2
公开(公告)日：2012-12-11
申请号：US12493686
申请日：2009-06-29
申请人： Franco Stellari , Peilin Song
发明人： Franco Stellari , Peilin Song
IPC分类号： G06K9/00 , G06K9/64 , G06K9/36
CPC分类号： H04N5/33 , G01R31/303 , G06T7/32 , G06T2200/32 , G06T2207/10056 , G06T2207/30148 , H04N5/2259 , H04N5/2621 , H04N5/2625 , H04N5/2628 , H04N5/332
摘要： A method, system and computer program product are disclosed for creating an image from a device. In one embodiment, the method comprises acquiring first and second images from the device, said first and second images having overlapping portions, and estimating said overlapping portions to obtain an approximate shift amount to align approximately said first and second images. This method further comprises analyzing the overlapping portions, using a defined cross-correlation algorithm, to calculate a precise shift amount to align the first and second images; and using said precise shift amount to join the first and second images together. In one embodiment, an optical system is used to acquire the images, a stage is used to move either the device or the optical system to acquire the first and second images, and the estimating includes using movement of the stage to estimate the overlapping areas.
摘要翻译：公开了用于从设备创建图像的方法，系统和计算机程序产品。在一个实施例中，该方法包括从设备获取第一和第二图像，所述第一和第二图像具有重叠部分，并且估计所述重叠部分以获得近似偏移量以对准所述第一和第二图像。该方法还包括使用定义的互相关算法来分析重叠部分以计算精确偏移量以对齐第一和第二图像; 并且使用所述精确位移量将第一和第二图像连接在一起。在一个实施例中，使用光学系统来获取图像，阶段用于移动设备或光学系统以获取第一和第二图像，并且估计包括使用平台的运动来估计重叠区域。

38. 发明授权

US07635904B2 Apparatus and methods for packaging electronic devices for optical testing 失效
标题翻译：用于包装电子设备进行光学测试的装置和方法
公开(公告)号：US07635904B2
公开(公告)日：2009-12-22
申请号：US11085734
申请日：2005-03-21
申请人： Alberto Tosi , Franco Stellari , Peilin Song
发明人： Alberto Tosi , Franco Stellari , Peilin Song
IPC分类号： H01L31/0203
CPC分类号： G01R31/311 , G01R1/0408 , H01L25/16 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/00011 , H01L2924/00014 , H01L2924/3011 , H01L2224/0401
摘要： Apparatus and methods are provided for packaging IC (integrated circuit) chips to enable both optical access to the back side of an IC chip and electrical access to the front side of the IC chip.
摘要翻译：提供了用于封装IC（集成电路）芯片的装置和方法，以使得能够对IC芯片的背侧进行光学接入和对IC芯片的前侧的电接入。

39. 发明申请

US20090259321A1 System and Method for Virtual Control of Laboratory Equipment 失效
标题翻译：实验室设备虚拟控制系统与方法
公开(公告)号：US20090259321A1
公开(公告)日：2009-10-15
申请号：US12103554
申请日：2008-04-15
申请人： Franco Stellari , Steven E. Steen , Peilin Song
发明人： Franco Stellari , Steven E. Steen , Peilin Song
IPC分类号： G05B15/00
CPC分类号： G05B15/02 , G06F19/00
摘要： A system for virtual control of electronic laboratory equipment includes a local computer system. One or more items of electronic laboratory equipment are connected to the local computer system. Each item of electronic laboratory equipment has a physical control panel including one or more displays or controls. A virtual control panel generation unit generates a virtual control panel accessible from a remote computer system. The virtual control panel is substantially similar to the physical control panel in appearance. A command interpretation unit monitors interaction between the remote user and the virtual control panel and generates electronic laboratory equipment commands for exploiting the functionality of the electronic laboratory equipment.
摘要翻译：用于虚拟控制电子实验室设备的系统包括本地计算机系统。电子实验室设备的一个或多个项目连接到本地计算机系统。电子实验室设备的每个项目都有一个包括一个或多个显示器或控件的物理控制面板。虚拟控制面板生成单元生成可从远程计算机系统访问的虚拟控制面板。虚拟控制面板在外观上基本类似于物理控制面板。命令解释单元监视远程用户和虚拟控制面板之间的交互，并产生用于利用电子实验室设备的功能的电子实验室设备命令。

40. 发明申请

US20080079448A1 ENHANCED SIGNAL OBSERVABILITY FOR CIRCUIT ANALYSIS 有权
标题翻译：电路分析的增强信号可视性
公开(公告)号：US20080079448A1
公开(公告)日：2008-04-03
申请号：US11949325
申请日：2007-12-03
申请人： Chandler McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan Weger
发明人： Chandler McDowell , Stanislav Polonsky , Peilin Song , Franco Stellari , Alan Weger
IPC分类号： G01R31/303
CPC分类号： G01R31/311
摘要： Methods and arrangements to enhance photon emissions responsive to a signal within an integrated circuit (IC) for observability of signal states utilizing, e.g., picosecond imaging circuit analysis (PICA), are disclosed. Embodiments attach a beacon to the signal of interest and apply a voltage across the beacon to enhance photon emissions responsive to the signal of interest. The voltage is greater than the operable circuit voltage, Vd, the enhance photon emissions with respect to intensity and energy. Thus, the photon emissions are more distinguishable from noise. In many embodiments, the beacon includes a transistor and, in several embodiments, the beacon includes an enablement device to enable and disable photon emissions from the beacon. Further, a PICA detector may capture photon emissions from the beacon and process the photons to generate time traces.
摘要翻译：公开了利用例如皮秒成像电路分析（PICA）来增强响应于集成电路（IC）内的信号的信号状态的可观察性的光子发射的方法和装置。实施例将信标连接到感兴趣的信号，并在信标之间施加电压以增强响应于感兴趣的信号的光子发射。电压大于可操作电路电压Vd，相对于强度和能量增强光子发射。因此，光子发射与噪声更为区别。在许多实施例中，信标包括晶体管，并且在几个实施例中，信标包括启用和禁用来自信标的光子发射的启用装置。此外，PICA检测器可以捕获来自信标的光子发射并处理光子以产生时间迹线。

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