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31. 发明授权

US07486135B2 Configurable, variable gain LNA for multi-band RF receiver 有权
标题翻译：多频RF接收机的可配置可变增益LNA
公开(公告)号：US07486135B2
公开(公告)日：2009-02-03
申请号：US11754696
申请日：2007-05-29
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H03F1/14 , H03F3/68
CPC分类号： H03F1/26 , H03F1/223 , H03F1/30 , H03F1/52 , H03F1/56 , H03F3/191 , H03F3/72 , H03F2200/111 , H03F2200/222 , H03F2200/372 , H03F2200/429 , H03F2200/447 , H03F2200/456 , H03F2200/489 , H03F2200/492 , H03F2203/7206 , H03F2203/7209 , H03G1/0088 , H03G3/3036 , H03G3/3052
摘要： A configurable LNA architecture for a multi-band RF receiver front end comprises a bank of LNAs, each optimized to a different frequency band, wherein each LNA has a configurable topology. Each LNA comprises a plurality of amplifier stages, each stage including an RF transistor having a different width. The transistor widths in adjacent amplifier stages may be binary weighted, or may be sized to achieve a constant gain step. By selectively enabling and disabling RF transistors, the effective transistor width of the LNA can be controlled with a fine granularity. A DAC generates a bias voltage with a small quantization step, additionally providing a fine granularity of gain control. The LNAs are protected by overvoltage protection circuits which shield transistors from a supply voltage in excess of their breakdown voltage. A source degeneration inductor presents a real resistance at inputs of the LNAs, without introducing thermal noise.
摘要翻译：用于多频带RF接收器前端的可配置LNA架构包括一组LNA，每组优化为不同的频带，其中每个LNA具有可配置的拓扑。每个LNA包括多个放大器级，每个级包括具有不同宽度的RF晶体管。相邻放大器级中的晶体管宽度可以是二进制加权的，或者可以被设计成实现恒定的增益步长。通过选择性地启用和禁用RF晶体管，可以以细粒度控制LNA的有效晶体管宽度。 DAC产生具有小量化步长的偏置电压，另外提供细微的增益控制粒度。 LNA由过电压保护电路保护，该电路将晶体管屏蔽超过其击穿电压的电源电压。源退化电感器在LNA的输入端呈现实际电阻，而不引入热噪声。

32. 发明申请

US20080139149A1 Method and Apparatus for Receiving Radio Frequency Signals 有权
标题翻译：接收射频信号的方法和装置
公开(公告)号：US20080139149A1
公开(公告)日：2008-06-12
申请号：US11609399
申请日：2006-12-12
申请人： Fenghao Mu , Andreas T. Martensson , Magnus Nilsson
发明人： Fenghao Mu , Andreas T. Martensson , Magnus Nilsson
IPC分类号： H04B1/10 , H04B1/26
CPC分类号： H04B1/18 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/1483 , H03D7/165 , H03D7/166 , H03D2200/0023 , H03D2200/0025 , H03D2200/0043 , H03D2200/0088 , H03D2200/009
摘要： A frequency conversion receiver comprises a passive mixer, a Low-Noise Amplifier (LNA) and a balun. The low-noise amplifier generates an amplified single-ended signal responsive to a single-ended receiver input signal. The passive mixer generates a mixer output signal responsive to a differential mixer input signal and a four-phase local oscillator signal. The balun transforms the amplified singled-ended signal into the differential mixer input signal, the balun having a first winding coupled to an output of the low-noise amplifier and a second winding coupled to an input of the passive mixer, the second winding having more turns than the first winding. The turn ratio of the second winding to the first winding provides gain compensation to the low-noise amplifier, and in conjunction with the low-noise amplifier and the passive mixer, provides a desired gain to the receiver and linearity over a dynamic range of the receiver input signal.
摘要翻译：变频接收机包括无源混频器，低噪声放大器（LNA）和平衡 - 不平衡转换器。低噪声放大器响应于单端接收机输入信号产生放大的单端信号。无源混频器响应差分混频器输入信号和四相本地振荡器信号产生混频器输出信号。平衡不平衡变压器将放大的单端信号变换成差分混频器输入信号，平衡 - 不平衡转换器具有耦合到低噪声放大器的输出的第一绕组和耦合到无源混频器的输入的第二绕组，第二绕组具有更多比第一个绕组转。第二绕组与第一绕组的匝数比向低噪声放大器提供增益补偿，并且与低噪声放大器和无源混频器一起为接收器提供期望的增益，并且在动态范围内的线性度接收机输入信号。

33. 发明授权

US09020077B2 Correction of imbalances in a complex intermediate frequency mixer 有权
公开(公告)号：US09020077B2
公开(公告)日：2015-04-28
申请号：US13823774
申请日：2011-09-16
申请人： Lars Sundström , Fenghao Mu , Leif Wilhelmsson
发明人： Lars Sundström , Fenghao Mu , Leif Wilhelmsson
IPC分类号： H04L27/22 , H04B1/16 , H03D7/16 , H04B1/12
CPC分类号： H04L27/389 , H03D7/166 , H03D2200/0088 , H04B1/126 , H04L25/08
摘要： A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (α1, α2, δ2, δ1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (α1-out), a fourth gain output (δ1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (α2-out), the third gain output (δ2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.

34. 发明授权

US08965322B2 Low noise amplifier 有权
标题翻译：低噪声放大器
公开(公告)号：US08965322B2
公开(公告)日：2015-02-24
申请号：US13992804
申请日：2011-12-09
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H04B1/10 , H03F1/22 , H03F1/34 , H03F3/45 , H03F3/193
CPC分类号： H03F3/193 , H03F1/223 , H03F1/347 , H03F3/45179 , H03F2200/06 , H03F2200/09 , H03F2200/294 , H03F2200/541 , H03F2203/45386 , H03F2203/45394 , H03F2203/45516 , H03F2203/45522 , H03F2203/45528 , H03F2203/45544 , H03F2203/45554 , H03F2203/45591 , H03F2203/45621 , H03F2203/45631 , H03F2203/45638 , H03F2203/45662 , H03F2203/45731
摘要： A low noise amplifier comprises at least one amplifying transistor (Ts1; Ts2) configured in a common source configuration to receive an input signal (RFin) at a gate terminal and provide an amplified signal at a drain terminal and at least one feedback path arranged to couple a part of the amplified signal back to the gate terminal and comprising a feedback impedance. The low noise amplifier further comprises a self-coupled step-up transformer having at least one primary winding (Lp) connected to a supply voltage (Vdd) and the drain terminal of the at least one amplifying transistor and at least one self-coupled secondary inductor winding (Lf1; Lf2) arranged in the feedback path. The low noise amplifier provides a better suppression for out-band interference and at the same time it has a wider input match bandwidth, decent conversion gain and decent noise figure without increasing power consumption.
摘要翻译：低噪声放大器包括至少一个配置在公共源配置中的放大晶体管（Ts1; Ts2），用于在栅极端接收输入信号（RFin），并在漏极端提供放大信号，并将至少一个反馈通路布置成将放大的信号的一部分耦合回到栅极端并包括反馈阻抗。低噪声放大器还包括自耦合升压变压器，其具有连接到电源电压（Vdd）的至少一个初级绕组（Lp）和至少一个放大晶体管的漏极端子以及至少一个自耦合次级电感绕组（Lf1; Lf2）布置在反馈路径中。低噪声放大器为带外干扰提供更好的抑制，同时具有更宽的输入匹配带宽，良好的转换增益和体面的噪声系数，而不增加功耗。

35. 发明申请

US20140266506A1 Transformer Filter Arrangement 有权
标题翻译：变压器滤波器布置
公开(公告)号：US20140266506A1
公开(公告)日：2014-09-18
申请号：US14233063
申请日：2012-07-10
申请人： Stefan Andersson , Fenghao Mu , Johan Wernehag
发明人： Stefan Andersson , Fenghao Mu , Johan Wernehag
IPC分类号： H03H7/01
CPC分类号： H01F29/02 , H01F27/2804 , H01F27/343 , H01F27/42 , H03H7/0115 , H03H7/09 , H03H7/38 , H03H7/42 , H03H7/427 , H03H2001/0078 , H03H2007/013
摘要： A transformer filter arrangement (30) for passing signals at a fundamental frequency and suppressing signals at one or more interfering frequencies is disclosed. It comprises a transformer (100) having a first winding (110) and a second winding (120), wherein the first winding (110) has a first end (112a) and a second end (122b) and the second winding (120) has a first end (122a) and a second end (122b). It further comprises one or more capacitors (130a-e). For each capacitor (130a-c) of a first set of at least one capacitor of the one or more capacitors (130a-e), the capacitor (130a-c) is connected between a pair of taps (a1, a2; b1, b2; c1, c2) of the first winding (110), wherein each tap (a1, a2, b1, b2, c1, c2) of the pair of taps (a1, a2; b1, b2; c1, c2) is located between the first end (112a) and the second end (112b) of the first winding (110), and the capacitor (130a-c), together with an inductive sub segment (140a-c) of the first winding (110), which is connected in parallel with the capacitor (130a-c) between the pair of taps (a1, a2; b1, b2; c1, c2), forms a parallel LC circuit which is tuned to resonate at one of said interfering frequencies for suppressing signals at said one of the interfering frequencies. A corresponding integrated circuit, a corresponding radio receiver circuit, a corresponding radio transmitter circuit, and a corresponding radio communication apparatus are also disclosed.
摘要翻译：公开了一种用于以基本频率传递信号并以一个或多个干扰频率抑制信号的变压器滤波器装置（30）。它包括具有第一绕组（110）和第二绕组（120）的变压器（100），其中第一绕组（110）具有第一端（112a）和第二端（122b）和第二绕组（120）具有第一端（122a）和第二端（122b）。它还包括一个或多个电容器（130a-e）。对于一个或多个电容器（130a-e）中的至少一个电容器的第一组的每个电容器（130a-c），电容器（130a-c）连接在一对抽头（a1，a2; b1，（a1，a2; b1，b2; c1，c2）的每个抽头（a1，a2，b1，b2，c1，c2）位于第一绕组（110）的b2; c1，c2）在第一绕组（110）的第一端（112a）和第二端（112b）之间，以及电容器（130a-c）与第一绕组（110）的感应子段（140a-c）其与所述一对抽头（a1，a2; b1，b2; c1，c2）之间的电容器（130a-c）并联连接，形成并联LC电路，其被调谐为以所述干扰频率之一谐振以抑制在所述一个干扰频率处的信号。还公开了相应的集成电路，相应的无线电接收器电路，相应的无线电发射机电路和相应的无线电通信装置。

36. 发明授权

US08489040B2 Double clipped RF clock generation with spurious tone cancellation 有权
标题翻译：双重限幅RF时钟生成与杂音消除
公开(公告)号：US08489040B2
公开(公告)日：2013-07-16
申请号：US12708349
申请日：2010-02-18
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H04B1/04 , H04B1/10
CPC分类号： H03D7/166
摘要： A clock generator circuit generates a wanted RF clock signal by using an up-converter, a spurious tone cancellation circuit, a controller, and at least two clock driver/dividers. The spurious tone cancellation circuit includes a tone detection circuit and a tone generation circuit. The up-converter mixes modulation signals with local quadrature RF clock signals to create an up-converted signal having a frequency tone equal to a desired frequency of the wanted RF clock signal. The first clock driver/divider amplifies and clips the up-converted signal into a first-clipped clock signal. The tone detection circuit detects the amplitude and phase of unwanted tones of the first-clipped clock signal in the baseband domain and provides information to the controller, which controls the tone generation circuit to cancel the unwanted tones and create a compensated version of first-clipped clock signal. The second clock driver/divider further amplifies and clips the compensated version of first-clipped clock signal to generate the wanted RF clock signal.
摘要翻译：时钟发生器电路通过使用上变频器，伪噪声消除电路，控制器和至少两个时钟驱动器/分频器来产生所需的RF时钟信号。伪噪声消除电路包括音调检测电路和音调产生电路。上变频器将调制信号与本地正交RF时钟信号混合，以产生具有等于所需RF时钟信号的期望频率的频率音调的上变频信号。第一个时钟驱动器/分频器放大并将上变频信号剪辑成第一个削波的时钟信号。音调检测电路检测基带域中的第一限幅时钟信号的不需要的音调的幅度和相位，并向控制器提供信息，该控制器控制音调发生电路以消除不想要的音调并创建第一限幅时钟时钟信号。第二个时钟驱动器/分频器进一步放大和钳位补偿版本的第一个削波时钟信号，以产生所需的RF时钟信号。

37. 发明申请

US20130177113A1 Correction of Imbalances in a Complex Intermediate Frequency Mixer 有权
标题翻译：复杂中频混频器中的不平衡校正
公开(公告)号：US20130177113A1
公开(公告)日：2013-07-11
申请号：US13823774
申请日：2011-09-16
申请人： Lars Sundström , Fenghao Mu , Leif Wilhelmsson
发明人： Lars Sundström , Fenghao Mu , Leif Wilhelmsson
IPC分类号： H04B1/12
CPC分类号： H04L27/389 , H03D7/166 , H03D2200/0088 , H04B1/126 , H04L25/08
摘要： A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (α1, α2, δ2, δ1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (α1-out), a fourth gain output (δ1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (α2-out), the third gain output (δ2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.
摘要翻译：一种复合中频混频器（IFM），用于频率转换接收的复合中频IF，信号，其中所接收的复合IF信号包括位于0Hz的上侧和下侧的至少两个频带。复合中频混频器包括第一，第二，第三和第四混频器（M1，M2，M3，M4）。复合中频混频器还包括连接到第一，第二，第三和第四混频器输出（M1-out，M2-out，M3）的第一，第二，第三和第四增益调整组件（α1，α2，Δ2，Δ1） -out，M4-out）。此外，连接到第一增益输出（alpha1-out），第四增益输出（delta1-out）和第三混频器输出（M3-out）的第一求和单元（S1）被否定，以及第二加法单元（S2），连接到第二增益输出（alpha2-out），第三增益输出（delta2-out）和第四混频器输出（M4-out），被配置为输出所接收的复合IF信号的第一基带复信号。

38. 发明授权

US08175535B2 Active cancellation of transmitter leakage in a wireless transceiver 有权
标题翻译：在无线收发器中主动消除发射机泄漏
公开(公告)号：US08175535B2
公开(公告)日：2012-05-08
申请号：US12038487
申请日：2008-02-27
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H04B1/00 , H04B17/00 , H04B1/10
CPC分类号： H04B1/525 , H03F1/02 , H03F3/24 , H04B1/123 , H04B1/126 , H04B2001/045
摘要： Active transmitter leakage cancellation techniques are disclosed, for reducing transmitter leakage in a frequency-duplexing radio transceiver. Reducing transmitter leakage to the receiver path of a duplex transceiver eases the linearity requirements for low-noise amplifier and mixer circuits, potentially reducing transceiver cost as well as complexity. In an exemplary method, a radio-frequency (RF) cancellation signal is generated from a transmitter signal, and the RF cancellation signal is combined with a received RF signal to obtain a combined RF signal comprising a residual transmitter leakage component. The residual transmitter leakage component of the combined RF signal is converted, using, e.g., a frequency mixer, to obtain a down-converted signal at baseband or at an intermediate frequency. A magnitude of the residual transmitter leakage component is detected from the down-converted signal, and used to adjust the phase or amplitude of the RF cancellation signal, or both, to reduce the residual transmitter leakage component.
摘要翻译：公开了主动发射机泄漏消除技术，用于减少频率双工无线电收发器中的发射机泄漏。将发射机泄漏减少到双工收发器的接收器路径可以降低低噪声放大器和混频器电路的线性要求，有可能降低收发器成本以及复杂性。在示例性方法中，从发射机信号产生射频（RF）消除信号，并且将RF消除信号与接收的RF信号组合以获得包括残余发射机泄漏分量的组合RF信号。组合的RF信号的残余发射机泄漏分量使用例如混频器进行转换，以在基带或中频获得下变频信号。从下变频信号中检测残留发射机泄漏分量的大小，并用于调整RF消除信号或两者的相位或幅度，以减少残余发射机泄漏分量。

39. 发明授权

US08130053B2 Tank tuning for band pass filter used in radio communications 有权
标题翻译：用于无线电通信中的带通滤波器的槽调谐
公开(公告)号：US08130053B2
公开(公告)日：2012-03-06
申请号：US12417446
申请日：2009-04-02
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H03G11/04 , H03H11/00
CPC分类号： H03J3/20 , H03J2200/10 , H04B1/18
摘要： A tuning method and circuit for an LC tank resonant circuit, including an inductor and a variable capacitor, are described. In a tuning mode, an RF input signal is applied to an input port of the circuit, and the RF output signal is monitored as a variable capacitor control input is varied. A peak output is detected, and the corresponding variable capacitor control input is stored, and applied to the variable capacitor in an operating mode. In one embodiment, the variable capacitor control input is adjusted for delay in the peak detection process. In one embodiment, the variable capacitor comprises a coarse capacitor and a fine capacitor; the tuning procedure is repeated for each capacitor; and both coarse and fine variable capacitor control inputs are stored and applied to the respective capacitors in operating mode.
摘要翻译：描述了包括电感器和可变电容器的用于LC箱谐振电路的调谐方法和电路。在调谐模式中，RF输入信号被施加到电路的输入端口，并且随着可变电容器控制输入的变化，RF输出信号被监视。检测到峰值输出，并存储相应的可变电容器控制输入，并以工作模式将其施加到可变电容器。在一个实施例中，针对峰值检测处理中的延迟来调节可变电容器控制输入。在一个实施例中，可变电容器包括粗电容器和精细电容器; 每个电容重复调谐过程; 并且粗调和微调可变电容器控制输入都以操作模式存储并施加到相应的电容器。

40. 发明授权

US08099070B2 Passive mixer and four phase clocking method and apparatus 有权
标题翻译：无源混频器和四相时钟方法及装置
公开(公告)号：US08099070B2
公开(公告)日：2012-01-17
申请号：US12108239
申请日：2008-04-23
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
IPC分类号： H04B1/16
CPC分类号： H03D7/166 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/163 , H03D7/165 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088 , H03D2200/009
摘要： According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.
摘要翻译：根据一个实施例，射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。正交混频器包括同相无源混频器和正交相位无源混频器。每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。时钟电路产生第一组时钟信号和第二组时钟信号。第一组时钟信号的频率是第二组时钟信号的两倍。第一组时钟信号被布置成驱动混频器输入开关晶体管，并且第二组时钟信号被布置成驱动输出开关晶体管。

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