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31. 发明授权

US06496925B1 Method and apparatus for processing an event occurrence within a multithreaded processor 有权
标题翻译：用于在多线程处理器内处理事件发生的方法和装置
公开(公告)号：US06496925B1
公开(公告)日：2002-12-17
申请号：US09458544
申请日：1999-12-09
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
IPC分类号： G06F938
CPC分类号： G06F9/3851
摘要： A method includes detecting a first event occurrence for a first thread being processed within a multithreaded processor. Responsive to the detection of this first event occurrence, a second thread being processed within the multithreaded processor is monitored to detect a clearing point for this second thread. Responsive to the detection of a clearing point for the second thread, a functional unit within the multithreaded processor is cleared of data for both the first and the second threads.
摘要翻译：一种方法包括检测在多线程处理器内处理的第一线程的第一事件发生。响应于检测到该第一事件发生，监视在多线程处理器内处理的第二线程以检测该第二线程的清零点。响应于检测第二线程的清除点，多线程处理器内的功能单元被清除第一和第二线程的数据。

32. 发明授权

US07418517B2 Methods and apparatus for distributing system management signals 失效
标题翻译：分配系统管理信号的方法和装置
公开(公告)号：US07418517B2
公开(公告)日：2008-08-26
申请号：US10356393
申请日：2003-01-30
申请人： Carl Zeitler , David Brian Glasco , Les Record , Richard R. Oehler , William G. Kulpa , Guru Prasadh , Rajesh Kota
发明人： Carl Zeitler , David Brian Glasco , Les Record , Richard R. Oehler , William G. Kulpa , Guru Prasadh , Rajesh Kota
IPC分类号： G06F15/173
CPC分类号： G06F1/189 , G06F1/24
摘要： Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.
摘要翻译：提供了用于改善计算机系统综合体内的系统管理信号的分布的方法和装置。提供了在盒子内和计算机系统盒之间传输的机构。本地路由表和一般路由表允许将系统管理信号精确地分配给与特定分区相关联的资源。对信号进行排序，将与一个或多个框相关联的资源置于适当的状态。可以使用专用线来实现计算机系统中的盒子之间的信号分配。

33. 发明授权

US07366879B2 Alteration of functional unit partitioning scheme in multithreaded processor based upon thread statuses 有权
标题翻译：基于线程状态改变多线程处理器中的功能单元划分方案
公开(公告)号：US07366879B2
公开(公告)日：2008-04-29
申请号：US10951836
申请日：2004-09-27
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu
IPC分类号： G06F9/30
CPC分类号： G06F9/30152 , G06F9/3808 , G06F9/382 , G06F9/3836 , G06F9/3838 , G06F9/384 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3863
摘要： A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first thread within the multithreaded processor is detected and, responsive to the change of status for the first thread within the multithreaded processor, a partitioning scheme for the functional unit is altered to service a second thread, but not the first thread, within the multithreaded processor when the change of the status of the first thread comprises a transition from an active state to an inactive state.
摘要翻译：提供了用于在多线程处理器内进入和退出多个线程的方法和装置。维护状态机以指示在多线程处理器内正在执行的多个线程的相关线程的相应状态。检测多线程处理器内的第一线程的状态改变，并且响应于多线程处理器内的第一线程的状态改变，功能单元的分区方案被改变以服务于第二线程，但不是第一线程线程，在多线程处理器内，当第一线程的状态改变包括从活动状态到非活动状态的转变时。

34. 发明授权

US07251698B2 Address space management in systems having multiple multi-processor clusters 有权
标题翻译：具有多个多处理器集群的系统中的地址空间管理
公开(公告)号：US07251698B2
公开(公告)日：2007-07-31
申请号：US10157409
申请日：2002-05-28
申请人： David Brian Glasco , Carl Zeitler , Rajesh Kota , Guru Prasadh , Richard R. Oehler
发明人： David Brian Glasco , Carl Zeitler , Rajesh Kota , Guru Prasadh , Richard R. Oehler
IPC分类号： G06F15/16
CPC分类号： G06F15/17381
摘要： A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
摘要翻译：描述了一种多处理器计算机系统，其中提供地址映射，路由和事务识别机制，其使得能够互连多个多处理器集群，其中互连的处理器的数量超过有限的地址，节点标识和交易标签与每个单独的集群相关联的空间。

35. 发明授权

US07039794B2 Method and apparatus for processing an event occurrence for a least one thread within a multithreaded processor 失效
标题翻译：用于处理多线程处理器内的至少一个线程的事件发生的方法和装置
公开(公告)号：US07039794B2
公开(公告)日：2006-05-02
申请号：US10246887
申请日：2002-09-18
申请人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
发明人： Dion Rodgers , Darrell Boggs , Amit Merchant , Rajesh Kota , Rachel Hsu , Keshavan Tiruvallur
IPC分类号： G06F9/38
CPC分类号： G06F9/3851
摘要： A method includes detecting a first pending event related a first thread being processed within a multithreaded processor. Responsive to the detection of the first pending event, a second thread being processed within the multithreaded processor is monitored to detect an event handling point for the second thread. Responsive to the detection of the event handling point for the second thread, at least a first event handler is invoked to handle at least the first pending event.
摘要翻译：一种方法包括检测与在多线程处理器内处理的第一线程有关的第一未决事件。响应于检测到第一未决事件，监视在多线程处理器内处理的第二线程以检测第二线程的事件处理点。响应于检测第二线程的事件处理点，至少调用第一事件处理程序来处理至少第一挂起事件。

36. 发明授权

US06920532B2 Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems 失效
标题翻译：多处理器系统中内存条修改副本的缓存一致性目录驱逐机制
公开(公告)号：US06920532B2
公开(公告)日：2005-07-19
申请号：US10289521
申请日：2002-11-05
申请人： David Brian Glasco , Rajesh Kota , Sridhar K. Valluru
发明人： David Brian Glasco , Rajesh Kota , Sridhar K. Valluru
IPC分类号： G06F12/08 , G06F12/12 , G06F13/00
CPC分类号： G06F12/082 , G06F12/0828 , G06F12/121
摘要： Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. The cache coherence controller is operable to initiate eviction of an entry in its directory corresponding to a modified copy of a memory line by sending a request to merge an empty data field with the modified copy of the memory line to a corresponding memory controller.
摘要翻译：描述了用于具有多个多处理器集群的计算机系统中的缓存一致性目录驱逐机制。每个集群中的高速缓存一致性控制器促成了集群之间的交互。高速缓存一致性目录与每个高速缓存一致性控制器相关联，用于识别与远程集群中缓存的本地集群相关联的存储器线。高速缓存一致性控制器可操作以通过发送将空数据字段与存储器线的修改副本合并到对应的存储器控制器的请求来启动对其对应于存储器线的修改副本的目录中的条目的驱逐。

37. 发明申请

US20050034007A1 Synchronized communication between multi-processor clusters of multi-cluster computer systems 失效
标题翻译：多集群计算机系统的多处理器群集之间的同步通信
公开(公告)号：US20050034007A1
公开(公告)日：2005-02-10
申请号：US10635705
申请日：2003-08-05
申请人： Shashank Nemawarkar , Rajesh Kota , Guru Prasadh , Carl Zeitler , David Glasco
发明人： Shashank Nemawarkar , Rajesh Kota , Guru Prasadh , Carl Zeitler , David Glasco
IPC分类号： G06F1/10 , G06F1/04
CPC分类号： G06F1/10
摘要： Improved techniques are provided for detecting and correcting errors and skew in inter-cluster communications within computer systems having a plurality of multi-processor clusters. The local nodes of each cluster include a plurality of processors and an interconnection controller. Intra-cluster links are formed between the local nodes, including the interconnection controller, within a cluster. Inter-cluster links are formed between interconnection controllers of different clusters. Intra-cluster packets may be serialized and encapsulated as inter-cluster packets for transmission on inter-cluster links, preferably with link-layer encapsulation. Each inter-cluster packet may include a sequence identifier and error information computed for that packet. Clock data may be embedded in symbols sent on each bit lane of the inter-cluster links. Copies of transmitted inter-cluster packets may be stored until an acknowledgement is received. The use of inter-cluster packets on an inter-cluster link is preferably transparent to other links and to the protocol layer.
摘要翻译：提供了改进的技术，用于检测和校正具有多个多处理器集群的计算机系统内的群间通信中的错误和偏差。每个群集的本地节点包括多个处理器和互连控制器。集群间链路在群集内的本地节点（包括互连控制器）之间形成。在不同集群的互连控制器之间形成集群间链路。群集内数据包可以串行化并封装成群集间数据包，用于在群集间链路上进行传输，最好采用链路层封装。每个群集间分组可以包括针对该分组计算的序列标识符和错误信息。时钟数据可以嵌入到在群集间链路的每个位通道上发送的符号中。可以存储发送的群集间分组的副本，直到接收到确认。在群集间链路上使用群集间分组优选地对于其他链路和协议层是透明的。

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