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31. 发明授权

US06771356B1 Scatterometry of grating structures to monitor wafer stress 失效
标题翻译：光栅结构的散射法监测晶片应力
公开(公告)号：US06771356B1
公开(公告)日：2004-08-03
申请号：US10050626
申请日：2002-01-16
申请人： Christopher F. Lyons , Bhanwar Singh , Steven C. Avanzino , Khoi A. Phan , Bharath Rangarajan , Ramkumar Subramanian , Cyrus E. Tabery
发明人： Christopher F. Lyons , Bhanwar Singh , Steven C. Avanzino , Khoi A. Phan , Bharath Rangarajan , Ramkumar Subramanian , Cyrus E. Tabery
IPC分类号： G01B1116
CPC分类号： G01B11/165
摘要： A system for monitoring a fabrication process is provided. The system includes one or more light sources, each light source directing light to one or more gratings on a wafer. Light reflected from the gratings is collected by a measuring system that processes the collected light. The collected light is indicative of distortion due to stress at respective portions of the wafer. The measuring system provides distortion/stress related data to a processor that determines the acceptability of the distortion of the respective portions of the wafer. The collected light may be analyzed by scatterometry systems to produce scatterometry signatures associated with distortion and to produce feed-forward control information that can be employed to control semiconductor fabrication processes.
摘要翻译：提供了一种用于监视制造工艺的系统。该系统包括一个或多个光源，每个光源将光引导到晶片上的一个或多个光栅。从光栅反射的光被处理收集的光的测量系统收集。所收集的光指示由于晶片的各个部分处的应力引起的变形。测量系统向处理器提供失真/应力相关数据，该处理器确定晶片各部分的失真的可接受性。收集的光可以通过散射测量系统进行分析，以产生与失真相关联的散射仪签名并产生可用于控制半导体制造过程的前馈控制信息。

32. 发明授权

US06592932B2 Nozzle arm movement for resist development 失效
标题翻译：喷嘴臂运动用于抗蚀剂开发
公开(公告)号：US06592932B2
公开(公告)日：2003-07-15
申请号：US09814131
申请日：2001-03-21
申请人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
发明人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
IPC分类号： B05D312
CPC分类号： H01L21/6715 , G03F7/3021
摘要： A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a nozzle adapted to apply a predetermined volume of developer material on a photoresist material layer along a linear path having a length approximately equal to the diameter of the photoresist material layer. A movement system moves the nozzle to a first position offset from a central region of the photoresist material layer for applying a first predetermined volume of developer material to the photoresist material layer while the developer material is spin coated. The movement system also moves the nozzle to a second position offset from the central region for applying a second predetermined volume of developer material to the photoresist material layer while the developer is spin coated. The first position is located on an opposite side of the central region with respect to the second position. A method of adjusting the offset position and/or volume of developer material applied at the first and second position is also provided. The method utilizes developed photoresist material layer thickness data provided by a measurement system to adjust the offset position and/or volume of the developer.
摘要翻译：提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。该系统包括适于沿着具有大致等于光致抗蚀剂材料层的直径的直线路径的光致抗蚀剂材料层上施加预定体积的显影剂材料的喷嘴。移动系统将喷嘴移动到偏离光致抗蚀剂材料层的中心区域的第一位置，以在旋转涂覆显影剂材料的同时将第一预定体积的显影剂材料施加到光致抗蚀剂材料层。移动系统还将喷嘴移动到偏离中心区域的第二位置，以在旋涂涂覆显影剂的同时将第二预定体积的显影剂材料施加到光致抗蚀剂材料层。第一位置相对于第二位置位于中心区域的相反侧。还提供了一种调节在第一和第二位置施加的显影剂材料的偏移位置和/或体积的方法。该方法利用由测量系统提供的显影的光致抗蚀剂材料层厚度数据来调节显影剂的偏移位置和/或体积。

33. 发明授权

US06270579B1 Nozzle arm movement for resist development 有权
标题翻译：喷嘴臂运动用于抗蚀剂开发
公开(公告)号：US06270579B1
公开(公告)日：2001-08-07
申请号：US09429995
申请日：1999-10-29
申请人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
发明人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
IPC分类号： B05C1102
CPC分类号： H01L21/6715 , G03F7/3028
摘要： A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a multiple tip nozzle and a movement system that moves the nozzle to an operating position above a central region of a photoresist material layer located on a substrate, and applies a volume of developer as the nozzle scan moves across a predetermined path. The movement system moves the nozzle in two dimensions by providing an arm that has a first arm member that is pivotable about a first rotational axis and a second arm member that is pivotable about a second rotational axis or is movable along a translational axis. The system also provides a measurement system that measures the thickness uniformity of the developed photoresist material layer disposed on a test wafer. The thickness uniformity data is used to reconfigure the predetermined path of the nozzle as the developer is applied. The thickness uniformity data can also be used to adjust the volume of developer applied along the path and/or the volume flow rate.
摘要翻译：提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。该系统包括多个尖端喷嘴和运动系统，该运动系统将喷嘴移动到位于基板上的光致抗蚀剂材料层的中心区域上方的操作位置，并且当喷嘴扫描移动穿过预定路径时施加一定体积的显影剂。移动系统通过提供具有第一臂构件的臂来移动喷嘴，该臂具有可围绕第一旋转轴线枢转的第一臂构件和可围绕第二旋转轴线枢转或可沿着平移轴线移动的第二臂构件。该系统还提供了测量设置在测试晶片上的显影的光致抗蚀剂材料层的厚度均匀性的测量系统。当施加显影剂时，厚度均匀性数据用于重新配置喷嘴的预定路径。厚度均匀性数据也可用于调节沿路径施加的显影剂的体积和/或体积流量。

34. 发明授权

US06251570B1 Resist developer saving system using material to reduce surface tension and wet resist surface 有权
标题翻译：抵抗使用材料的显影剂储存系统，以减少表面张力和抗湿表面
公开(公告)号：US06251570B1
公开(公告)日：2001-06-26
申请号：US09604372
申请日：2000-06-27
申请人： Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Bhanwar Singh
IPC分类号： G03F732
CPC分类号： G03F7/32 , G03F7/322 , G03F7/38
摘要： In one embodiment, the present invention relates to a method of processing a semiconductor structure including a resist thereon, involving the steps of exposing the semiconductor structure including the resist to acting radiation; contacting the semiconductor structure including the exposed resist with a solution comprising water and from about 0.01% to about 5% by weight of a surfactant; and developing the resist with a developer.
摘要翻译：在一个实施例中，本发明涉及一种处理包括其上的抗蚀剂的半导体结构的方法，包括将包括抗蚀剂的半导体结构暴露于作用辐射的步骤; 将包含曝光的抗蚀剂的半导体结构与包含水和约0.01重量％至约5重量％的表面活性剂的溶液接触; 并用开发商开发抗蚀剂。

35. 发明授权

US6136514A Resist developer saving system using material to reduce surface tension and wet resist surface 有权
标题翻译：抵抗使用材料的显影剂储存系统，以减少表面张力和抗湿表面
公开(公告)号：US6136514A
公开(公告)日：2000-10-24
申请号：US494699
申请日：2000-01-31
申请人： Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Bhanwar Singh
IPC分类号： G03F7/32 , G03F7/38
CPC分类号： G03F7/32 , G03F7/322 , G03F7/38
摘要： In one embodiment, the present invention relates to a method of processing a semiconductor structure including a resist thereon, involving the steps of exposing the semiconductor structure including the resist to actinic radiation; contacting the semiconductor structure including the exposed resist with a solution comprising water and from about 0.01% to about 5% by weight of a surfactant; and developing the resist with a developer.
摘要翻译：在一个实施例中，本发明涉及一种处理包括其上的抗蚀剂的半导体结构的方法，包括将包括抗蚀剂的半导体结构暴露于光化辐射的步骤; 将包含曝光的抗蚀剂的半导体结构与包含水和约0.01重量％至约5重量％的表面活性剂的溶液接触; 并用开发商开发抗蚀剂。

36. 发明授权

US06912438B2 Using scatterometry to obtain measurements of in circuit structures 失效
标题翻译：使用散射法获得电路结构的测量
公开(公告)号：US06912438B2
公开(公告)日：2005-06-28
申请号：US10277016
申请日：2002-10-21
申请人： Bryan K. Choo , Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan
发明人： Bryan K. Choo , Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan
IPC分类号： G01N21/47 , H01L21/66 , G06F19/00
CPC分类号： H01L22/20 , G01N21/4738 , H01L2924/0002 , H01L2924/00
摘要： A system and methodology are disclosed for monitoring and controlling a semiconductor fabrication process. Measurements are taken in accordance with scatterometry based techniques of repeating in circuit structures that evolve on a wafer as the wafer undergoes the fabrication process. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Additionally, the measurements can be employed in determining whether to discard the wafer or portions thereof based on a cost benefit analysis, for example. Directly measuring in circuit structures mitigates sacrificing valuable chip real estate as test grating structures may not need to be formed within the wafer, and also facilitates control over the elements that actually affect resulting chip performance.
摘要翻译：公开了用于监测和控制半导体制造工艺的系统和方法。根据基于散射法的技术进行测量，该技术在晶片经历制造过程时在晶片上发生的电路结构中重复。可以采用测量来产生可以用于选择性地调整一个或多个制造部件和/或与其相关联的操作参数以适应制造过程的前馈和/或反馈控制数据。另外，例如，可以基于成本效益分析来确定是否丢弃晶片或其部分的测量。在电路结构中的直接测量减轻了牺牲有价值的芯片的不动产，因为测试光栅结构可能不需要在晶片内形成，并且还有助于对实际影响芯片性能的元件的控制。

37. 发明授权

US07001830B2 System and method of pattern recognition and metrology structure for an X-initiative layout design 失效
标题翻译：用于X主动布局设计的模式识别和计量结构的系统和方法
公开(公告)号：US07001830B2
公开(公告)日：2006-02-21
申请号：US10653309
申请日：2003-09-02
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： G03F7/70625 , G03F7/70633 , G03F9/7076 , Y10S438/975
摘要： The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.
摘要翻译：本发明涉及用于提供用于检查晶片的最佳方法的检查方法和系统。该方法和系统包括晶片到标线片对准，层间对准和晶片表面特征检查。通过将对角线添加到现有的对准标记来减小交叉点大小和期望点可以驻留的对应区域来改善晶片到标线阵列对准。通过向现有覆盖目标添加倾斜和/或非线性线段，以类似的方式改善了层间对齐。此外，在多个所需的对角轴中提供晶片表面检查允许更精确的特征测量。

38. 发明授权

US06724476B1 Low defect metrology approach on clean track using integrated metrology 失效
标题翻译：使用综合计量的清洁轨道的低缺陷计量方法
公开(公告)号：US06724476B1
公开(公告)日：2004-04-20
申请号：US10261756
申请日：2002-10-01
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01N2100
CPC分类号： G01N21/9501
摘要： One aspect of the present invention relates to a system and method of monitoring for defects on a wafer before and after forming a photoresist layer on the wafer. The system includes a device fabrication system comprising one or more wafer processing system components for producing a device; a defect metrology system integrated within and on track with the fabrication system operative to inspect the wafer for defects before it proceeds to photoresist processing; and a wafer cleaning system for reducing an amount of defects detected on the front and/or back side of the wafer. If the amount of defects have been sufficiently reduced, the front side of the wafer may be coated with a photoresist. Subsequently, the back side of the wafer may be inspected and cleaned while protecting the front side from damage. Cleaning of the wafer may be performed with a thermal shock treatment, for example.
摘要翻译：本发明的一个方面涉及在晶片上形成光致抗蚀剂层之前和之后对晶片上的缺陷进行监测的系统和方法。该系统包括装置制造系统，其包括用于产生装置的一个或多个晶片处理系统部件; 在制造系统内部和轨道上集成的缺陷计量系统，其操作用于在进行光致抗蚀剂处理之前检查晶片的缺陷; 以及用于减少在晶片的前侧和/或后侧检测到的缺陷量的晶片清洁系统。如果缺陷的量已经被充分降低，则晶片的前侧可以涂覆有光致抗蚀剂。随后，可以在保护前侧免受损伤的同时检查和清洁晶片的背面。例如，可以进行热冲击处理来进行晶片的清洁。

39. 发明授权

US06556303B1 Scattered signal collection using strobed technique 有权
标题翻译：使用频闪技术分散信号采集
公开(公告)号：US06556303B1
公开(公告)日：2003-04-29
申请号：US09902366
申请日：2001-07-10
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Khoi A. Phan
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Khoi A. Phan
IPC分类号： G01B1114
CPC分类号： G01B11/0683 , G01B11/0625 , H01L22/12
摘要： The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate in a periodic manner. A registration feature associated with the moving substrate can be utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.
摘要翻译：本发明涉及一种用于控制移动衬底上的薄膜形成的系统和方法，作为用于制造集成电路的工艺的一部分。本发明涉及使用散射法来以周期性方式分析移动基片上的薄膜来控制薄膜形成过程。与移动基板相关联的配准特征可以与信号系统结合使用，以确定移动基板的位置，由此可以执行移动基板上对应位置的可重复分析。散射测量允许原位测量薄膜形成进程，由此可以在反馈回路中控制薄膜形成工艺条件以获得目标结果。也可以通过在基板的非生产部分上提供光栅图案来促进散射测量。

40. 发明授权

US06486072B1 System and method to facilitate removal of defects from a substrate 失效
标题翻译：有助于从基底去除缺陷的系统和方法
公开(公告)号：US06486072B1
公开(公告)日：2002-11-26
申请号：US09709974
申请日：2000-11-10
申请人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： H01L21302
CPC分类号： H01L21/02046
摘要： A system and method are disclosed for facilitating removal of a defect from a substrate. A charge is applied at the surface of substrate, such as in the form of an ionized gas, to weaken attractive forces between the defect and the substrate. As a result of weakening the attractive forces, a suitable defect removal system may be employed to remove the defect.
摘要翻译：公开了一种用于便于从基底去除缺陷的系统和方法。在基板的表面，例如以电离气体的形式施加电荷，以减弱缺陷和基板之间的吸引力。作为吸引力减弱的结果，可以采用合适的缺陷去除系统来去除缺陷。

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