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31. 发明授权

US5612256A Multi-layer electrical interconnection structures and fabrication methods 失效
标题翻译：多层电互连结构及制作方法
公开(公告)号：US5612256A
公开(公告)日：1997-03-18
申请号：US386644
申请日：1995-02-10
申请人： Darryl M. Stansbury
发明人： Darryl M. Stansbury
IPC分类号： H01J9/18 , H01J9/24 , H01J29/02 , H01J29/92 , H01L21/60
CPC分类号： H01J29/92 , H01J29/028 , H01J9/185 , H01J9/241 , H01L24/85 , H01J2329/00 , H01J2329/8625 , H01J2329/92 , H01L2224/45015 , H01L2224/45124 , H01L2224/48465 , H01L2224/85 , H01L24/45 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , Y10T29/49144 , Y10T29/49162
摘要： A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate's rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors. A plurality of conductive bonds such as flip-chip connections are positioned between the die bond pads and the facing upper-level conductors.
摘要翻译：平板场发射显示器包括发光面板，刚性背板以及插入或夹持的发射器或阴极板。电介质连接器脊被屏幕印在面板的后表面上。然后将上，下层导体丝网印刷在面板上。下层导体直接施加在面板后表面上。上层导体被施加在连接器脊的顶部。多个接合线互连在上层和下层的各个丝网印刷导体之间延伸。接合线互连在所述单独的丝网印刷导体之间产生层间电互连。阴极板位于连接器脊上方。阴极板具有面对面板后表面并与上层导体对准的多个芯片接合焊盘。诸如倒装芯片连接的多个导电键被定位在芯片接合焊盘和面对的上层导体之间。

32. 发明授权

US5601751A Manufacturing process for high-purity phosphors having utility in field emission displays 失效
标题翻译：用于场致发射显示器的高纯度荧光粉的制造方法
公开(公告)号：US5601751A
公开(公告)日：1997-02-11
申请号：US488795
申请日：1995-06-08
申请人： Charles M. Watkins , Surjit S. Chadha
发明人： Charles M. Watkins , Surjit S. Chadha
IPC分类号： C09K11/08 , C09K11/78 , C09K11/00
CPC分类号： C09K11/0805 , C09K11/08 , C09K11/0827
摘要： A process is provided for manufacturing high-purity phosphors having utility in field emission displays. The high-purity phosphor is a host lattice infiltrated by a dopant that activates luminescent properties therein. The lattice and dopant are initially milled together to reduce their average particle size while simultaneously achieving complete mixing between the lattice and the dopant. The resulting mixture is maintained free of a flux or substantially any other treatment agent capable of contaminating the phosphor and placed in a heating vessel formed from a substantially impervious contaminant-free material. The mixture is heated to a high temperature effectuating thorough infiltration of the dopant into the lattice structure. The use of an impervious contaminant-free heating vessel and the exclusion of flux or other treatment agents from the mixture avoids undesirable contamination and undue particle size growth of the phosphor product during the manufacture thereof. Accordingly, product is a high-purity phosphor having a small average particle size, yet exhibiting sufficient luminescent efficiencies for utility in field emission displays as a luminescent coating for the anode screen.
摘要翻译：提供了用于制造在场发射显示器中具有实用性的高纯度荧光体的方法。高纯度荧光体是由掺杂剂渗透的主体晶格，其激活其中的发光性质。晶格和掺杂剂最初被研磨在一起以降低其平均粒度，同时实现晶格和掺杂剂之间的完全混合。所得混合物保持没有助焊剂或基本上任何能够污染荧光体并且放置在由基本上不渗透的无污染物质形成的加热容器中的其它处理剂。将混合物加热到高温，使掺杂剂彻底渗透到晶格结构中。使用不渗透无污染物的加热容器以及从混合物排除助熔剂或其它处理剂避免了在其制造过程中不期望的污染和不适当的粒度增长的荧光体产品。因此，产品是具有小平均粒度的高纯度荧光体，但在场发射显示器中作为阳极屏的发光涂层显示出足够的发光效率。

33. 发明授权

US5598156A Serial to parallel conversion with phase locked loop 失效
标题翻译：具有锁相环的串并转换
公开(公告)号：US5598156A
公开(公告)日：1997-01-28
申请号：US372412
申请日：1995-01-13
申请人： Glen Hush , Jake Baker , Tom Voshell
发明人： Glen Hush , Jake Baker , Tom Voshell
IPC分类号： H03L7/08 , H03M9/00 , H04L7/033 , H04L7/04 , H04L7/06 , H04L7/08 , H04N5/12
CPC分类号： H03M9/00 , H03L7/08 , H04N5/126 , H04L7/033 , H04L7/044 , H04L7/06
摘要： A serial to parallel conversion circuit uses a dynamic shift register in a phase locked loop for an index to access a parallel holding register. The composite input signal includes serial data to be sampled and a synchronizing signal at an integer factor of the sampling serial data rate. The phase locked loop generates a control signal for sampling the serial data at a multiple of the synchronizing frequency by incorporating a delay between a variable frequency oscillator output and a phase comparator input. The delay element in one embodiment includes a shift register with a walking-one pattern that overflows to the phase comparator. The walking-one pattern is used to identify which position of the holding register should store the next sample of the input signal. The shift register is self-initialized by a logic combination of all shift register outputs. Power dissipation by the serial to parallel conversion circuit is minimal because only one 7-transistor shift register cell draws current at a time.
摘要翻译：串行到并行转换电路在锁相环中使用动态移位寄存器用于访问并行保持寄存器的索引。复合输入信号包括要采样的串行数据和采样串行数据速率的整数因子的同步信号。锁相环产生一个控制信号，用于通过结合可变频率振荡器输出和相位比较器输入之间的延迟以同步频率的倍数对串行数据进行采样。一个实施例中的延迟元件包括移位寄存器，其具有溢出到相位比较器的步行模式。步行模式用于识别保持寄存器的哪个位置应存储输入信号的下一个采样。移位寄存器由所有移位寄存器输出的逻辑组合进行自初始化。串并转换电路的功耗最小，因为只有一个7晶体管移位寄存器单元一次抽出电流。

34. 发明授权

US5503582A Method for forming spacers for display devices employing reduced pressures 失效
标题翻译：用于使用减压的显示装置的间隔件的形成方法
公开(公告)号：US5503582A
公开(公告)日：1996-04-02
申请号：US342329
申请日：1994-11-18
申请人： David A. Cathey, Jr. , Jim J. Browing
发明人： David A. Cathey, Jr. , Jim J. Browing
IPC分类号： H01J9/18 , H01J29/02 , H01J31/12 , H01J9/00
CPC分类号： H01J9/185 , H01J29/028 , H01J31/127 , H01J2329/8625 , H01J2329/863 , H01J2329/8645
摘要： A method for forming interelectrode spacers for flat panel display devices that employ reduced pressures, includes the steps of; forming a substrate out of an aerogel, xerogel photosensitive material (e.g., photosensitive glass, photosensitive aerogel, photosensitive xerogel); forming a pattern of openings and gas removal channels in the substrate; and then placing the substrate between a display screen and base plate of the display device. The substrate is formulated to be light weight, insulative and with a high compressive strength for resisting atmospheric loads placed on the display screen by the reduced pressure. In addition, the substrate is formulated to be easily etched, laser ablated or photochemically machined and assembled as a third member spacer structure.
摘要翻译：一种用于形成使用减压的平板显示装置的电极间间隔物的方法，包括以下步骤：从气凝胶形成基材，干凝胶感光材料（例如感光玻璃，感光气凝胶，感光干凝胶）; 在衬底中形成开口和气体去除通道的图案; 然后将该基板放置在显示装置的显示屏和基板之间。该基材被配制为重量轻，绝缘性和高抗压强度，以通过减压来抵抗放置在显示屏上的大气负荷。此外，将基底配制成易于蚀刻，激光烧蚀或光化学加工并组装为第三构件间隔结构。

35. 发明授权

US5486126A Spacers for large area displays 失效
标题翻译：大面积显示屏的间距
公开(公告)号：US5486126A
公开(公告)日：1996-01-23
申请号：US349091
申请日：1994-11-18
申请人： David A. Cathey , James J. Hofmann , Danny Dynka , Darryl M. Stansbury
发明人： David A. Cathey , James J. Hofmann , Danny Dynka , Darryl M. Stansbury
IPC分类号： G09F9/30 , G09F9/313 , H01J9/18 , H01J9/24 , H01J29/02 , H01J29/86 , H01J31/12
CPC分类号： H01J9/242 , H01J29/028 , H01J29/864 , H01J31/123 , H01J31/127 , H01J9/185 , H01J2329/8625 , H01J2329/863 , H01J2329/8635 , H01J2329/864 , H01J2329/8645 , H01J2329/866 , Y10T29/4981
摘要： A process is provided for forming spacers useful in large area displays. The process comprises steps of: forming bundles comprising fiber strands which are held together with a binder; slicing the bundles into slices; adhering the slices on an electrode plate of the display; and removing the binder.
摘要翻译：提供用于形成用于大面积显示器的间隔物的方法。该方法包括以下步骤：形成包含与粘合剂保持在一起的纤维束的束; 将束切成片; 将切片粘附在显示器的电极板上; 并移除粘合剂。

36. 发明授权

US5459480A Architecture for isolating display grid sections in a field emission display 失效
标题翻译：用于在场发射显示屏中隔离显示网格部分的架构
公开(公告)号：US5459480A
公开(公告)日：1995-10-17
申请号：US307090
申请日：1994-09-16
申请人： Jim J. Browning , John K. Lee
发明人： Jim J. Browning , John K. Lee
IPC分类号： G09G3/00 , G09G3/20 , G09G3/22 , H01J31/12 , H04N5/70 , H04N17/04 , G09G3/10
CPC分类号： G09G3/006 , G09G3/22 , H01J31/127 , H04N5/70 , G09G2300/0809 , G09G3/2014 , H04N17/04
摘要： The present invention teaches a field emission display ("FED") architecture for isolating display grids, wherein an FED has a plurality of pixels. Each of the pixels comprise at least two field emitter tips for displaying information to the pixel and a pixelator for driving the field emitter tips. Further, an isolated display grid is incorporated for each of the field emitter tips. Each display grid is coupled by a link to a bus having a predetermined voltage. In one embodiment of the present invention, the link can be disintegrated by internal or external means. In a second embodiment, the FED comprises a first and second bus, each bus having a predetermined voltage, whereby a first isolated display grid is coupled to the first bus by a first link and a second isolated display grids is coupled to the second bus by a second link.
摘要翻译：本发明教导了用于隔离显示网格的场发射显示（“FED”）架构，其中FED具有多个像素。每个像素包括用于向像素显示信息的至少两个场发射器尖端和用于驱动场发射器尖端的像素化器。此外，为每个场发射器尖端并入有隔离的显示栅格。每个显示网格通过具有预定电压的总线的链路耦合。在本发明的一个实施例中，链接可以通过内部或外部手段分解。在第二实施例中，FED包括第一和第二总线，每个总线具有预定电压，由此通过第一链路将第一隔离显示网格耦合到第一总线，并且第二隔离显示网格通过第二个链接。

37. 发明授权

US5342477A Low resistance electrodes useful in flat panel displays 失效
标题翻译：低电阻电极可用于平板显示器
公开(公告)号：US5342477A
公开(公告)日：1994-08-30
申请号：US92311
申请日：1993-07-14
申请人： David A. Cathey
发明人： David A. Cathey
IPC分类号： C23F4/00 , G02F1/1343 , G02F1/155 , H01J9/02 , H01J11/00 , H01J17/04 , H01L31/0224 , H05B33/10 , H05B33/12 , H05B33/26 , H05B33/28 , B44C1/22 , C23F1/00
CPC分类号： H01J9/02 , G02F1/13439 , H01L31/022466 , H05B33/10 , H05B33/28 , H01L51/5212
摘要： A method is provided for fabricating a high resistance row (or column) electrode with which a low resistance runner is associated. The electrode is formed, preferably from a substantially transparent material, and a low resistant (i.e., highly conductive material) is disposed thereon. The highly conductive material is subsequently etched such that the highly conductive material remains along the sides of the electrode, thereby reducing the resistivity of the electrode.
摘要翻译：提供了一种用于制造与低电阻流道相关联的高电阻行（或列）电极的方法。电极优选由基本透明的材料形成，并且在其上设置低电阻（即，高导电性材料）。随后蚀刻高导电性材料，使得高导电性材料沿着电极的侧面保持，从而降低电极的电阻率。

38. 发明授权

US5898428A High impedance transmission line tap circuit 失效
公开(公告)号：US5898428A
公开(公告)日：1999-04-27
申请号：US746965
申请日：1996-11-19
申请人： David A. Zimlich , Garrett W. Hall
发明人： David A. Zimlich , Garrett W. Hall
IPC分类号： G09G3/20 , G09G3/22 , G09G5/00
CPC分类号： G09G3/2011 , G09G3/22 , G09G2310/0275 , G09G3/2014
摘要： A transmission line tap for a field emission display includes a driving circuit formed from a charging and clearing circuit and a storage circuit. In one embodiment, the charging and clearing circuit is a single transistor coupled between a supply voltage and the storage circuit. The storage circuit is a single storage capacitor coupled between the transistor and the reference potential. In another embodiment, the charging and clearing circuit is formed from three transistors and an intermediate capacitor, and the storage circuit is formed from a storage capacitor and an output buffer. In either embodiment, pulses of an input voltage selectively charge the storage capacitor to a fixed voltage. The driving circuit then drives a column line of an emitter substrate in response to the storage capacitor. In the first embodiment, the storage capacitor is cleared by pulsing the supply voltage. In the second embodiment, the charging and clearing circuit is self-clearing such that no pulse of the supply voltage is required. Each embodiment is driven by a transmission line using constructively interfered pulses to establish the input voltage.

39. 发明授权

US5894293A Field emission display having pulsed capacitance current control 失效
标题翻译：具有脉冲电容电流控制的场发射显示
公开(公告)号：US5894293A
公开(公告)日：1999-04-13
申请号：US637352
申请日：1996-04-24
申请人： Glen E. Hush , Russell J. Baker
发明人： Glen E. Hush , Russell J. Baker
IPC分类号： G09G3/22
CPC分类号： G09G3/22 , G09G2300/08 , G09G2310/0205 , G09G2320/02
摘要： A current controlled field emission display includes a pair of pulsed transistors that charge and discharge capacitance within the field emission display. The capacitance may be a separate circuit element or may be the parasitic capacitance of the integrated transistors and related circuitry. Various circuit configurations are employed to control charge transfer to and from the capacitance. The control circuit is driven by a series of pulse pairs where the first pulse in each pair controls charging of the capacitance and the second pulse controls discharging of the capacitance through the emitter set.
摘要翻译：电流控制的场致发射显示器包括在场致发射显示器内充电和放电电容的一对脉冲晶体管。电容可以是单独的电路元件，或者可以是集成晶体管和相关电路的寄生电容。采用各种电路配置来控制电容与电容的电荷转移。控制电路由一系列脉冲对驱动，其中每对中的第一个脉冲控制电容的充电，第二个脉冲通过发射器组控制电容的放电。

40. 发明授权

US5867136A Column charge coupling method and device 失效
标题翻译：柱电荷耦合方法和装置
公开(公告)号：US5867136A
公开(公告)日：1999-02-02
申请号：US538136
申请日：1995-10-02
申请人： David A. Zimlich
发明人： David A. Zimlich
IPC分类号： G09G3/20 , G09G3/22
CPC分类号： G09G3/2011 , G09G3/22 , G09G2330/023
摘要： An apparatus is provided for modulating a conductive element in an FED device from a first level to a second level in which the charge on the display is conserved. In one embodiment, the apparatus comprises an analog modulating circuit, a switching circuit, and a switch. The analog modulating circuit receives a feedback signal responsive to an actual row-column voltage difference and a target signal responsive to a desired row-column voltage difference and generates an output signal responsive to the feedback signal and the target signal. The switching circuit generates a switching signal responsive to the feedback signal, the target signal, and a bias signal. The switch connects a reference voltage to the output generated by the analog modulating circuit in response to the switching signal. In another embodiment, the apparatus has a primary modulator having a first input connected to a first signal representative of the second level, an output connected to the conductive element, and a second input connected to a first signal representative of the output; and a connector of a modifying voltage to the output, the connector having a first input connected to a second signal representative of the second level and a second input connected to a second signal responsive to the output.
摘要翻译：提供了一种用于将FED装置中的导电元件从第一电平调制到第二电平的装置，其中显示器上的电荷被保存。在一个实施例中，该装置包括模拟调制电路，开关电路和开关。模拟调制电路响应于实际的行列电压差和响应于期望行列电压差的目标信号接收反馈信号，并响应于反馈信号和目标信号产生输出信号。开关电路响应反馈信号，目标信号和偏置信号产生开关信号。开关根据开关信号将参考电压连接到由模拟调制电路产生的输出。在另一个实施例中，该装置具有主调制器，其具有连接到代表第二电平的第一信号的第一输入端，连接到导电元件的输出端和连接到表示输出端的第一信号的第二输入端; 以及将修改电压连接到所述输出的连接器，所述连接器具有连接到表示所述第二电平的第二信号的第一输入端和响应于所述输出连接到第二信号的第二输入端。

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