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21. 发明授权

US06407429B1 Semiconductor device having silicon on insulator and fabricating method therefor 有权
公开(公告)号：US06407429B1
公开(公告)日：2002-06-18
申请号：US09658099
申请日：2000-09-08
申请人： Young-Gun Ko , Byung-Sun Kim , Young-Wug Kim
发明人： Young-Gun Ko , Byung-Sun Kim , Young-Wug Kim
IPC分类号： H01L310392
CPC分类号： H01L27/1203 , H01L21/84
摘要： The present invention relates to an SOI semiconductor device and a method for fabricating an SOI semiconductor device, in which the portions formed with silicide layers are laterally restricted by spacers to a predetermined range in the diffusion regions to be used for diodes or well resistors. In this manner, it is possible to fix the length of distance between the sides of a silicide layer and a diffusion region, greater than that available in the prior art techniques, thereby minimizing power leakage at the sides of the diffusion regions. In the SOI semiconductor device thus constructed, the diffusion regions to be used for diodes (or well resistors) are constructed with spacers in a double junction structure of different density of impurity layers (for instance, a P− or N− layer respectively surrounds a P+ or N+ layer), in other words, only onto a high density of impurity layer, the P+ or N+ layer, or in a single junction structure in which the spacers restrict a range of space for forming the silicide layer in the diffusion region.

22. 发明授权

US06288427B1 Silicon-germanium BiCMOS on SOI 有权
公开(公告)号：US06288427B1
公开(公告)日：2001-09-11
申请号：US09768493
申请日：2001-01-24
申请人： Feng-Yi Huang
发明人： Feng-Yi Huang
IPC分类号： H01L310392
摘要： A BiCMOS integrated circuit is formed with CMOS transistors on an SOI substrate in a silicon layer having a standard thickness of 0.1 &mgr;m to 0.2 &mgr;m and with Bipolar SiGe transistors formed in an epitaxial layer nominally 0.5 &mgr;m thick. The CMOS transistors are formed first with standard processing, then covered with an insulating film. The insulating film is stripped in the bipolar areas and an epitaxial SiGe layer is deposited on the Si substrate. The bipolar transistors are formed using the SiGe epi layer for the base and having an encapsulated structure for device isolation using shallow isolation trenches and the buried oxide.

23. 发明授权

US06734500B2 Semiconductor devices including a bi-polar transistor and a field effect transistor 失效
标题翻译：包括双极晶体管和场效应晶体管的半导体器件
公开(公告)号：US06734500B2
公开(公告)日：2004-05-11
申请号：US10014612
申请日：2001-12-14
申请人： Akihiko Ebina
发明人： Akihiko Ebina
IPC分类号： H01L310392
CPC分类号： H01L29/78615 , H01L21/84 , H01L27/1203 , H01L29/7317
摘要： A semiconductor device 1000 may include an element isolation region 14, an n-type field effect transistor 100 and an npn-type bipolar transistor 200 formed on a SOI substrate 10. A p-type body region 50a may be electrically connected to an n-type source region 120. The p-type body region 50a may be electrically connected to a p-type base region 220. An n-type drain region 130 may be electrically connected to an n-type collector region 230. An n-type source region 120 may be formed structurally isolated from an n-type emitter region 210.
摘要翻译：半导体器件1000可以包括形成在SOI衬底10上的元件隔离区域14，n型场效应晶体管100和npn型双极晶体管200. p型体区域50a可以电连接到n- p型体区域50a可以电连接到p型基极区域220.n型漏极区域130可以电连接到n型集电极区域230.n型源极区域区域120可形成为与n型发射极区域210结构隔离。

24. 发明授权

US06724010B1 Solid state imager having gated photodiodes and method for making same 有权
标题翻译：具有门控光电二极管的固态成像器及其制造方法
公开(公告)号：US06724010B1
公开(公告)日：2004-04-20
申请号：US09632106
申请日：2000-08-03
申请人： Robert Forrest Kwasnick , George Edward Possin , Ching-Yeu Wei
发明人： Robert Forrest Kwasnick , George Edward Possin , Ching-Yeu Wei
IPC分类号： H01L310392
CPC分类号： H01L31/022408 , H01L27/14603 , H01L27/14658
摘要： A solid state imager is provided that comprises an imaging array of gated photodiodes. The imager comprises a plurality of photosensor pixels arranged in a pixel array, and each of the photosensor pixels includes a photodiode having a sidewall, the sidewall having a gate dielectric layer disposed thereon, and a field plate disposed around the photodiode body. The field plate comprises amorphous silicon disposed on the gate dielectric layer and extends substantially completely around the sidewall of said photodiode. The field plate is electrically coupled to the common electrode of the imaging array so that the field plate creates an electric field around the photodiode body in correspondence with the potential of said common electrode. A method of fabricating the gated photodiode array is also provided.
摘要翻译：提供固态成像器，其包括门控光电二极管的成像阵列。成像器包括排列在像素阵列中的多个光电传感器像素，并且每个光传感器像素包括具有侧壁的光电二极管，该侧壁具有设置在其上的栅介质层，以及设置在光电二极管主体周围的场板。场板包括设置在栅极电介质层上并且基本上完全围绕所述光电二极管的侧壁延伸的非晶硅。场板电耦合到成像阵列的公共电极，使得场板与所述公共电极的电位相对应地在光电二极管主体周围产生电场。还提供了一种制造门控光电二极管阵列的方法。

25. 发明授权

US06720620B1 Material and method for manufacturing semiconductor on insulator substrates and devices 失效
标题翻译：用于制造半导体绝缘体基板和器件的材料和方法
公开(公告)号：US06720620B1
公开(公告)日：2004-04-13
申请号：US10413127
申请日：2003-04-14
申请人： Charles Partee , Scott Joray
发明人： Charles Partee , Scott Joray
IPC分类号： H01L310392
CPC分类号： H01L21/76227 , H01L21/3146 , H01L21/3148
摘要： A semiconductor device is formed from a semiconductor on insulator substrate, with the insulator or dielectric layer being formed from a polymer precursor to ceramic. The polymer precursor to ceramic may be SiC, diamond, or diamond-like carbon. The resulting device has improved thermal properties, smoothness, dielectric properties, ease of processing, and performance. A method of making the semiconductor device is also disclosed.
摘要翻译：半导体器件由绝缘体上半导体衬底形成，绝缘体或电介质层由聚合物前体形成为陶瓷。陶瓷的聚合物前体可以是SiC，金刚石或类金刚石碳。所得到的装置具有改善的热性能，平滑性，介电性能，易加工性和性能。还公开了制造半导体器件的方法。

26. 发明授权

US06649936B1 Thin-film transistor substrate and liquid crystal display 有权
标题翻译：薄膜晶体管基板和液晶显示器
公开(公告)号：US06649936B1
公开(公告)日：2003-11-18
申请号：US09526150
申请日：2000-03-15
申请人： Chae Gee Sung , Jo Gyoo Chul , Makoto Sasaki , Kazuyuki Arai
发明人： Chae Gee Sung , Jo Gyoo Chul , Makoto Sasaki , Kazuyuki Arai
IPC分类号： H01L310392
CPC分类号： H01L27/124 , G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1214 , H01L29/458 , H01L29/66757
摘要： A source line is directly connected to a source terminal composed of indium zinc oxide in a thin-film transistor substrate. A gate line is directly connected to a gate terminal composed of indium zinc oxide. Alternatively, drain electrodes of thin-film transistors for switching a plurality of pixel electrodes are directly connected to pixel electrodes composed of indium zinc oxide. These configurations do not require a passivation film which is essential for conventional thin-film transistor substrates, and the resulting thin-film transistor substrate can be made by a reduced number of manufacturing steps.
摘要翻译：源极线直接连接到由薄膜晶体管衬底中的氧化铟锌构成的源极端子。栅极线直接连接到由氧化铟锌构成的栅极端子。或者，用于切换多个像素电极的薄膜晶体管的漏极直接连接到由氧化铟锌构成的像素电极。这些配置不需要对于传统的薄膜晶体管衬底是必需的钝化膜，并且所得到的薄膜晶体管衬底可以通过减少数量的制造步骤来制造。

27. 发明授权

US06570223B1 Functional device and method of manufacturing the same 有权
标题翻译：功能器件及其制造方法
公开(公告)号：US06570223B1
公开(公告)日：2003-05-27
申请号：US09889603
申请日：2001-10-02
申请人： Akio Machida , Dharam Pal Gosain , Setsuo Usui
发明人： Akio Machida , Dharam Pal Gosain , Setsuo Usui
IPC分类号： H01L310392
CPC分类号： H01L29/78603 , H01L21/02422 , H01L21/02532 , H01L21/02686 , H01L27/1281 , H01L29/66757 , H01L29/78606 , H01L29/78675
摘要： A functional device and method of manufacturing the same are disclosed. A low-temperature softening layer and a heat-resistant layer are formed in this order on a substrate made of organic material such as polyethylene terephthalate, and a functional layer made of polysilicon is formed thereon. The functional layer is formed by crystallizing an amorphous silicon layer (precursor layer), with laser beam irradiation. When a laser beam is applied, heat causes the substrate to expand. However, stress caused by a difference in a thermal expansion coefficient between the substrate and the functional layer is absorbed by the low-temperature softening layer, so that no cracks and peeling occurs in the functional layer. The low-temperature softening layer is preferably made of a polymeric material containing acrylic resin. By properly interposing a metal layer and a heat-resistant layer between the substrate and the functional layer, a laser beam of higher intensity can be irradiated.
摘要翻译：公开了一种功能器件及其制造方法。在由聚对苯二甲酸乙二醇酯等有机材料构成的基板上依次形成低温软化层和耐热层，在其上形成由多晶硅构成的功能层。功能层通过用激光束照射结晶非晶硅层（前体层）而形成。当施加激光束时，加热导致基板膨胀。然而，由基板和功能层之间的热膨胀系数的差异引起的应力被低温软化层吸收，使得在功能层中不会发生裂纹和剥离。低温软化层优选由含有丙烯酸树脂的聚合材料制成。通过在基板和功能层之间适当地插入金属层和耐热层，可以照射更高强度的激光束。

28. 发明授权

US06518630B2 Thin film transistor array substrate for liquid crystal display and method for fabricating same 有权
公开(公告)号：US06518630B2
公开(公告)日：2003-02-11
申请号：US09988169
申请日：2001-11-19
申请人： Chun-Gi You , Hyang-Shik Kong
发明人： Chun-Gi You , Hyang-Shik Kong
IPC分类号： H01L310392
CPC分类号： H01L27/12 , G02F1/136227 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458
摘要： A thin film transistor array substrate includes a substrate, a gate wire with a gate line and a gate electrode formed on the substrate, a gate insulating layer covering the gate wire, and a semiconductor pattern formed on the gate insulating layer. A data wire is formed on the gate insulating layer and the semiconductor pattern with a data line, and a source electrode and a drain electrode. The data wire bears a multiple-layered structure having a metallic layer and an intermetallic compound layer. A protective layer is formed on the data wire and the semiconductor pattern. A pixel electrode is formed on the protective layer while contacting the drain electrode through a contact hole.

29. 发明授权

US06498371B1 Body-tied-to-body SOI CMOS inverter circuit 失效
标题翻译：身体对体SOI CMOS反相电路
公开(公告)号：US06498371B1
公开(公告)日：2002-12-24
申请号：US09919543
申请日：2001-07-31
申请人： Srinath Krishnan , Jerry G. Fossum , Meng-Hsueh Chiang
发明人： Srinath Krishnan , Jerry G. Fossum , Meng-Hsueh Chiang
IPC分类号： H01L310392
CPC分类号： H01L29/78615 , H01L27/1203 , H03K19/0948 , Y10S438/967
摘要： An SOI CMOS inverter circuit in which a silicide layer in combination with body tie regions tie a p-type body region and an n-type body region together. At the same time, however, the body regions remain floating electrically so that the benefits of SOI are maintained. The silicide layer permits excess carriers to be recombined via the respective body regions so that the body region potential does not get modulated by generation/recombination effects. Thus, a hysteresis effect in the inverter circuit will be reduced.
摘要翻译： SOI CMOS反相器电路，其中硅化物层与主体区域结合将p型体区域和n型体区域结合在一起。然而，同时，身体区域保持电浮动，从而保持SOI的益处。硅化物层允许过量的载流子通过相应的体区重组，使得体区电位不被发生/复合效应调制。因此，逆变器电路中的滞后效应将会降低。

30. 发明授权

US06495887B1 Argon implantation after silicidation for improved floating-body effects 有权
标题翻译：硅化后的氩注入改善浮体效应
公开(公告)号：US06495887B1
公开(公告)日：2002-12-17
申请号：US09621290
申请日：2000-07-20
申请人： Srinath Krishnan , Witold P. Maszara , Matthew S. Buynoski
发明人： Srinath Krishnan , Witold P. Maszara , Matthew S. Buynoski
IPC分类号： H01L310392
CPC分类号： H01L29/66553 , H01L21/26506 , H01L21/76283 , H01L29/0653 , H01L29/458 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/7841 , H01L29/78612 , H01L29/78621
摘要： A method of forming a MOSFET device is provided including the steps of forming N− lightly doped source and drain extension regions in the top silicon layer, forming spacers above the N− lightly doped source and drain extension regions and forming N+ source and N+ drain regions in the top silicon layer. A silicide film is then provided over the drain and source regions and the spacers are removed. An ion implantation step is then performed to form damaged sidewall regions in the source body and drain body junction.
摘要翻译：提供一种形成MOSFET器件的方法，包括以下步骤：在顶部硅层中形成N-轻掺杂的源极和漏极延伸区域，在N-轻掺杂的源极和漏极延伸区域上方形成间隔物并形成N +源极和N +漏极区域在顶层硅层。然后在漏极和源极区域上提供硅化物膜，并且去除间隔物。然后执行离子注入步骤以在源体和排水体结合处形成受损的侧壁区域。

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